DBT-RISE/DBT-RISE-TGC
12
0
Fork 0
Code Issues 1 Pull Requests 1 Projects Releases Wiki Activity

removes rounding mode lookup as it is not needes

Browse Source
This commit is contained in:
Eyck-Alexander Jentzsch 2025-03-09 13:41:52 +01:00
parent 7a7035f267
commit 484d9dbe08
1 changed files with 29 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
src/vm/fp_functions.cpp
View File

@ -44,21 +44,12 @@ extern "C" {
#include <limits>
using this_t = uint8_t*;
// this does not inlcude any reserved rm or the DYN rm, as DYN rm should be taken care of in the vm_impl
const std::array<uint8_t, 7> rmm_map = {softfloat_round_near_even /*RNE*/,
softfloat_round_minMag /*RTZ*/,
softfloat_round_min /*RDN*/,
softfloat_round_max /*RUP?*/,
softfloat_round_near_maxMag /*RMM*/,
0 /*reserved*/,
softfloat_round_odd /*ROD*/};
extern "C" {
uint32_t fget_flags() { return softfloat_exceptionFlags & 0x1f; }
uint16_t fadd_h(uint16_t v1, uint16_t v2, uint8_t mode) {
float16_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t r = f16_add(v1f, v2f);
return r.v;
@ -66,7 +57,7 @@ uint16_t fadd_h(uint16_t v1, uint16_t v2, uint8_t mode) {
uint16_t fsub_h(uint16_t v1, uint16_t v2, uint8_t mode) {
float16_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t r = f16_sub(v1f, v2f);
return r.v;
@ -74,7 +65,7 @@ uint16_t fsub_h(uint16_t v1, uint16_t v2, uint8_t mode) {
uint16_t fmul_h(uint16_t v1, uint16_t v2, uint8_t mode) {
float16_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t r = f16_mul(v1f, v2f);
return r.v;
@ -82,7 +73,7 @@ uint16_t fmul_h(uint16_t v1, uint16_t v2, uint8_t mode) {
uint16_t fdiv_h(uint16_t v1, uint16_t v2, uint8_t mode) {
float16_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t r = f16_div(v1f, v2f);
return r.v;
@ -90,7 +81,7 @@ uint16_t fdiv_h(uint16_t v1, uint16_t v2, uint8_t mode) {
uint16_t fsqrt_h(uint16_t v1, uint8_t mode) {
float16_t v1f{v1};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t r = f16_sqrt(v1f);
return r.v;
@ -133,11 +124,11 @@ uint16_t fcvt_h(uint16_t v1, uint16_t op, uint8_t mode) {
float16_t r;
switch(op) {
case 0: { // FCVT__W__S
uint_fast16_t res = f16_to_i32(v1f, rmm_map.at(mode), true);
uint_fast16_t res = f16_to_i32(v1f, mode, true);
return (uint16_t)res;
}
case 1: { // FCVT__WU__S
uint_fast16_t res = f16_to_ui32(v1f, rmm_map.at(mode), true);
uint_fast16_t res = f16_to_ui32(v1f, mode, true);
return (uint16_t)res;
}
case 2: // FCVT__S__W
@ -166,7 +157,7 @@ uint16_t fmadd_h(uint16_t v1, uint16_t v2, uint16_t v3, uint16_t op, uint8_t mod
v1 ^= F16_SIGN;
break;
}
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float16_t res = softfloat_mulAddF16(v1, v2, v3, 0);
return res.v;
@ -218,7 +209,7 @@ uint16_t fclass_h(uint16_t v1) {
uint32_t fadd_s(uint32_t v1, uint32_t v2, uint8_t mode) {
float32_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t r = f32_add(v1f, v2f);
return r.v;
@ -226,7 +217,7 @@ uint32_t fadd_s(uint32_t v1, uint32_t v2, uint8_t mode) {
uint32_t fsub_s(uint32_t v1, uint32_t v2, uint8_t mode) {
float32_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t r = f32_sub(v1f, v2f);
return r.v;
@ -234,7 +225,7 @@ uint32_t fsub_s(uint32_t v1, uint32_t v2, uint8_t mode) {
uint32_t fmul_s(uint32_t v1, uint32_t v2, uint8_t mode) {
float32_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t r = f32_mul(v1f, v2f);
return r.v;
@ -242,7 +233,7 @@ uint32_t fmul_s(uint32_t v1, uint32_t v2, uint8_t mode) {
uint32_t fdiv_s(uint32_t v1, uint32_t v2, uint8_t mode) {
float32_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t r = f32_div(v1f, v2f);
return r.v;
@ -250,7 +241,7 @@ uint32_t fdiv_s(uint32_t v1, uint32_t v2, uint8_t mode) {
uint32_t fsqrt_s(uint32_t v1, uint8_t mode) {
float32_t v1f{v1};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t r = f32_sqrt(v1f);
return r.v;
@ -293,11 +284,11 @@ uint32_t fcvt_s(uint32_t v1, uint32_t op, uint8_t mode) {
float32_t r;
switch(op) {
case 0: { // FCVT__W__S
uint_fast32_t res = f32_to_i32(v1f, rmm_map.at(mode), true);
uint_fast32_t res = f32_to_i32(v1f, mode, true);
return (uint32_t)res;
}
case 1: { // FCVT__WU__S
uint_fast32_t res = f32_to_ui32(v1f, rmm_map.at(mode), true);
uint_fast32_t res = f32_to_ui32(v1f, mode, true);
return (uint32_t)res;
}
case 2: // FCVT__S__W
@ -326,7 +317,7 @@ uint32_t fmadd_s(uint32_t v1, uint32_t v2, uint32_t v3, uint32_t op, uint8_t mod
v1 ^= F32_SIGN;
break;
}
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t res = softfloat_mulAddF32(v1, v2, v3, 0);
return res.v;
@ -381,7 +372,7 @@ uint32_t fconv_d2f(uint64_t v1, uint8_t mode) {
softfloat_raiseFlags(softfloat_flag_invalid);
return defaultNaNF32UI;
} else {
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float32_t res = f64_to_f32(float64_t{v1});
return res.v;
@ -403,7 +394,7 @@ uint64_t fadd_d(uint64_t v1, uint64_t v2, uint8_t mode) {
bool nan = v1 == defaultNaNF32UI;
bool snan = softfloat_isSigNaNF32UI(v1);
float64_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t r = f64_add(v1f, v2f);
return r.v;
@ -411,7 +402,7 @@ uint64_t fadd_d(uint64_t v1, uint64_t v2, uint8_t mode) {
uint64_t fsub_d(uint64_t v1, uint64_t v2, uint8_t mode) {
float64_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t r = f64_sub(v1f, v2f);
return r.v;
@ -419,7 +410,7 @@ uint64_t fsub_d(uint64_t v1, uint64_t v2, uint8_t mode) {
uint64_t fmul_d(uint64_t v1, uint64_t v2, uint8_t mode) {
float64_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t r = f64_mul(v1f, v2f);
return r.v;
@ -427,7 +418,7 @@ uint64_t fmul_d(uint64_t v1, uint64_t v2, uint8_t mode) {
uint64_t fdiv_d(uint64_t v1, uint64_t v2, uint8_t mode) {
float64_t v1f{v1}, v2f{v2};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t r = f64_div(v1f, v2f);
return r.v;
@ -435,7 +426,7 @@ uint64_t fdiv_d(uint64_t v1, uint64_t v2, uint8_t mode) {
uint64_t fsqrt_d(uint64_t v1, uint8_t mode) {
float64_t v1f{v1};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t r = f64_sqrt(v1f);
return r.v;
@ -479,11 +470,11 @@ uint64_t fcvt_d(uint64_t v1, uint32_t op, uint8_t mode) {
float64_t r;
switch(op) {
case 0: { // l from d
int64_t res = f64_to_i64(v1f, rmm_map.at(mode), true);
int64_t res = f64_to_i64(v1f, mode, true);
return (uint64_t)res;
}
case 1: { // lu from d
uint64_t res = f64_to_ui64(v1f, rmm_map.at(mode), true);
uint64_t res = f64_to_ui64(v1f, mode, true);
return res;
}
case 2: // d from l
@ -512,7 +503,7 @@ uint64_t fmadd_d(uint64_t v1, uint64_t v2, uint64_t v3, uint32_t op, uint8_t mod
v1 ^= F64_SIGN;
break;
}
softfloat_roundingMode = rmm_map.at(mode);
softfloat_roundingMode = mode;
softfloat_exceptionFlags = 0;
float64_t res = softfloat_mulAddF64(v1, v2, v3, 0);
return res.v;
@ -569,9 +560,9 @@ uint64_t fcvt_32_64(uint32_t v1, uint32_t op, uint8_t mode) {
float64_t r;
switch(op) {
case 0: // l->s, fp to int32
return f32_to_i64(v1f, rmm_map.at(mode), true);
return f32_to_i64(v1f, mode, true);
case 1: // wu->s
return f32_to_ui64(v1f, rmm_map.at(mode), true);
return f32_to_ui64(v1f, mode, true);
case 2: // s->w
r = i32_to_f64(v1);
return r.v;
@ -587,11 +578,11 @@ uint32_t fcvt_64_32(uint64_t v1, uint32_t op, uint8_t mode) {
float32_t r;
switch(op) {
case 0: { // wu->s
int32_t r = f64_to_i32(float64_t{v1}, rmm_map.at(mode), true);
int32_t r = f64_to_i32(float64_t{v1}, mode, true);
return r;
}
case 1: { // wu->s
uint32_t r = f64_to_ui32(float64_t{v1}, rmm_map.at(mode), true);
uint32_t r = f64_to_ui32(float64_t{v1}, mode, true);
return r;
}
case 2: // l->s, fp to int32