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remove tgf_b code generation

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Eyck Jentzsch
2021-03-07 16:26:14 +00:00
parent c171e3c1ba
commit 40db74ce02
8 changed files with 13 additions and 2411 deletions
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1
src/iss/.gitignore vendored Normal file
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@ -0,0 +1 @@
/tgf_b.cpp

69
src/iss/tgf_b.cpp
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@ -1,69 +0,0 @@
/*******************************************************************************
* Copyright (C) 2017 - 2020 MINRES Technologies GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************/
#include "util/ities.h"
#include <util/logging.h>
#include <iss/arch/tgf_b.h>
#include <cstdio>
#include <cstring>
#include <fstream>
using namespace iss::arch;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_names;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_aliases;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_bit_widths;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_byte_offsets;
tgf_b::tgf_b() {
reg.icount = 0;
}
tgf_b::~tgf_b() = default;
void tgf_b::reset(uint64_t address) {
for(size_t i=0; i<traits<tgf_b>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf_b>::reg_t),0));
reg.PC=address;
reg.NEXT_PC=reg.PC;
reg.trap_state=0;
reg.machine_state=0x3;
reg.icount=0;
}
uint8_t *tgf_b::get_regs_base_ptr() {
return reinterpret_cast<uint8_t*>(&reg);
}
tgf_b::phys_addr_t tgf_b::virt2phys(const iss::addr_t &pc) {
return phys_addr_t(pc); // change logical address to physical address
}

4
src/main.cpp
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@ -59,8 +59,8 @@ std::tuple<cpu_ptr, vm_ptr> create_cpu(std::string const& backend, unsigned gdb_
if(backend == "llvm")
return {cpu_ptr{lcpu}, vm_ptr{iss::llvm::create(lcpu, gdb_port)}};
#endif
if(backend == "tcc")
return {cpu_ptr{lcpu}, vm_ptr{iss::tcc::create(lcpu, gdb_port)}};
// if(backend == "tcc")
// return {cpu_ptr{lcpu}, vm_ptr{iss::tcc::create(lcpu, gdb_port)}};
return {nullptr, nullptr};
}

1
src/vm/interp/.gitignore vendored Normal file
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/vm_tgf_b.cpp

2093
src/vm/interp/vm_tgf_b.cpp
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