fixes missing template updates
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20e920338c
commit
18e08cfc50
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@ -179,10 +179,25 @@ private:
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}};
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}};
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iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
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iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
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auto phys_pc = this->core.v2p(pc);
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if(this->core.has_mmu()) {
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if (this->core.read(phys_pc, 4, data) != iss::Ok) return iss::Err;
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auto phys_pc = this->core.virt2phys(pc);
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// if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary
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// if (this->core.read(phys_pc, 2, data) != iss::Ok) return iss::Err;
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// if ((data[0] & 0x3) == 0x3) // this is a 32bit instruction
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// if (this->core.read(this->core.v2p(pc + 2), 2, data + 2) != iss::Ok)
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// return iss::Err;
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// } else {
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if (this->core.read(phys_pc, 4, data) != iss::Ok)
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return iss::Err;
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// }
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} else {
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if (this->core.read(phys_addr_t(pc.access, pc.space, pc.val), 4, data) != iss::Ok)
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return iss::Err;
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}
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return iss::Ok;
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return iss::Ok;
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}
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}
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void populate_decoding_tree(decoding_tree_node* root){
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void populate_decoding_tree(decoding_tree_node* root){
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//create submask
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//create submask
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for(auto instr: root->instrs){
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for(auto instr: root->instrs){
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@ -359,13 +374,13 @@ std::unique_ptr<vm_if> create<arch::${coreDef.name.toLowerCase()}>(arch::${coreD
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namespace iss {
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namespace iss {
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namespace {
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namespace {
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volatile std::array<bool, 2> dummy = {
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volatile std::array<bool, 2> dummy = {
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core_factory::instance().register_creator<core_factory::CPP>("${coreDef.name.toLowerCase()}|m_p|interp", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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core_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|interp", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_m_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto* cpu = new iss::arch::riscv_hart_m_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto vm = new interp::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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auto vm = new interp::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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}),
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}),
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core_factory::instance().register_creator<core_factory::CPP>("${coreDef.name.toLowerCase()}|mu_p|interp", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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core_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|interp", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto vm = new interp::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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auto vm = new interp::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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@ -265,9 +265,19 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt,
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enum {TRAP_ID=1<<16};
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enum {TRAP_ID=1<<16};
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code_word_t instr = 0;
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code_word_t instr = 0;
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phys_addr_t paddr(pc);
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phys_addr_t paddr(pc);
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paddr = this->core.v2p(pc);
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if(this->core.has_mmu())
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paddr = this->core.virt2phys(pc);
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//TODO: re-add page handling
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// if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary
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// auto res = this->core.read(paddr, 2, data);
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// if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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// if ((insn & 0x3) == 0x3) { // this is a 32bit instruction
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// res = this->core.read(this->core.v2p(pc + 2), 2, data + 2);
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// }
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// } else {
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auto res = this->core.read(paddr, 4, reinterpret_cast<uint8_t*>(&instr));
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auto res = this->core.read(paddr, 4, reinterpret_cast<uint8_t*>(&instr));
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if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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// }
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if (instr == 0x0000006f || (instr&0xffff)==0xa001) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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if (instr == 0x0000006f || (instr&0xffff)==0xa001) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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// curr pc on stack
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// curr pc on stack
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++inst_cnt;
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++inst_cnt;
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@ -316,13 +326,13 @@ std::unique_ptr<vm_if> create<arch::${coreDef.name.toLowerCase()}>(arch::${coreD
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namespace iss {
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namespace iss {
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namespace {
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namespace {
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volatile std::array<bool, 2> dummy = {
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volatile std::array<bool, 2> dummy = {
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core_factory::instance().register_creator<core_factory::CPP>("${coreDef.name.toLowerCase()}|m_p|tcc", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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core_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|tcc", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_m_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto* cpu = new iss::arch::riscv_hart_m_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto vm = new tcc::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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auto vm = new tcc::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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}),
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}),
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core_factory::instance().register_creator<core_factory::CPP>("${coreDef.name.toLowerCase()}|mu_p|tcc", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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core_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|tcc", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::${coreDef.name.toLowerCase()}>();
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auto vm = new tcc::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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auto vm = new tcc::${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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