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corrects tcc template when using floating point

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Eyck-Alexander Jentzsch 2025-04-02 11:53:55 +02:00
parent 7e97329e78
commit 07f394d5ff
1 changed files with 4 additions and 3 deletions
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7
gen_input/templates/tcc/CORENAME.cpp.gtl
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@ -159,12 +159,13 @@ if(fcsr != null) {%>
}
}
value NaNBox64(tu_builder& tu, value NaNBox64_val){
if(static_cast<uint32_t>(traits::FLEN) == 32)
throw new std::runtime_error("tcc does not support Registers wider than 64 bits");
/*if(static_cast<uint32_t>(traits::FLEN) == 64)
return tu.ext(NaNBox64_val, traits::FLEN, false);
else {
auto box = tu.assignment(tu.logical_neg((tu.ext(0, 128, false))), traits::FLEN) ;
return tu.ext((tu.bitwise_or(tu.shl(box, 64), NaNBox64_val)), traits::FLEN, false);
}
}*/
}
<%}%>
private:
@ -338,6 +339,7 @@ template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){
os << "uint32_t (*fmadd_s)(uint32_t v1, uint32_t v2, uint32_t v3, uint32_t op, uint8_t mode)=" << (uintptr_t)&fmadd_s << ";\\n";
os << "uint32_t (*fsel_s)(uint32_t v1, uint32_t v2, uint32_t op)=" << (uintptr_t)&fsel_s << ";\\n";
os << "uint32_t (*fclass_s)( uint32_t v1 )=" << (uintptr_t)&fclass_s << ";\\n";
os << "uint32_t (*unbox_s)(uint8_t FLEN, uint64_t v)=" << (uintptr_t)&unbox_s << ";\\n";
os << "uint32_t (*f32toi32)(uint32_t v1, uint8_t mode)=" << (uintptr_t)&f32toi32 << ";\\n";
os << "uint32_t (*f32toui32)(uint32_t v1, uint8_t mode)=" << (uintptr_t)&f32toui32 << ";\\n";
@ -348,7 +350,6 @@ template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){
os << "uint32_t (*i64tof32)(uint64_t v1, uint8_t mode)=" << (uintptr_t)&i64tof32 <<";\\n";
os << "uint32_t (*ui64tof32)(uint64_t v1, uint8_t mode)=" << (uintptr_t)&ui64tof32 <<";\\n";
<%if(flen > 32) {%>
os << "uint32_t (*unbox_s)(uint8_t FLEN, uint64_t v)=" << (uintptr_t)&unbox_s << ";\\n";
os << "uint64_t (*fadd_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fadd_d << ";\\n";
os << "uint64_t (*fsub_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fsub_d << ";\\n";