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extend spn_checker to comapre the results from 2nd XSPN accelerator

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This commit is contained in:
Stanislaw Kaushanski 2021-04-20 20:36:00 +02:00
parent 26d7560891
commit 5ba7d5dd24
7 changed files with 20 additions and 7 deletions
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7
fpga_spn/src/spn_checker_regs.h
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@ -44,6 +44,7 @@
#define SPN_CNTL_REG_INPUT_ADDR 0x40
#define SPN_CNTL_REG_NUM_INPUT_SAMPLES 0x50
#define SPN_CNTL_REG_START_DATA_TRANS 0x60
#define SPN_CNTL_REG_OUTPUT_ADDR2 0x70
template<uint32_t BASE_ADDR>
class spn_checker_regs {
@ -60,6 +61,8 @@ public:
uint32_t r_output_addr;
uint32_t r_output_addr2;
uint32_t r_input_addr;
uint32_t r_num_input_samples;
@ -82,6 +85,10 @@ public:
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR);
}
static inline uint32_t & output_addr2_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR2);
}
static inline uint32_t & input_addr_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR);
}

3
raven/Makefile
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@ -14,8 +14,7 @@ LINK_TARGET=flash
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
TOOL_DIR=/home/stas/Downloads/riscv64-unknown-elf-gcc-8.3.0-2020.04.0-x86_64-linux-ubuntu14/bin
#TOOL_DIR?=/opt/riscv/FreedomStudio/20180122/SiFive/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin
TOOL_DIR=/opt/shared/riscv/tools/Ubuntu/riscv64-unknown-elf-gcc-8.3.0-2020.04.1-x86_64-linux-ubuntu14/bin
BSP_BASE = ./bsp
include $(BSP_BASE)/env/common.mk

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raven/hello_raven
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2
raven/src/hello_raven.cpp
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@ -93,7 +93,7 @@ void platform_init(){
int main() {
volatile int * target_mem_base = (int *)(end + 0x10000000);
int * local_mem_base = (int *) end;
int * plic_b_pending = (int *)(0xA0000000+PLIC_PENDING_OFFSET);
int * plic_b_pending = (int *)(0xC0000000+PLIC_PENDING_OFFSET);
int hartid = read_csr(mhartid);

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raven_spn/raven_spn
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8
raven_spn/src/raven_spn.cpp
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@ -8,7 +8,6 @@ using spn_2 = spn_regs<0xC0000000>;
using spn_checker = spn_checker_regs<0x10040000>;
void run_xspn1(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
printf("Starting first XSPN instance\n");
spn_1::mode_reg() = 0;
spn_1::input_length_reg() = num_samples; // each sample consists of 5 uint8 values
spn_1::input_addr_reg() = in_addr;
@ -16,16 +15,17 @@ void run_xspn1(int in_addr, int out_addr, int num_samples, int in_beats, int out
spn_1::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data
spn_1::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data
spn_1::start_reg() = 1;
printf("Starting first XSPN instance\n");
}
void run_xspn2(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
printf("Starting second XSPN instance\n");
spn_2::mode_reg() = 0;
spn_2::input_length_reg() = num_samples; // each sample consists of 5 uint8 values
spn_2::input_addr_reg() = in_addr;
spn_2::output_addr_reg() = out_addr;
spn_2::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data
spn_2::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data
printf("Starting second XSPN instance\n");
spn_2::start_reg() = 1;
}
@ -85,15 +85,15 @@ int main() {
int in_addr = 0x20010000; // place input samples in the SPI memory
int out_addr1 = 0x20510000;
int out_addr2 = 0x20520000;
int out_addr2 = 0x205F0000;
// inject SPN input data
spn_checker::input_addr_reg() = in_addr;
spn_checker::num_input_samples_reg() = sample_bytes * step * iterations;
spn_checker::start_data_trans_reg() = 1;
spn_checker::output_addr_reg() = out_addr1;
spn_checker::output_addr2_reg() = out_addr2;
for (int k = 0; k < iterations*step; k+=step) {
run_xspn1(in_addr, out_addr1, step, in_beats, out_beats);
run_xspn2(in_addr, out_addr2, step, in_beats, out_beats);

7
raven_spn/src/spn_checker_regs.h
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@ -44,6 +44,7 @@
#define SPN_CNTL_REG_INPUT_ADDR 0x40
#define SPN_CNTL_REG_NUM_INPUT_SAMPLES 0x50
#define SPN_CNTL_REG_START_DATA_TRANS 0x60
#define SPN_CNTL_REG_OUTPUT_ADDR2 0x70
template<uint32_t BASE_ADDR>
class spn_checker_regs {
@ -60,6 +61,8 @@ public:
uint32_t r_output_addr;
uint32_t r_output_addr2;
uint32_t r_input_addr;
uint32_t r_num_input_samples;
@ -82,6 +85,10 @@ public:
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR);
}
static inline uint32_t & output_addr2_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR2);
}
static inline uint32_t & input_addr_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR);
}