From 5ba7d5dd24a851a40f3879ddaa7453388c8c33a1 Mon Sep 17 00:00:00 2001 From: Stas Kaushanski Date: Tue, 20 Apr 2021 20:36:00 +0200 Subject: [PATCH] extend spn_checker to comapre the results from 2nd XSPN accelerator --- fpga_spn/src/spn_checker_regs.h | 7 +++++++ raven/Makefile | 3 +-- raven/hello_raven | Bin 116936 -> 117196 bytes raven/src/hello_raven.cpp | 2 +- raven_spn/raven_spn | Bin 124304 -> 124584 bytes raven_spn/src/raven_spn.cpp | 8 ++++---- raven_spn/src/spn_checker_regs.h | 7 +++++++ 7 files changed, 20 insertions(+), 7 deletions(-) diff --git a/fpga_spn/src/spn_checker_regs.h b/fpga_spn/src/spn_checker_regs.h index 0aba176..ddcdb03 100644 --- a/fpga_spn/src/spn_checker_regs.h +++ b/fpga_spn/src/spn_checker_regs.h @@ -44,6 +44,7 @@ #define SPN_CNTL_REG_INPUT_ADDR 0x40 #define SPN_CNTL_REG_NUM_INPUT_SAMPLES 0x50 #define SPN_CNTL_REG_START_DATA_TRANS 0x60 +#define SPN_CNTL_REG_OUTPUT_ADDR2 0x70 template class spn_checker_regs { @@ -60,6 +61,8 @@ public: uint32_t r_output_addr; + uint32_t r_output_addr2; + uint32_t r_input_addr; uint32_t r_num_input_samples; @@ -82,6 +85,10 @@ public: return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR); } + static inline uint32_t & output_addr2_reg(){ + return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR2); + } + static inline uint32_t & input_addr_reg(){ return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR); } diff --git a/raven/Makefile b/raven/Makefile index 2d43826..44033b3 100644 --- a/raven/Makefile +++ b/raven/Makefile @@ -14,8 +14,7 @@ LINK_TARGET=flash RISCV_ARCH=rv32imac RISCV_ABI=ilp32 -TOOL_DIR=/home/stas/Downloads/riscv64-unknown-elf-gcc-8.3.0-2020.04.0-x86_64-linux-ubuntu14/bin -#TOOL_DIR?=/opt/riscv/FreedomStudio/20180122/SiFive/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin +TOOL_DIR=/opt/shared/riscv/tools/Ubuntu/riscv64-unknown-elf-gcc-8.3.0-2020.04.1-x86_64-linux-ubuntu14/bin BSP_BASE = ./bsp include $(BSP_BASE)/env/common.mk diff --git a/raven/hello_raven b/raven/hello_raven index 71d0fdacd87944f2df9b2c22349dbca507bd6a5b..27d4b39676e99d3bf409eb6b78eecbd2310e62cf 100755 GIT binary patch delta 4859 zcmdT`3v5%@89x8LcI-I8PF&(go_2im@*{RaNQ^~G>ZEI$(gzAzQI$Yr5+&InusAMd zw3t_TbRuHC>keyK*9Q`*+5*8{jY!l&s{q=fQI%F~?Iyam(h$+qrPapPHroDkjL8+# zrke>(n`Pa5zW;pxIo~<|f6jl;|4=t2>kc@C?6YH~&H$WFGzT_0pe8Z#;D>^4eI_9y zq4H1L>_rfU4uQ{{=xp}+DH9E8#b(q`r9M1fuWduXQTpZ{mB=ZQ{xHcAfqW4O6`wv#K0H-TG(R=93@6gl{0GSyE$QiY}lofUk`U@CiT=;9q5M7RiB42Dv`!Q@I$% zzty3i-_q3|4f%L1Zyw7sxFY>SQMFmkH%{vAiNtzUyCede?$hc$A`6-?mEa@W^`+6x zs%KS~OY^utQt55l8VB81m^mUjDZjSDCeKUOSZ7f7ZEM$k$p=XOX9GC5->&^f2CKf~DTQAKTg{Ev8&xJDCbG}ZFA2!Laowy4QCB8h-r-4IqM=~JH z=G;uMC5$IyB1|WCjc>~q8VY%T!gF5A7QR!OSn+;+u`umO?EB(Mj_@;YGAhCo2H{tJ z#`4l)BTNcYfg7NThD>l)c&A1l9k4> zKsty|K{|&|QJO%zM!FxJwNf)aGl+8qtpaX<7nnH9~Jj?W@!7^n}h~Dmm5_IZxrk&Pk^m9&Wz@5?{MBlu@ z?p98b2ArJ+AzD((r&v}BJtU0$@u@_hcwR0(a*| z&tH__B_)_~&=wbjtp{;CvVVk|&r(gOYIM}$;cdHvzTiU9tLPaQlw;yvaY0@A775d) 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z0J#q7&`q2EQ^4Dmy%1HJ5TJ$isz5w&=NNRWS7N>Jfn4`$0-$9-_9o!zc;A$%_8Uk$!O(ZOq;SEZJoGv9SN;sX{^pF9%+i0UAu?9c%=qZIxbsPXLD@*9=M*fTz@3V}Am#uD3)Y zktwuWQXQ(qs~U_W2$jA_%YbJi^m-AP0DPbTBh(yx7`Q~nQK06~LefWsjBq#xYi<>= z{@a5hco_IS3{Wp3-vHB=OgKPQCkik4s(J=O!1`|sGSCfJ|Aa^px)Zp5#O?v6jinyq z=YjRlZlu2+cuKt`vl&=lG7U*#I~c8_Zf_M10Y6eNgy(=yZr*x`eQi-pCzwZhdnt?B z{L67x7Qyx@J-^2`nzoB!W%BndB|_>D4oY}?E>m743B6mFDIY^(q&!oie_-xSKQJR> zPbsFeEX7>*1~TR?CHE}O5IZY<&$0~D{HaW8tjvJav}HPzUQu2FDOapj_MOGa(FYrt vWL2&aYgdhucn++^A2F$q(&-$`{eVQd7Ntx)$3pJor; using spn_checker = spn_checker_regs<0x10040000>; void run_xspn1(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) { - printf("Starting first XSPN instance\n"); spn_1::mode_reg() = 0; spn_1::input_length_reg() = num_samples; // each sample consists of 5 uint8 values spn_1::input_addr_reg() = in_addr; @@ -16,16 +15,17 @@ void run_xspn1(int in_addr, int out_addr, int num_samples, int in_beats, int out spn_1::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data spn_1::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data spn_1::start_reg() = 1; + printf("Starting first XSPN instance\n"); } void run_xspn2(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) { - printf("Starting second XSPN instance\n"); spn_2::mode_reg() = 0; spn_2::input_length_reg() = num_samples; // each sample consists of 5 uint8 values spn_2::input_addr_reg() = in_addr; spn_2::output_addr_reg() = out_addr; spn_2::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data spn_2::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data + printf("Starting second XSPN instance\n"); spn_2::start_reg() = 1; } @@ -85,15 +85,15 @@ int main() { int in_addr = 0x20010000; // place input samples in the SPI memory int out_addr1 = 0x20510000; - int out_addr2 = 0x20520000; + int out_addr2 = 0x205F0000; // inject SPN input data spn_checker::input_addr_reg() = in_addr; spn_checker::num_input_samples_reg() = sample_bytes * step * iterations; spn_checker::start_data_trans_reg() = 1; - spn_checker::output_addr_reg() = out_addr1; + spn_checker::output_addr2_reg() = out_addr2; for (int k = 0; k < iterations*step; k+=step) { run_xspn1(in_addr, out_addr1, step, in_beats, out_beats); run_xspn2(in_addr, out_addr2, step, in_beats, out_beats); diff --git a/raven_spn/src/spn_checker_regs.h b/raven_spn/src/spn_checker_regs.h index 0aba176..ddcdb03 100644 --- a/raven_spn/src/spn_checker_regs.h +++ b/raven_spn/src/spn_checker_regs.h @@ -44,6 +44,7 @@ #define SPN_CNTL_REG_INPUT_ADDR 0x40 #define SPN_CNTL_REG_NUM_INPUT_SAMPLES 0x50 #define SPN_CNTL_REG_START_DATA_TRANS 0x60 +#define SPN_CNTL_REG_OUTPUT_ADDR2 0x70 template class spn_checker_regs { @@ -60,6 +61,8 @@ public: uint32_t r_output_addr; + uint32_t r_output_addr2; + uint32_t r_input_addr; uint32_t r_num_input_samples; @@ -82,6 +85,10 @@ public: return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR); } + static inline uint32_t & output_addr2_reg(){ + return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR2); + } + static inline uint32_t & input_addr_reg(){ return *reinterpret_cast(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR); }