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refactors decoder as separate component

This commit is contained in:
Eyck Jentzsch 2022-06-19 13:18:14 +02:00
parent 41116a975e
commit 0fd9c94067
4 changed files with 5 additions and 20 deletions
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19
cmake/CodeGen.cmake
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@ -56,7 +56,6 @@ set(JAVA_OPTS --add-modules ALL-SYSTEM --add-opens=java.base/java.io=ALL-UNNAMED
--add-opens=java.rmi/java.rmi.server=ALL-UNNAMED --add-opens=java.sql/java.sql=ALL-UNNAMED) --add-opens=java.rmi/java.rmi.server=ALL-UNNAMED --add-opens=java.sql/java.sql=ALL-UNNAMED)
set(GENERATOR java ${JAVA_OPTS} -jar ${GENERATOR_JAR}) set(GENERATOR java ${JAVA_OPTS} -jar ${GENERATOR_JAR})
set(REPO_DIR ${DBT_CORE_TGC_DIR}/gen_input/CoreDSL-Instruction-Set-Description)
set(TMPL_DIR ${DBT_CORE_TGC_DIR}/gen_input/templates/) set(TMPL_DIR ${DBT_CORE_TGC_DIR}/gen_input/templates/)
if(ENABLE_CODEGEN AND EXISTS ${GENERATOR_JAR}) if(ENABLE_CODEGEN AND EXISTS ${GENERATOR_JAR})
@ -65,35 +64,21 @@ if(ENABLE_CODEGEN AND EXISTS ${GENERATOR_JAR})
string(TOUPPER ${BACKEND} BE_UPPER) string(TOUPPER ${BACKEND} BE_UPPER)
string(TOLOWER ${CORE_NAME} CORE_NAMEL) string(TOLOWER ${CORE_NAME} CORE_NAMEL)
if(EXISTS ${DBT_CORE_TGC_DIR}/generate.sh AND NOT EXISTS ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h)
# make sure source file exist initially
execute_process(
COMMAND /bin/bash ${DBT_CORE_TGC_DIR}/../generate.sh -c $CORE_NAME -b $BACKEND
WORKING_DIRECTORY ${DBT_CORE_TGC_DIR}/..
RESULT_VARIABLE return_code)
endif()
if(${CORE_NAME} STREQUAL "TGC_C") if(${CORE_NAME} STREQUAL "TGC_C")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.h") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}_decoder.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp")
else() else()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}_decoder.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp")
endif() endif()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp) set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp)
#add_custom_command(
# COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} -r ${REPO_DIR} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
# DEPENDS ${GENERATOR_JAR} ${INPUT_FILE} ${TMPL_DIR}/CORENAME.h.gtl ${TMPL_DIR}/CORENAME.cpp.gtl ${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl
# OUTPUT ${${CORE_NAME}_OUTPUT_FILES}
# COMMENT "Generating code for ${CORE_NAME}."
# USES_TERMINAL VERBATIM
#)
if(NOT DEFINED ENV{CI}) if(NOT DEFINED ENV{CI})
add_custom_target(${CORE_NAME}_cpp add_custom_target(${CORE_NAME}_cpp
COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE} COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}

2
coredsl

@ -1 +1 @@
Subproject commit 7695153ef5acc042fa68bd3c8376fc6008636941 Subproject commit ee31e383001a8b223571667ee041e42fde32c0e6

2
dbt-rise-core

@ -1 +1 @@
Subproject commit e55026b8fe000ddb0c546a14967ac669b430cd65 Subproject commit 00c4420f04b11be07e2b43c0f3ed59a0c855d214

2
dbt-rise-tgc

@ -1 +1 @@
Subproject commit cb5375258a315b77f51bf8454ee7d8c9351fe636 Subproject commit 18f33b4a6809997a4d73824c5fdb4dd7c70e626a