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applies cklang-tidy fixes

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This commit is contained in:
Eyck Jentzsch
2023-12-22 20:42:21 +01:00
parent 288f0577f1
commit b9c9e15166
31 changed files with 607 additions and 537 deletions
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10
tests/sim_performance/packet.h
View File

@@ -14,20 +14,18 @@ struct packet {
std::vector<uint8_t> routing;
};
struct packet_ext: public tlm::tlm_extension<packet_ext>, public packet {
struct packet_ext : public tlm::tlm_extension<packet_ext>, public packet {
packet_ext() = default;
packet_ext& operator=(packet_ext const& o) = default;
tlm_extension_base* clone() const override {
return new packet_ext(*this);
}
tlm_extension_base* clone() const override { return new packet_ext(*this); }
void copy_from(tlm_extension_base const & o) override {
void copy_from(tlm_extension_base const& o) override {
auto* ext = dynamic_cast<packet_ext const*>(&o);
if(ext)
this->routing=ext->routing;
this->routing = ext->routing;
}
};

67
tests/sim_performance/pkt_sender.cpp
View File

@@ -12,88 +12,85 @@
using namespace sc_core;
pkt_sender::pkt_sender(const sc_core::sc_module_name &nm, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count)
pkt_sender::pkt_sender(const sc_core::sc_module_name& nm, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count)
: sc_module(nm)
, bw_peq("bw_peq")
, fw_peq("fw_peq")
, my_pos{pos_x,pos_y}
, my_pos{pos_x, pos_y}
, dim{dim}
, count{count}
{
SCCDEBUG(SCMOD)<<"instantiating sender "<<pos_x<<"/"<<pos_y;
, count{count} {
SCCDEBUG(SCMOD) << "instantiating sender " << pos_x << "/" << pos_y;
SC_HAS_PROCESS(pkt_sender);
isck.register_nb_transport_bw([this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
return this->nb_bw(gp, phase, delay);
});
tsck.register_nb_transport_fw([this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
return this->nb_fw(gp, phase, delay);
});
isck.register_nb_transport_bw([this](tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_bw(gp, phase, delay); });
tsck.register_nb_transport_fw([this](tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_fw(gp, phase, delay); });
SC_METHOD(received);
sensitive<<fw_peq.get_event();
sensitive << fw_peq.get_event();
dont_initialize();
SC_THREAD(run);
}
void pkt_sender::gen_routing(std::vector<uint8_t> &route_vec) {
if(std::get<0>(my_pos)==0){
for(auto i=0; i<dim; ++i)
void pkt_sender::gen_routing(std::vector<uint8_t>& route_vec) {
if(std::get<0>(my_pos) == 0) {
for(auto i = 0; i < dim; ++i)
route_vec.push_back(RIGHT);
} else if(std::get<0>(my_pos)==dim+1){
for(auto i=0; i<dim; ++i)
} else if(std::get<0>(my_pos) == dim + 1) {
for(auto i = 0; i < dim; ++i)
route_vec.push_back(LEFT);
} else if(std::get<1>(my_pos)==0){
for(auto i=0; i<dim; ++i)
} else if(std::get<1>(my_pos) == 0) {
for(auto i = 0; i < dim; ++i)
route_vec.push_back(BOTTOM);
} else if(std::get<1>(my_pos)==dim+1){
for(auto i=0; i<dim; ++i)
} else if(std::get<1>(my_pos) == dim + 1) {
for(auto i = 0; i < dim; ++i)
route_vec.push_back(TOP);
} else
SCCERR(SCMOD)<<"WTF!?!";
SCCERR(SCMOD) << "WTF!?!";
}
void pkt_sender::run() {
wait(clk_i.posedge_event());
for(auto i=0U; i<count; i++){
for(auto i = 0U; i < count; i++) {
tlm::tlm_generic_payload* gp = tlm::scc::tlm_mm<>::get().allocate<packet_ext>();
gen_routing(gp->get_extension<packet_ext>()->routing);
tlm::tlm_phase phase{tlm::BEGIN_REQ};
sc_time delay;
gp->acquire();
auto sync = isck->nb_transport_fw(*gp, phase, delay);
sc_assert(sync==tlm::TLM_UPDATED && phase==tlm::END_REQ);
sc_assert(sync == tlm::TLM_UPDATED && phase == tlm::END_REQ);
tlm::tlm_generic_payload* ret{nullptr};
while(!(ret=bw_peq.get_next_transaction())){
while(!(ret = bw_peq.get_next_transaction())) {
wait(bw_peq.get_event());
}
sc_assert(gp==ret);
sc_assert(gp == ret);
ret->release();
}
finish_evt.notify(SC_ZERO_TIME);
}
tlm::tlm_sync_enum pkt_sender::nb_bw(tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
sc_assert(phase==tlm::BEGIN_RESP);
tlm::tlm_sync_enum pkt_sender::nb_bw(tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
sc_assert(phase == tlm::BEGIN_RESP);
bw_peq.notify(gp, delay);
phase=tlm::END_RESP;
phase = tlm::END_RESP;
return tlm::TLM_COMPLETED;
}
tlm::tlm_sync_enum pkt_sender::nb_fw(tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
sc_assert(phase==tlm::BEGIN_REQ);
tlm::tlm_sync_enum pkt_sender::nb_fw(tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
sc_assert(phase == tlm::BEGIN_REQ);
auto ext = gp.get_extension<packet_ext>();
sc_assert(ext->routing.size()==0);
sc_assert(ext->routing.size() == 0);
gp.acquire();
fw_peq.notify(gp, delay);
phase=tlm::END_REQ;
phase = tlm::END_REQ;
return tlm::TLM_UPDATED;
}
void pkt_sender::received() {
if(auto gp = fw_peq.get_next_transaction()){
if(auto gp = fw_peq.get_next_transaction()) {
tlm::tlm_phase phase{tlm::BEGIN_RESP};
sc_time delay;
auto sync = tsck->nb_transport_bw(*gp, phase, delay);
sc_assert(sync==tlm::TLM_COMPLETED && phase==tlm::END_RESP);
sc_assert(sync == tlm::TLM_COMPLETED && phase == tlm::END_RESP);
gp->release();
}
}

6
tests/sim_performance/pkt_sender.h
View File

@@ -8,12 +8,11 @@
#ifndef _SIM_PERFORMANCE_PKT_SENDER_H_
#define _SIM_PERFORMANCE_PKT_SENDER_H_
#include <systemc>
#include "packet.h"
#include <systemc>
#include <tlm/scc/initiator_mixin.h>
#include <tlm/scc/target_mixin.h>
class pkt_sender : sc_core::sc_module {
public:
sc_core::sc_in<bool> clk_i{"clk_i"};
@@ -21,7 +20,8 @@ public:
tlm::scc::target_mixin<tlm::tlm_target_socket<32>> tsck;
pkt_sender(sc_core::sc_module_name const&, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count);
virtual ~pkt_sender() = default;
sc_core::sc_event const& get_finish_event(){return finish_evt;}
sc_core::sc_event const& get_finish_event() { return finish_evt; }
private:
void run();
void gen_routing(std::vector<uint8_t>& route_vec);

64
tests/sim_performance/pkt_switch.cpp
View File

@@ -14,63 +14,67 @@
using namespace sc_core;
pkt_switch::pkt_switch(const sc_core::sc_module_name &nm):sc_module(nm) {
pkt_switch::pkt_switch(const sc_core::sc_module_name& nm)
: sc_module(nm) {
SC_HAS_PROCESS(pkt_switch);
auto index = 0U;
for(auto& s:isck){
s.register_nb_transport_bw([this](unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
return this->nb_bw(id, gp, phase, delay);
}, index++);
for(auto& s : isck) {
s.register_nb_transport_bw([this](unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_bw(id, gp, phase, delay); },
index++);
}
index = 0U;
for(auto& s:tsck){
s.register_nb_transport_fw([this](unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
return this->nb_fw(id, gp, phase, delay);
}, index++);
for(auto& s : tsck) {
s.register_nb_transport_fw([this](unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_fw(id, gp, phase, delay); },
index++);
}
SC_METHOD(clock_cb);
sensitive<<clk_i.pos();
sensitive << clk_i.pos();
dont_initialize();
for(auto i=0U; i<SIDES; ++i){
for(auto i = 0U; i < SIDES; ++i) {
sc_core::sc_spawn_options opts;
opts.spawn_method();
opts.set_sensitivity(&out_fifo[i].data_written_event());
sc_core::sc_spawn([this, i]()->void {this->output_cb(i);}, sc_core::sc_gen_unique_name("out_peq"), &opts);
sc_core::sc_spawn([this, i]() -> void { this->output_cb(i); }, sc_core::sc_gen_unique_name("out_peq"), &opts);
}
}
tlm::tlm_sync_enum pkt_switch::nb_fw(unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
tlm::tlm_sync_enum pkt_switch::nb_fw(unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
in_tx[id].write(&gp);
if(phase==tlm::BEGIN_REQ) phase=tlm::END_REQ;
else SCCERR(SCMOD)<<"WTF!?!";
if(phase == tlm::BEGIN_REQ)
phase = tlm::END_REQ;
else
SCCERR(SCMOD) << "WTF!?!";
return tlm::TLM_UPDATED;
}
void pkt_switch::clock_cb() {
std::array<std::vector<unsigned>, SIDES> routing{};
bool nothing_todo=true;
for(auto i=0U; i<SIDES; ++i){
if(auto gp = in_tx[i].read()){
bool nothing_todo = true;
for(auto i = 0U; i < SIDES; ++i) {
if(auto gp = in_tx[i].read()) {
auto ext = gp->get_extension<packet_ext>();
sc_assert(ext);
routing[ext->routing.back()].push_back(i);
nothing_todo = false;
}
}
if(nothing_todo) return;
for(auto i=0U; i<SIDES; ++i){
if(routing[i].size()){
auto selected_input=routing[i].front();
if(nothing_todo)
return;
for(auto i = 0U; i < SIDES; ++i) {
if(routing[i].size()) {
auto selected_input = routing[i].front();
auto* gp = in_tx[selected_input].read();
if(out_fifo[i].nb_write(gp)){
if(out_fifo[i].nb_write(gp)) {
auto ext = gp->get_extension<packet_ext>();
ext->routing.pop_back();
gp->acquire();
tlm::tlm_phase phase{tlm::BEGIN_RESP};
sc_core::sc_time delay;
auto res = tsck[selected_input]->nb_transport_bw(*gp, phase, delay);
if(res!=tlm::TLM_COMPLETED && !(res==tlm::TLM_UPDATED && phase==tlm::END_RESP))
SCCERR(SCMOD)<<"WTF!?!";
if(res != tlm::TLM_COMPLETED && !(res == tlm::TLM_UPDATED && phase == tlm::END_RESP))
SCCERR(SCMOD) << "WTF!?!";
in_tx[selected_input].clear();
}
}
@@ -79,18 +83,18 @@ void pkt_switch::clock_cb() {
void pkt_switch::output_cb(unsigned id) {
if(out_fifo[id].num_available()){
if(out_fifo[id].num_available()) {
auto* gp = out_fifo[id].read();
tlm::tlm_phase phase{tlm::BEGIN_REQ};
sc_time delay;
auto sync = isck[id]->nb_transport_fw(*gp, phase, delay);
sc_assert(sync==tlm::TLM_UPDATED && phase==tlm::END_REQ);
sc_assert(sync == tlm::TLM_UPDATED && phase == tlm::END_REQ);
}
}
tlm::tlm_sync_enum pkt_switch::nb_bw(unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
tlm::tlm_sync_enum pkt_switch::nb_bw(unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
gp.release();
sc_assert(phase==tlm::BEGIN_RESP);
phase=tlm::END_RESP;
sc_assert(phase == tlm::BEGIN_RESP);
phase = tlm::END_RESP;
return tlm::TLM_COMPLETED;
}

14
tests/sim_performance/pkt_switch.h
View File

@@ -8,22 +8,22 @@
#ifndef _SIM_PERFORMANCE_PKT_SWITCH_H_
#define _SIM_PERFORMANCE_PKT_SWITCH_H_
#include <systemc>
#include "packet.h"
#include <array>
#include <scc/sc_owning_signal.h>
#include <systemc>
#include <tlm/scc/tagged_initiator_mixin.h>
#include <tlm/scc/tagged_target_mixin.h>
#include <scc/sc_owning_signal.h>
#include <array>
class pkt_switch : sc_core::sc_module {
public:
enum {NONE=std::numeric_limits<unsigned>::max()};
enum { NONE = std::numeric_limits<unsigned>::max() };
sc_core::sc_in<bool> clk_i{"clk_i"};
sc_core::sc_vector<tlm::scc::tagged_target_mixin<tlm::tlm_target_socket<32>>> tsck{"tsck",4};
sc_core::sc_vector<tlm::scc::tagged_initiator_mixin<tlm::tlm_initiator_socket<32>>> isck{"isck",4};
sc_core::sc_vector<tlm::scc::tagged_target_mixin<tlm::tlm_target_socket<32>>> tsck{"tsck", 4};
sc_core::sc_vector<tlm::scc::tagged_initiator_mixin<tlm::tlm_initiator_socket<32>>> isck{"isck", 4};
pkt_switch(sc_core::sc_module_name const&);
virtual ~pkt_switch() = default;
private:
void clock_cb();
void output_cb(unsigned);

20
tests/sim_performance/sc_main.cpp
View File

@@ -21,10 +21,10 @@
*/
#include "top.h"
#include <boost/program_options.hpp>
#include <scc/perf_estimator.h>
#include <scc/report.h>
#include <scc/tracer.h>
#include <boost/program_options.hpp>
using namespace scc;
namespace po = boost::program_options;
@@ -35,8 +35,8 @@ const size_t SUCCESS = 0;
const size_t ERROR_UNHANDLED_EXCEPTION = 2;
} // namespace
int sc_main(int argc, char *argv[]) {
sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING );
int sc_main(int argc, char* argv[]) {
sc_core::sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING);
sc_core::sc_report_handler::set_actions(sc_core::SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, sc_core::SC_DO_NOTHING);
///////////////////////////////////////////////////////////////////////////
// CLI argument parsing
@@ -54,13 +54,13 @@ int sc_main(int argc, char *argv[]) {
try {
po::store(po::parse_command_line(argc, argv, desc), vm); // can throw
// --help option
if (vm.count("help")) {
if(vm.count("help")) {
std::cout << "JIT-ISS simulator for AVR" << std::endl << desc << std::endl;
return SUCCESS;
}
po::notify(vm); // throws on error, so do after help in case
// there are any problems
} catch (po::error &e) {
} catch(po::error& e) {
std::cerr << "ERROR: " << e.what() << std::endl << std::endl;
std::cerr << desc << std::endl;
return ERROR_IN_COMMAND_LINE;
@@ -68,20 +68,20 @@ int sc_main(int argc, char *argv[]) {
///////////////////////////////////////////////////////////////////////////
// configure logging
///////////////////////////////////////////////////////////////////////////
scc::init_logging(vm.count("debug")?scc::log::DEBUG:scc::log::INFO);
scc::init_logging(vm.count("debug") ? scc::log::DEBUG : scc::log::INFO);
///////////////////////////////////////////////////////////////////////////
// set up tracing & transaction recording
///////////////////////////////////////////////////////////////////////////
//tracer trace("simple_system", tracer::TEXT, vm.count("trace"));
// todo: fix displayed clock period in VCD
// tracer trace("simple_system", tracer::TEXT, vm.count("trace"));
// todo: fix displayed clock period in VCD
try {
///////////////////////////////////////////////////////////////////////////
// instantiate top level
///////////////////////////////////////////////////////////////////////////
perf_estimator estimator;
auto const count=vm["count"].as<unsigned>();
auto const count = vm["count"].as<unsigned>();
auto const dim = vm["dim"].as<unsigned>();
SCCINFO()<<"Instantiating "<<(unsigned)dim<<"x"<<(unsigned)dim<<" matrix and executing "<<count<<" accesses";
SCCINFO() << "Instantiating " << (unsigned)dim << "x" << (unsigned)dim << " matrix and executing " << count << " accesses";
top i_top("i_top", dim, count);
///////////////////////////////////////////////////////////////////////////
// run simulation

74
tests/sim_performance/top.cpp
View File

@@ -6,34 +6,35 @@
*/
#include "top.h"
#include <scc/utilities.h>
#include <scc/report.h>
#include <fmt/format.h>
#include <scc/report.h>
#include <scc/utilities.h>
using namespace sc_core;
using namespace fmt;
top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :sc_module(nm){
sc_assert(dimension>0);
top::top(sc_core::sc_module_name const& nm, uint8_t dimension, unsigned count)
: sc_module(nm) {
sc_assert(dimension > 0);
SC_HAS_PROCESS(top);
for(auto yidx=0U; yidx<dimension; ++yidx){
for(auto xidx=0U; xidx<dimension; ++xidx){
for(auto yidx = 0U; yidx < dimension; ++yidx) {
for(auto xidx = 0U; xidx < dimension; ++xidx) {
auto name = format("sw_{}_{}", xidx, yidx);
SCCDEBUG(SCMOD)<<"instantiating switch "<<xidx<<"/"<<yidx;
SCCDEBUG(SCMOD) << "instantiating switch " << xidx << "/" << yidx;
switches.push_back(scc::make_unique<pkt_switch>(sc_module_name(name.c_str())));
switches.back()->clk_i(clk);
}
}
for(auto yidx=0U; yidx<dimension; ++yidx){
for(auto xidx=0U; xidx<dimension; ++xidx){
auto& sw = switches[yidx*dimension+xidx];
if(xidx<dimension-1) {
auto& swr = switches[yidx*dimension+(xidx+1)];
for(auto yidx = 0U; yidx < dimension; ++yidx) {
for(auto xidx = 0U; xidx < dimension; ++xidx) {
auto& sw = switches[yidx * dimension + xidx];
if(xidx < dimension - 1) {
auto& swr = switches[yidx * dimension + (xidx + 1)];
sw->isck[RIGHT](swr->tsck[LEFT]);
swr->isck[LEFT](sw->tsck[RIGHT]);
}
if(yidx<dimension-1){
auto& swb = switches[(yidx+1)*dimension+xidx];
if(yidx < dimension - 1) {
auto& swb = switches[(yidx + 1) * dimension + xidx];
sw->isck[BOTTOM](swb->tsck[TOP]);
swb->isck[TOP](sw->tsck[BOTTOM]);
}
@@ -41,42 +42,42 @@ top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :s
}
auto yidx = 0U;
auto xidx = 0U;
for(xidx=0U; xidx<dimension; ++xidx){
auto name = format("snd_{}_{}", xidx+1, 0);
senders[TOP].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx+1, 0, count));
for(xidx = 0U; xidx < dimension; ++xidx) {
auto name = format("snd_{}_{}", xidx + 1, 0);
senders[TOP].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx + 1, 0, count));
auto& snd = senders[TOP].back();
snd->clk_i(clk);
auto& sw = switches[yidx*dimension+xidx];
auto& sw = switches[yidx * dimension + xidx];
snd->isck(sw->tsck[TOP]);
sw->isck[TOP](snd->tsck);
}
yidx=dimension-1;
for(xidx=0U; xidx<dimension; ++xidx){
auto name = format("snd_{}_{}", xidx+1, dimension+1);
senders[BOTTOM].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx+1, dimension+1, count));
yidx = dimension - 1;
for(xidx = 0U; xidx < dimension; ++xidx) {
auto name = format("snd_{}_{}", xidx + 1, dimension + 1);
senders[BOTTOM].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx + 1, dimension + 1, count));
auto& snd = senders[BOTTOM].back();
snd->clk_i(clk);
auto& sw = switches[yidx*dimension+xidx];
auto& sw = switches[yidx * dimension + xidx];
snd->isck(sw->tsck[BOTTOM]);
sw->isck[BOTTOM](snd->tsck);
}
xidx=0U;
for(yidx=0U; yidx<dimension; ++yidx){
auto name = format("snd_{}_{}", 0, yidx+1);
senders[LEFT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, 0, yidx+1, count));
xidx = 0U;
for(yidx = 0U; yidx < dimension; ++yidx) {
auto name = format("snd_{}_{}", 0, yidx + 1);
senders[LEFT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, 0, yidx + 1, count));
auto& snd = senders[LEFT].back();
snd->clk_i(clk);
auto& sw = switches[yidx*dimension+xidx];
auto& sw = switches[yidx * dimension + xidx];
snd->isck(sw->tsck[LEFT]);
sw->isck[LEFT](snd->tsck);
}
xidx=dimension-1;
for(yidx=0U; yidx<dimension; ++yidx){
auto name = format("snd_{}_{}", dimension+1, yidx+1);
senders[RIGHT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, dimension+1, yidx+1, count));
xidx = dimension - 1;
for(yidx = 0U; yidx < dimension; ++yidx) {
auto name = format("snd_{}_{}", dimension + 1, yidx + 1);
senders[RIGHT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, dimension + 1, yidx + 1, count));
auto& snd = senders[RIGHT].back();
snd->clk_i(clk);
auto& sw = switches[yidx*dimension+xidx];
auto& sw = switches[yidx * dimension + xidx];
snd->isck(sw->tsck[RIGHT]);
sw->isck[RIGHT](snd->tsck);
}
@@ -85,12 +86,11 @@ top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :s
void top::run() {
sc_event_and_list evt_list;
for(auto& sides:senders) {
for(auto& sender:sides){
evt_list&=sender->get_finish_event();
for(auto& sides : senders) {
for(auto& sender : sides) {
evt_list &= sender->get_finish_event();
}
}
wait(evt_list);
sc_stop();
}

9
tests/sim_performance/top.h
View File

@@ -8,17 +8,18 @@
#ifndef _SIM_PERFORMANCE_TOP_H_
#define _SIM_PERFORMANCE_TOP_H_
#include <systemc>
#include <memory>
#include <vector>
#include "pkt_sender.h"
#include "pkt_switch.h"
#include "types.h"
#include <memory>
#include <systemc>
#include <vector>
class top: public sc_core::sc_module {
class top : public sc_core::sc_module {
public:
top(sc_core::sc_module_name const&, uint8_t, unsigned);
virtual ~top() = default;
private:
void run();
sc_core::sc_clock clk;

2
tests/sim_performance/types.h
View File

@@ -8,6 +8,6 @@
#ifndef TESTS_SIM_PERFORMANCE_TYPES_H_
#define TESTS_SIM_PERFORMANCE_TYPES_H_
enum {TOP=0, RIGHT=1, BOTTOM=2, LEFT=3, SIDES=4};
enum { TOP = 0, RIGHT = 1, BOTTOM = 2, LEFT = 3, SIDES = 4 };
#endif /* TESTS_SIM_PERFORMANCE_TYPES_H_ */