applies cklang-tidy fixes
This commit is contained in:
parent
288f0577f1
commit
b9c9e15166
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@ -1,4 +1,3 @@
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---
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Language: Cpp
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# BasedOnStyle: LLVM
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# should be in line with IndentWidth
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@ -13,8 +12,8 @@ AllowAllParametersOfDeclarationOnNextLine: true
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AllowShortBlocksOnASingleLine: false
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AllowShortCaseLabelsOnASingleLine: false
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AllowShortFunctionsOnASingleLine: All
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AllowShortIfStatementsOnASingleLine: true
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AllowShortLoopsOnASingleLine: true
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AllowShortIfStatementsOnASingleLine: false
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AllowShortLoopsOnASingleLine: false
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AlwaysBreakAfterDefinitionReturnType: None
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AlwaysBreakAfterReturnType: None
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AlwaysBreakBeforeMultilineStrings: false
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@ -39,8 +38,8 @@ BreakBeforeTernaryOperators: true
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BreakConstructorInitializersBeforeComma: true
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BreakAfterJavaFieldAnnotations: false
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BreakStringLiterals: true
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ColumnLimit: 120
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CommentPragmas: '^ IWYU pragma:'
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ColumnLimit: 140
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CommentPragmas: '^( IWYU pragma:| @suppress)'
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ConstructorInitializerAllOnOneLineOrOnePerLine: false
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ConstructorInitializerIndentWidth: 0
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ContinuationIndentWidth: 4
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@ -76,13 +75,13 @@ PenaltyBreakFirstLessLess: 120
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PenaltyBreakString: 1000
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PenaltyExcessCharacter: 1000000
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PenaltyReturnTypeOnItsOwnLine: 60
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PointerAlignment: Right
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PointerAlignment: Left
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ReflowComments: true
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SortIncludes: true
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SpaceAfterCStyleCast: false
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SpaceAfterTemplateKeyword: true
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SpaceBeforeAssignmentOperators: true
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SpaceBeforeParens: ControlStatements
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SpaceBeforeParens: Never
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SpaceInEmptyParentheses: false
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SpacesBeforeTrailingComments: 1
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SpacesInAngles: false
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@ -0,0 +1,3 @@
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---
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Checks: 'clang-diagnostic-*,clang-analyzer-*,clang-diagnostic-*,clang-analyzer-*'
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WarningsAsErrors: ''
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104
.cproject
104
.cproject
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@ -28,6 +28,42 @@
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</configuration>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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<storageModule buildDir="build/${ConfigName}" dirtyTs="1703253448607" moduleId="de.marw.cmake4eclipse.mbs.settings">
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<options/>
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<defs>
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<def name="CMAKE_BUILD_TYPE" type="STRING" val="Debug"/>
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<def name="BUILD_SCC_DOCUMENTATION" type="BOOL" val="OFF"/>
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<def name="ENABLE_CLANG_TIDY" type="STRING" val="ON"/>
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</defs>
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</storageModule>
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</cconfiguration>
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<cconfiguration id="cmake4eclipse.mbs.toolchain.cmake.134761605.1785168986">
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<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cmake4eclipse.mbs.toolchain.cmake.134761605.1785168986" moduleId="org.eclipse.cdt.core.settings" name="Release">
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<externalSettings/>
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<extensions>
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<extension id="org.eclipse.cdt.core.PE64" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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</extensions>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<configuration artifactName="${ProjName}" buildProperties="" description="" id="cmake4eclipse.mbs.toolchain.cmake.134761605.1785168986" name="Release" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=" parent="org.eclipse.cdt.build.core.emptycfg">
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<folderInfo id="cmake4eclipse.mbs.toolchain.cmake.134761605.1785168986." name="/" resourcePath="">
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<toolChain id="cmake4eclipse.mbs.toolchain.cmake.16485475" name="CMake driven" superClass="cmake4eclipse.mbs.toolchain.cmake">
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<targetPlatform id="cmake4eclipse.mbs.targetPlatform.cmake.1713261153" name="Any Platform" superClass="cmake4eclipse.mbs.targetPlatform.cmake"/>
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<builder buildPath="/SystemC-Components-Test/build/Debug" id="cmake4eclipse.mbs.builder.322228822" keepEnvironmentInBuildfile="false" name="CMake Builder" superClass="cmake4eclipse.mbs.builder"/>
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<tool id="cmake4eclipse.mbs.toolchain.tool.dummy.944613359" name="CMake" superClass="cmake4eclipse.mbs.toolchain.tool.dummy">
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<inputType id="cmake4eclipse.mbs.inputType.c.1854920030" superClass="cmake4eclipse.mbs.inputType.c"/>
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<inputType id="cmake4eclipse.mbs.inputType.cpp.525905746" superClass="cmake4eclipse.mbs.inputType.cpp"/>
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</tool>
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</toolChain>
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</folderInfo>
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</configuration>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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<storageModule buildDir="build/${ConfigName}" dirtyTs="1673562408113" moduleId="de.marw.cmake4eclipse.mbs.settings">
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<options/>
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<defs>
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@ -36,26 +72,56 @@
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</defs>
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</storageModule>
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</cconfiguration>
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<cconfiguration id="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022">
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<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022" moduleId="org.eclipse.cdt.core.settings" name="ClangTidy">
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<externalSettings/>
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<extensions>
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<extension id="org.eclipse.cdt.core.PE64" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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</extensions>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<configuration artifactName="${ProjName}" buildProperties="" description="" id="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022" name="ClangTidy" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.dockerdpath=,org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.connection=ssh://eyck@kraftwerk02:22" parent="org.eclipse.cdt.build.core.emptycfg">
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<folderInfo id="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022." name="/" resourcePath="">
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<toolChain id="cmake4eclipse.mbs.toolchain.cmake.1529597056" name="CMake driven" superClass="cmake4eclipse.mbs.toolchain.cmake">
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<targetPlatform id="cmake4eclipse.mbs.targetPlatform.cmake.157305521" name="Any Platform" superClass="cmake4eclipse.mbs.targetPlatform.cmake"/>
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<builder buildPath="/SystemC-Components-Test/build/Debug" id="cmake4eclipse.mbs.builder.407860995" keepEnvironmentInBuildfile="false" name="CMake Builder" superClass="cmake4eclipse.mbs.builder"/>
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<tool id="cmake4eclipse.mbs.toolchain.tool.dummy.1269675407" name="CMake" superClass="cmake4eclipse.mbs.toolchain.tool.dummy">
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<inputType id="cmake4eclipse.mbs.inputType.c.2145364949" superClass="cmake4eclipse.mbs.inputType.c"/>
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<inputType id="cmake4eclipse.mbs.inputType.cpp.143816444" superClass="cmake4eclipse.mbs.inputType.cpp"/>
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</tool>
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</toolChain>
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</folderInfo>
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</configuration>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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<storageModule buildDir="build/${ConfigName}" dirtyTs="1703253448607" moduleId="de.marw.cmake4eclipse.mbs.settings">
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<options/>
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<defs>
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<def name="CMAKE_BUILD_TYPE" type="STRING" val="Debug"/>
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<def name="BUILD_SCC_DOCUMENTATION" type="BOOL" val="OFF"/>
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<def name="ENABLE_CLANG_TIDY" type="STRING" val="ON"/>
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</defs>
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</storageModule>
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</cconfiguration>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<project id="SystemC-Components-Test.null.276784792" name="SystemC-Components-Test"/>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
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<storageModule moduleId="refreshScope" versionNumber="2">
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<configuration configurationName="ClangTidy">
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<resource resourceType="PROJECT" workspacePath="/SystemC-Components-Test"/>
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</configuration>
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<configuration configurationName="Default">
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<resource resourceType="PROJECT" workspacePath="/SystemC-Components-Test"/>
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</configuration>
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<configuration configurationName="Debug"/>
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</storageModule>
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<storageModule moduleId="scannerConfiguration">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605;cmake4eclipse.mbs.toolchain.cmake.134761605.1159094612;cmake4eclipse.mbs.toolchain.tool.dummy.326050058;cmake4eclipse.mbs.inputType.cpp.459033018">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605;cmake4eclipse.mbs.toolchain.cmake.134761605.1159094612;cmake4eclipse.mbs.toolchain.tool.dummy.326050058;cmake4eclipse.mbs.inputType.c.1524512146">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
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<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets">
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<buildTargets>
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@ -69,4 +135,24 @@
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</target>
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</buildTargets>
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</storageModule>
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<storageModule cmakelistsFolder="" moduleId="de.marw.cmake4eclipse.mbs.settings">
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<targets>
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<target name=""/>
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</targets>
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</storageModule>
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<storageModule moduleId="scannerConfiguration">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605;cmake4eclipse.mbs.toolchain.cmake.134761605.1159094612;cmake4eclipse.mbs.toolchain.tool.dummy.326050058;cmake4eclipse.mbs.inputType.c.1524512146">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022;cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022.;cmake4eclipse.mbs.toolchain.tool.dummy.1269675407;cmake4eclipse.mbs.inputType.c.2145364949">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605;cmake4eclipse.mbs.toolchain.cmake.134761605.1159094612;cmake4eclipse.mbs.toolchain.tool.dummy.326050058;cmake4eclipse.mbs.inputType.cpp.459033018">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022;cmake4eclipse.mbs.toolchain.cmake.134761605.1198783022.;cmake4eclipse.mbs.toolchain.tool.dummy.1269675407;cmake4eclipse.mbs.inputType.cpp.143816444">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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</storageModule>
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</cproject>
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@ -43,3 +43,4 @@
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/*.fst
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/*.gtkw
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/.envrc.*
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/.direnv/
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@ -42,21 +42,21 @@ if(ENABLE_COVERAGE)
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set(COVERAGE_EXCLUDES "osci-lib/scc/*" "/engr/dev/tools/*")
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endif()
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find_program(CLANG_TIDY_EXE NAMES "clang-tidy-9")
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find_program(CLANG_TIDY_EXE NAMES "clang-tidy")
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if(ENABLE_CLANG_TIDY)
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if(CLANG_TIDY_EXE)
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message(STATUS "clang-tidy found: ${CLANG_TIDY_EXE}")
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set(CLANG_TIDY_CHECKS "-*,modernize-*,-modernize-use-trailing-return-type,clang-analyzer-core.*,clang-analyzer-cplusplus.*")
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set(CMAKE_CXX_CLANG_TIDY
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${CLANG_TIDY_EXE};
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-checks=${CLANG_TIDY_CHECKS};
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-fix;)
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else()
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message(AUTHOR_WARNING "clang-tidy not found!")
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set(CMAKE_CXX_CLANG_TIDY "" CACHE STRING "" FORCE) # delete it
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endif()
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if(CLANG_TIDY_EXE)
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message(STATUS "clang-tidy found: ${CLANG_TIDY_EXE}")
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#set(CLANG_TIDY_CHECKS "-*,modernize-*,-modernize-use-trailing-return-type,clang-analyzer-core.*,clang-analyzer-cplusplus.*")
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set(CMAKE_CXX_CLANG_TIDY ${CLANG_TIDY_EXE};-fix)
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else()
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message(AUTHOR_WARNING "clang-tidy not found!")
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set(CMAKE_CXX_CLANG_TIDY "" CACHE STRING "" FORCE) # delete it
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endif()
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endif()
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set(CLANG_FORMAT_EXCLUDE_PATTERNS "/third_party/")
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find_package(ClangFormat)
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set(CONAN_CMAKE_SILENT_OUTPUT ON)
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conan_check()
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conan_configure(REQUIRES fmt/8.0.1 spdlog/1.9.2 boost/1.75.0 gsl-lite/0.37.0 systemc/2.3.3 catch2/3.1.0 zlib/1.2.11 lz4/1.9.4
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2
scc
2
scc
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@ -1 +1 @@
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Subproject commit ffa0f2f7ef98790984fa3786c36b8778c5b52237
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Subproject commit 6063f8da997247d68aec9422e39c93458f18bba0
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@ -7,39 +7,33 @@ auto factory::get_instance() -> factory& {
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return instance;
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}
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factory::factory() :
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m_constructors{},
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m_objects{}
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{ }
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factory::factory()
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: m_constructors{}
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, m_objects{} {}
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void factory::create() {
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for (const auto& item : m_constructors) {
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for(const auto& item : m_constructors) {
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m_objects[item.first] = item.second();
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}
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}
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void factory::destroy() {
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m_objects.clear();
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}
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void factory::destroy() { m_objects.clear(); }
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void factory::add_object(const std::string& name, constructor create) {
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auto it = m_constructors.find(name);
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if (it == m_constructors.cend()) {
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if(it == m_constructors.cend()) {
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m_constructors[name] = create;
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}
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else {
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throw std::runtime_error("factory::add(): "
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+ name + " object already exist in factory");
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} else {
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throw std::runtime_error("factory::add(): " + name + " object already exist in factory");
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}
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}
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auto factory::get_object(const std::string& name) -> void* {
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auto it = m_objects.find(name);
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if (it == m_objects.cend()) {
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throw std::runtime_error("factory::get(): "
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+ name + " object doesn't exist in factory");
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if(it == m_objects.cend()) {
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throw std::runtime_error("factory::get(): " + name + " object doesn't exist in factory");
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}
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return it->second.get();
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@ -9,29 +9,28 @@
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#ifndef SRC_FACTORY_H_
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#define SRC_FACTORY_H_
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#include <map>
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#include <string>
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#include <memory>
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#include <functional>
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#include <map>
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#include <memory>
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#include <string>
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class factory {
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public:
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static factory& get_instance();
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template<typename T, typename ...Args>
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class add {
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template <typename T, typename... Args> class add {
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public:
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add(Args&&... args);
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add(const std::string& name, Args&&... args);
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};
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template<typename T>
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static T& get(const std::string& name = "");
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template <typename T> static T& get(const std::string& name = "");
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void create();
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void destroy();
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private:
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using destructor = std::function<void(void*)>;
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using object = std::unique_ptr<void, destructor>;
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@ -51,27 +50,15 @@ private:
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std::map<std::string, object> m_objects;
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};
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template<typename T, typename ...Args>
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factory::add<T, Args...>::add(Args&&... args) {
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add("", args...);
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template <typename T, typename... Args> factory::add<T, Args...>::add(Args&&... args) { add("", args...); }
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template <typename T, typename... Args> factory::add<T, Args...>::add(const std::string& name, Args&&... args) {
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factory::get_instance().add_object(name, [args...]() -> object {
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return object{new T(std::forward<Args>(args)...), [](void* obj) { delete static_cast<T*>(obj); }};
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});
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}
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template<typename T, typename ...Args>
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factory::add<T, Args...>::add(const std::string& name, Args&&... args) {
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factory::get_instance().add_object(name,
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[args...] () -> object {
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return object{
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new T(std::forward<Args>(args)...),
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[] (void* obj) {
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delete static_cast<T*>(obj);
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}
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};
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}
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);
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}
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template<typename T> auto
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factory::get(const std::string& name) -> T& {
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template <typename T> auto factory::get(const std::string& name) -> T& {
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return *static_cast<T*>(factory::get_instance().get_object(name));
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}
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@ -7,26 +7,26 @@
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|||
|
||||
#include "factory.h"
|
||||
#include <catch2/catch_session.hpp>
|
||||
#include <cstdlib>
|
||||
#include <scc/report.h>
|
||||
#include <scc/trace.h>
|
||||
#include <scc/tracer.h>
|
||||
#include <util/ities.h>
|
||||
#include <cstdlib>
|
||||
|
||||
using namespace scc;
|
||||
using namespace sc_core;
|
||||
|
||||
int sc_main(int argc, char* argv[]) {
|
||||
auto my_name = util::split(argv[0], '/').back();
|
||||
scc::init_logging(LogConfig().logLevel(getenv("SCC_TEST_VERBOSE")?log::DEBUG:log::FATAL).logAsync(false));
|
||||
scc::init_logging(LogConfig().logLevel(getenv("SCC_TEST_VERBOSE") ? log::DEBUG : log::FATAL).logAsync(false));
|
||||
// create tracer if environment variable SCC_TEST_TRACE is defined
|
||||
std::unique_ptr<scc::tracer> tracer;
|
||||
if(getenv("SCC_TEST_TRACE"))
|
||||
tracer=std::make_unique<scc::tracer>(my_name, scc::tracer::file_type::TEXT, true);
|
||||
tracer = std::make_unique<scc::tracer>(my_name, scc::tracer::file_type::TEXT, true);
|
||||
// instantiate design(s)
|
||||
factory::get_instance().create();
|
||||
// run tests
|
||||
int result = Catch::Session().run( argc, argv );
|
||||
int result = Catch::Session().run(argc, argv);
|
||||
// destroy design(s)
|
||||
sc_stop();
|
||||
factory::get_instance().destroy();
|
||||
|
|
|
@ -10,14 +10,14 @@ using namespace sc_core;
|
|||
|
||||
factory::add<testbench> tb;
|
||||
|
||||
int snoop_id=0;
|
||||
int snoop_id = 0;
|
||||
|
||||
bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b){
|
||||
bool is_equal(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b) {
|
||||
auto ret = true;
|
||||
ret &= a.get_command() == b.get_command();
|
||||
ret &= a.get_address() == b.get_address();
|
||||
ret &= a.get_data_length() == b.get_data_length();
|
||||
for(auto i=0u; i<a.get_data_length(); ++i)
|
||||
for(auto i = 0u; i < a.get_data_length(); ++i)
|
||||
ret &= a.get_data_ptr()[i] == b.get_data_ptr()[i];
|
||||
// if(a.get_byte_enable_ptr() && b.get_byte_enable_ptr()) {
|
||||
// ret &= a.get_byte_enable_length() == b.get_byte_enable_length();
|
||||
|
@ -25,11 +25,11 @@ bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload cons
|
|||
// ret &= a.get_byte_enable_ptr()[i] == b.get_byte_enable_ptr()[i];
|
||||
// }
|
||||
ret &= a.get_command() == b.get_command();
|
||||
//if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
// if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
return ret;
|
||||
}
|
||||
|
||||
template<typename bus_cfg>
|
||||
template <typename bus_cfg>
|
||||
tlm::tlm_generic_payload* prepare_trans_ace(uint64_t start_address, unsigned addr_incr, unsigned len, unsigned width, unsigned id) {
|
||||
auto trans = tlm::scc::tlm_mm<>::get().allocate<axi::ace_extension>(len);
|
||||
trans->set_address(start_address);
|
||||
|
@ -39,54 +39,51 @@ tlm::tlm_generic_payload* prepare_trans_ace(uint64_t start_address, unsigned add
|
|||
trans->set_streaming_width(len);
|
||||
ext->set_size(scc::ilog2(width));
|
||||
sc_assert(len < (bus_cfg::BUSWIDTH / 8) || len % (bus_cfg::BUSWIDTH / 8) == 0);
|
||||
auto length = (len * 8 - 1) / (8*width);
|
||||
if(width==(bus_cfg::BUSWIDTH / 8) && start_address % (bus_cfg::BUSWIDTH / 8))
|
||||
auto length = (len * 8 - 1) / (8 * width);
|
||||
if(width == (bus_cfg::BUSWIDTH / 8) && start_address % (bus_cfg::BUSWIDTH / 8))
|
||||
length++;
|
||||
ext->set_length(length);
|
||||
// ext->set_burst(len * 8 > bus_cfg::buswidth ? axi::burst_e::INCR : axi::burst_e::FIXED);
|
||||
// here len is CachelineSizeBytes
|
||||
// here burtst for read/write_trans and snoop_trans are different
|
||||
ext->set_burst(axi::burst_e::INCR); //TBD???
|
||||
//ext->set_burst(len*8 > bus_cfg::BUSWIDTH ? axi::burst_e::WRAP : axi::burst_e::INCR);
|
||||
ext->set_burst(axi::burst_e::INCR); // TBD???
|
||||
// ext->set_burst(len*8 > bus_cfg::BUSWIDTH ? axi::burst_e::WRAP : axi::burst_e::INCR);
|
||||
ext->set_id(id);
|
||||
ext->set_snoop(axi::snoop_e::READ_SHARED); // set it so that is_data_less return true???
|
||||
return trans;
|
||||
}
|
||||
|
||||
inline void randomize(tlm::tlm_generic_payload& gp) {
|
||||
static uint8_t req_cnt{0};
|
||||
auto addr = gp.get_address();
|
||||
uint8_t const* src = reinterpret_cast<uint8_t const*>(&addr);
|
||||
static uint8_t req_cnt{0};
|
||||
for(size_t i = 0; i < gp.get_data_length(); ++i) {
|
||||
*(gp.get_data_ptr() + i) = i % 2 ? i : req_cnt;
|
||||
}
|
||||
req_cnt++;
|
||||
}
|
||||
|
||||
template<typename STATE>
|
||||
unsigned run_scenario(STATE& state){
|
||||
template <typename STATE> unsigned run_scenario(STATE& state) {
|
||||
auto& dut = factory::get<testbench>();
|
||||
|
||||
dut.axi_tgt_pe.set_operation_cb([&state](axi::axi_protocol_types::tlm_payload_type& trans) -> unsigned {
|
||||
auto id = axi::get_axi_id(trans);
|
||||
if(trans.is_read()) {
|
||||
for(size_t i = 0; i < trans.get_data_length(); ++i) {
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? 123 : (state.resp_cnt+128);
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? 123 : (state.resp_cnt + 128);
|
||||
}
|
||||
state.read_tx[id].second.emplace_back(&trans);
|
||||
}
|
||||
if(trans.is_write())
|
||||
state.write_tx[id].second.emplace_back(&trans);
|
||||
SCCDEBUG(__FUNCTION__)<<"RX: "<<trans;
|
||||
SCCDEBUG(__FUNCTION__) << "RX: " << trans;
|
||||
state.resp_cnt++;
|
||||
return 0;
|
||||
});
|
||||
dut.transport_cb = [&state](tlm::tlm_generic_payload& trans) -> unsigned {
|
||||
SCCDEBUG(__FUNCTION__)<<" update snoop trans, with snoop_id = " << snoop_id;
|
||||
SCCDEBUG(__FUNCTION__) << " update snoop trans, with snoop_id = " << snoop_id;
|
||||
// extracting address and snoop_e from ac_trans and pack them into cache data trans
|
||||
auto ac_address = trans.get_address();
|
||||
auto ext = trans.get_extension<ace_extension>();
|
||||
auto ac_snoop=ext->get_snoop();
|
||||
auto ac_snoop = ext->get_snoop();
|
||||
for(size_t i = 0; i < trans.get_data_length(); ++i) {
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? i : 128;
|
||||
}
|
||||
|
@ -95,80 +92,84 @@ unsigned run_scenario(STATE& state){
|
|||
};
|
||||
|
||||
dut.rst.write(false);
|
||||
sc_start(state.ResetCycles*dut.clk.period());
|
||||
sc_start(state.ResetCycles * dut.clk.period());
|
||||
dut.rst.write(true);
|
||||
sc_start(dut.clk.period());
|
||||
|
||||
auto run1 = sc_spawn([&dut, &state](){
|
||||
auto run1 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x0};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
// tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
// tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4,
|
||||
// state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.read_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
|
||||
auto run2 = sc_spawn([&dut, &state](){
|
||||
auto run2 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x2000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 2);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 2);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run2, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run2, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.write_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
auto run3 = sc_spawn([&dut, &state](){
|
||||
auto run3 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x1000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 3);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 3);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run3, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run3, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.read_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
auto run4 = sc_spawn([&dut, &state](){
|
||||
auto run4 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x3000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 4);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 4);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run4, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run4, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.write_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
|
||||
|
||||
auto run5 = sc_spawn([&dut, &state](){
|
||||
unsigned int StartAddr{0x0};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.CachelineSizeBytes, state.BurstSizeBytes, 5);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i << "snoop_id = " << snoop_id <<" TX: "<<*trans;
|
||||
dut.ace_tgt_pe.snoop(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, after iteration "<< i ;
|
||||
state.snoop_tx[snoop_id].first.emplace_back(trans);
|
||||
snoop_id++;
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
|
||||
auto run5 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x0};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans_ace<testbench::bus_cfg>(StartAddr, 4, state.CachelineSizeBytes, state.BurstSizeBytes, 5);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i << "snoop_id = " << snoop_id << " TX: " << *trans;
|
||||
dut.ace_tgt_pe.snoop(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, after iteration " << i;
|
||||
state.snoop_tx[snoop_id].first.emplace_back(trans);
|
||||
snoop_id++;
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
|
||||
unsigned cycles{0};
|
||||
while(cycles<1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())){
|
||||
// while(cycles<1000 && !(run5.terminated())){
|
||||
while(cycles < 1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())) {
|
||||
// while(cycles<1000 && !(run5.terminated())){
|
||||
sc_start(10 * dut.clk.period());
|
||||
cycles+=10;
|
||||
cycles += 10;
|
||||
}
|
||||
return cycles;
|
||||
}
|
||||
|
@ -179,59 +180,59 @@ TEST_CASE("ace_burst_alignment", "[AXI][pin-level]") {
|
|||
unsigned int BurstLengthByte{16};
|
||||
unsigned int BurstSizeBytes{8};
|
||||
unsigned int NumberOfIterations{2};
|
||||
unsigned int CachelineSizeBytes={64}; //
|
||||
unsigned int CachelineSizeBytes = {64}; //
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> read_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> snoop_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
snoop_tx;
|
||||
unsigned resp_cnt{0};
|
||||
} state;
|
||||
|
||||
state.resp_cnt=0;
|
||||
state.resp_cnt = 0;
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
// REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
// REQUIRE(state.resp_cnt==1*state.NumberOfIterations);
|
||||
for(auto& e: state.write_tx) {
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
// REQUIRE(state.resp_cnt==1*state.NumberOfIterations);
|
||||
for(auto& e : state.write_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i) {
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
for(auto& e: state.read_tx) {
|
||||
for(auto& e : state.read_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i){
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
SCCDEBUG(__FUNCTION__) << " index = " << i ;
|
||||
// SCCDEBUG(__FUNCTION__) <<" send value = "<<*send_tx[i];
|
||||
// SCCDEBUG(__FUNCTION__) <<" received value = "<<*recv_tx[i];
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
SCCDEBUG(__FUNCTION__) << " index = " << i;
|
||||
// SCCDEBUG(__FUNCTION__) <<" send value = "<<*send_tx[i];
|
||||
// SCCDEBUG(__FUNCTION__) <<" received value = "<<*recv_tx[i];
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
|
||||
for(auto& e: state.snoop_tx) {
|
||||
for(auto& e : state.snoop_tx) {
|
||||
auto const& snoop_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(snoop_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<snoop_tx.size(); ++i){
|
||||
for(auto i = 0; i < snoop_tx.size(); ++i) {
|
||||
REQUIRE(snoop_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
SCCDEBUG(__FUNCTION__) << " index = " << i ;
|
||||
SCCDEBUG(__FUNCTION__) <<" send snoop value = "<<*snoop_tx[i];
|
||||
SCCDEBUG(__FUNCTION__) <<" received value = "<<*recv_tx[i];
|
||||
// CHECK(*snoop_tx[i] == *recv_tx[i]);
|
||||
SCCDEBUG(__FUNCTION__) << " index = " << i;
|
||||
SCCDEBUG(__FUNCTION__) << " send snoop value = " << *snoop_tx[i];
|
||||
SCCDEBUG(__FUNCTION__) << " received value = " << *recv_tx[i];
|
||||
// CHECK(*snoop_tx[i] == *recv_tx[i]);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
TEST_CASE("ace_narrow_burst", "[AXI][pin-level]") {
|
||||
|
@ -240,37 +241,35 @@ TEST_CASE("ace_narrow_burst", "[AXI][pin-level]") {
|
|||
unsigned int BurstLengthByte{16};
|
||||
unsigned int BurstSizeBytes{8};
|
||||
unsigned int NumberOfIterations{2};
|
||||
unsigned int CachelineSizeBytes={64}; //
|
||||
unsigned int CachelineSizeBytes = {64}; //
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> read_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> snoop_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
snoop_tx;
|
||||
unsigned resp_cnt{0};
|
||||
} state;
|
||||
|
||||
state.resp_cnt=0;
|
||||
state.resp_cnt = 0;
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
for(auto& e: state.write_tx) {
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
for(auto& e : state.write_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
for(auto& e: state.read_tx) {
|
||||
for(auto& e : state.read_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
#define _TESTBENCH_H_
|
||||
|
||||
#include <axi/pe/axi_initiator.h>
|
||||
#include <axi/pe/simple_target.h>
|
||||
#include <axi/pe/simple_ace_target.h>
|
||||
#include <axi/pe/simple_target.h>
|
||||
#include <axi/pin/ace_initiator.h>
|
||||
#include <axi/pin/ace_target.h>
|
||||
#include <axi/scv/recorder_modules.h>
|
||||
|
@ -13,10 +13,9 @@ using namespace sc_core;
|
|||
using namespace axi;
|
||||
using namespace axi::pe;
|
||||
|
||||
class testbench : public sc_core::sc_module
|
||||
,public tlm::scc::pe::intor_bw_b {
|
||||
class testbench : public sc_core::sc_module, public tlm::scc::pe::intor_bw_b {
|
||||
public:
|
||||
using bus_cfg = axi::ace_cfg</*BUSWIDTH=*/64, /*ADDRWIDTH=*/32, /*IDWIDTH=*/4, /*USERWIDTH=*/1,/*CACHELINE*/64>;
|
||||
using bus_cfg = axi::ace_cfg</*BUSWIDTH=*/64, /*ADDRWIDTH=*/32, /*IDWIDTH=*/4, /*USERWIDTH=*/1, /*CACHELINE*/ 64>;
|
||||
|
||||
sc_core::sc_time clk_period{10, sc_core::SC_NS};
|
||||
sc_core::sc_clock clk{"clk", clk_period, 0.5, sc_core::SC_ZERO_TIME, true};
|
||||
|
@ -47,7 +46,8 @@ public:
|
|||
|
||||
public:
|
||||
SC_HAS_PROCESS(testbench);
|
||||
testbench(): testbench("testbench") {}
|
||||
testbench()
|
||||
: testbench("testbench") {}
|
||||
testbench(sc_core::sc_module_name nm)
|
||||
: sc_core::sc_module(nm)
|
||||
, intor_pe("ace_intor_pe", intor)
|
||||
|
@ -90,10 +90,14 @@ public:
|
|||
ace_tgt_pe.isckt_axi(tgt_axi);
|
||||
// for updating snooop transaction
|
||||
intor_pe.bw_o(bw_i);
|
||||
|
||||
}
|
||||
|
||||
unsigned transport(tlm::tlm_generic_payload& trans) override { if(transport_cb) return transport_cb(trans); else return 0;}
|
||||
unsigned transport(tlm::tlm_generic_payload& trans) override {
|
||||
if(transport_cb)
|
||||
return transport_cb(trans);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
std::function<unsigned(tlm::tlm_generic_payload&)> transport_cb;
|
||||
};
|
||||
|
||||
|
|
|
@ -10,13 +10,12 @@ using namespace sc_core;
|
|||
using namespace ahb;
|
||||
|
||||
factory::add<testbench> tb;
|
||||
|
||||
bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b){
|
||||
bool is_equal(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b) {
|
||||
auto ret = true;
|
||||
ret &= a.get_command() == b.get_command();
|
||||
ret &= a.get_address() == b.get_address();
|
||||
ret &= a.get_data_length() == b.get_data_length();
|
||||
for(auto i=0u; i<a.get_data_length(); ++i)
|
||||
for(auto i = 0u; i < a.get_data_length(); ++i)
|
||||
ret &= a.get_data_ptr()[i] == b.get_data_ptr()[i];
|
||||
// if(a.get_byte_enable_ptr() && b.get_byte_enable_ptr()) {
|
||||
// ret &= a.get_byte_enable_length() == b.get_byte_enable_length();
|
||||
|
@ -24,12 +23,10 @@ bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload cons
|
|||
// ret &= a.get_byte_enable_ptr()[i] == b.get_byte_enable_ptr()[i];
|
||||
// }
|
||||
ret &= a.get_command() == b.get_command();
|
||||
//if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
// if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
return ret;
|
||||
}
|
||||
|
||||
template<unsigned BUSWIDTH>
|
||||
tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned len, unsigned width) {
|
||||
template <unsigned BUSWIDTH> tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned len, unsigned width) {
|
||||
static unsigned id{0};
|
||||
auto trans = tlm::scc::tlm_mm<>::get().allocate<ahb::ahb_extension>(len);
|
||||
trans->set_address(start_address);
|
||||
|
@ -42,47 +39,44 @@ tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned len, un
|
|||
}
|
||||
|
||||
inline void randomize(tlm::tlm_generic_payload& gp) {
|
||||
static uint8_t req_cnt{0};
|
||||
auto addr = gp.get_address();
|
||||
uint8_t const* src = reinterpret_cast<uint8_t const*>(&addr);
|
||||
static uint8_t req_cnt{0};
|
||||
for(size_t i = 0; i < gp.get_data_length(); ++i) {
|
||||
*(gp.get_data_ptr() + i) = i % 2 ? i : req_cnt;
|
||||
}
|
||||
req_cnt++;
|
||||
}
|
||||
|
||||
template<typename STATE>
|
||||
unsigned run_scenario(STATE& state, unsigned wait_states = 0){
|
||||
template <typename STATE> unsigned run_scenario(STATE& state, unsigned wait_states = 0) {
|
||||
auto& dut = factory::get<testbench>();
|
||||
dut.tsck.register_b_transport([&state, wait_states](tlm::tlm_base_protocol_types::tlm_payload_type& trans, sc_core::sc_time& d) {
|
||||
if(trans.is_read()) {
|
||||
for(size_t i = 0; i < trans.get_data_length(); ++i) {
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? i : (state.resp_cnt+128);
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? i : (state.resp_cnt + 128);
|
||||
}
|
||||
state.read_tx.second.emplace_back(&trans);
|
||||
}
|
||||
if(trans.is_write())
|
||||
state.write_tx.second.emplace_back(&trans);
|
||||
SCCDEBUG(__FUNCTION__)<<"RX: "<<trans;
|
||||
for(unsigned i=0; i<wait_states; ++i)
|
||||
SCCDEBUG(__FUNCTION__) << "RX: " << trans;
|
||||
for(unsigned i = 0; i < wait_states; ++i)
|
||||
sc_core::wait(factory::get<testbench>().clk.posedge_event());
|
||||
state.resp_cnt++;
|
||||
return 0;
|
||||
});
|
||||
|
||||
dut.rst_n.write(false);
|
||||
sc_start(state.ResetCycles*dut.clk.period());
|
||||
sc_start(state.ResetCycles * dut.clk.period());
|
||||
dut.rst_n.write(true);
|
||||
sc_start(dut.clk.period());
|
||||
dut.HSEL.write(true);
|
||||
sc_start(dut.clk.period());
|
||||
|
||||
auto run1 = sc_spawn([&dut, &state](){
|
||||
auto run1 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x0};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::DWIDTH>(StartAddr, state.BurstLengthByte, state.BurstSizeBytes);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "task run1, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "task run1, iteration " << i << " TX: " << *trans;
|
||||
sc_core::sc_time d;
|
||||
dut.isck->b_transport(*trans, d);
|
||||
state.read_tx.first.emplace_back(trans);
|
||||
|
@ -90,13 +84,13 @@ unsigned run_scenario(STATE& state, unsigned wait_states = 0){
|
|||
}
|
||||
SCCDEBUG(__FUNCTION__) << "task run1 finished";
|
||||
});
|
||||
auto run2 = sc_spawn([&dut, &state](){
|
||||
auto run2 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x2000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::DWIDTH>(StartAddr, state.BurstLengthByte, state.BurstSizeBytes);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "task run2, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "task run2, iteration " << i << " TX: " << *trans;
|
||||
sc_core::sc_time d;
|
||||
dut.isck->b_transport(*trans, d);
|
||||
state.write_tx.first.emplace_back(trans);
|
||||
|
@ -104,12 +98,12 @@ unsigned run_scenario(STATE& state, unsigned wait_states = 0){
|
|||
}
|
||||
SCCDEBUG(__FUNCTION__) << "task run2 finished";
|
||||
});
|
||||
auto run3 = sc_spawn([&dut, &state](){
|
||||
auto run3 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x1000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::DWIDTH>(StartAddr, state.BurstLengthByte, state.BurstSizeBytes);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "task run3, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "task run3, iteration " << i << " TX: " << *trans;
|
||||
sc_core::sc_time d;
|
||||
dut.isck->b_transport(*trans, d);
|
||||
state.read_tx.first.emplace_back(trans);
|
||||
|
@ -117,13 +111,13 @@ unsigned run_scenario(STATE& state, unsigned wait_states = 0){
|
|||
}
|
||||
SCCDEBUG(__FUNCTION__) << "task run3 finished";
|
||||
});
|
||||
auto run4 = sc_spawn([&dut, &state](){
|
||||
auto run4 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x3000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::DWIDTH>(StartAddr, state.BurstLengthByte, state.BurstSizeBytes);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "task run4, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "task run4, iteration " << i << " TX: " << *trans;
|
||||
sc_core::sc_time d;
|
||||
dut.isck->b_transport(*trans, d);
|
||||
state.write_tx.first.emplace_back(trans);
|
||||
|
@ -133,9 +127,9 @@ unsigned run_scenario(STATE& state, unsigned wait_states = 0){
|
|||
});
|
||||
|
||||
unsigned cycles{0};
|
||||
while(cycles<1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())){
|
||||
while(cycles < 1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())) {
|
||||
sc_start(10 * dut.clk.period());
|
||||
cycles+=10;
|
||||
cycles += 10;
|
||||
}
|
||||
return cycles;
|
||||
}
|
||||
|
@ -153,19 +147,19 @@ TEST_CASE("ahb_read_write", "[AHB][pin-level]") {
|
|||
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
{
|
||||
auto& e = state.write_tx;
|
||||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i) {
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
{
|
||||
|
@ -173,9 +167,9 @@ TEST_CASE("ahb_read_write", "[AHB][pin-level]") {
|
|||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i){
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -193,28 +187,26 @@ TEST_CASE("ahb_narrow_read_write", "[AHB][pin-level]") {
|
|||
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
{
|
||||
auto& e = state.write_tx;
|
||||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
{
|
||||
auto& e = state.read_tx;
|
||||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -231,19 +223,19 @@ TEST_CASE("ahb_delayed_read_write", "[AHB][pin-level]") {
|
|||
|
||||
auto cycles = run_scenario(state, 1);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
{
|
||||
auto& e = state.write_tx;
|
||||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i) {
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
{
|
||||
|
@ -251,10 +243,9 @@ TEST_CASE("ahb_delayed_read_write", "[AHB][pin-level]") {
|
|||
auto const& send_tx = e.first;
|
||||
auto const& recv_tx = e.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i){
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -9,7 +9,7 @@ using namespace sc_core;
|
|||
|
||||
class testbench : public sc_core::sc_module {
|
||||
public:
|
||||
enum { DWIDTH = 32};
|
||||
enum { DWIDTH = 32 };
|
||||
sc_core::sc_time clk_period{10, sc_core::SC_NS};
|
||||
sc_core::sc_clock clk{"clk", clk_period, 0.5, sc_core::SC_ZERO_TIME, true};
|
||||
sc_core::sc_signal<bool> rst_n{"rst_n"};
|
||||
|
@ -35,7 +35,8 @@ public:
|
|||
|
||||
public:
|
||||
SC_HAS_PROCESS(testbench);
|
||||
testbench(): testbench("testbench") {}
|
||||
testbench()
|
||||
: testbench("testbench") {}
|
||||
testbench(sc_core::sc_module_name nm)
|
||||
: sc_core::sc_module(nm) {
|
||||
intor_bfm.HCLK_i(clk);
|
||||
|
@ -71,9 +72,7 @@ public:
|
|||
tgt_bfm.isckt(tsck);
|
||||
}
|
||||
|
||||
|
||||
void run1() {
|
||||
}
|
||||
void run1() {}
|
||||
};
|
||||
|
||||
#endif // _TESTBENCH_H_
|
||||
|
|
|
@ -10,12 +10,12 @@ using namespace sc_core;
|
|||
|
||||
factory::add<testbench> tb;
|
||||
|
||||
bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b){
|
||||
bool is_equal(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload const& b) {
|
||||
auto ret = true;
|
||||
ret &= a.get_command() == b.get_command();
|
||||
ret &= a.get_address() == b.get_address();
|
||||
ret &= a.get_data_length() == b.get_data_length();
|
||||
for(auto i=0u; i<a.get_data_length(); ++i)
|
||||
for(auto i = 0u; i < a.get_data_length(); ++i)
|
||||
ret &= a.get_data_ptr()[i] == b.get_data_ptr()[i];
|
||||
// if(a.get_byte_enable_ptr() && b.get_byte_enable_ptr()) {
|
||||
// ret &= a.get_byte_enable_length() == b.get_byte_enable_length();
|
||||
|
@ -23,11 +23,11 @@ bool operator==(tlm::tlm_generic_payload const& a, tlm::tlm_generic_payload cons
|
|||
// ret &= a.get_byte_enable_ptr()[i] == b.get_byte_enable_ptr()[i];
|
||||
// }
|
||||
ret &= a.get_command() == b.get_command();
|
||||
//if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
// if(!ret) SCCWARN()<<"Comparison failed: "<<a<<" and "<<b;
|
||||
return ret;
|
||||
}
|
||||
|
||||
template<typename bus_cfg>
|
||||
template <typename bus_cfg>
|
||||
tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned addr_incr, unsigned len, unsigned width, unsigned id) {
|
||||
auto trans = tlm::scc::tlm_mm<>::get().allocate<axi::axi4_extension>(len);
|
||||
trans->set_address(start_address);
|
||||
|
@ -37,8 +37,8 @@ tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned addr_in
|
|||
trans->set_streaming_width(len);
|
||||
ext->set_size(scc::ilog2(width));
|
||||
sc_assert(len < (bus_cfg::BUSWIDTH / 8) || len % (bus_cfg::BUSWIDTH / 8) == 0);
|
||||
auto length = (len * 8 - 1) / (8*width);
|
||||
if(width==(bus_cfg::BUSWIDTH / 8) && start_address % (bus_cfg::BUSWIDTH / 8))
|
||||
auto length = (len * 8 - 1) / (8 * width);
|
||||
if(width == (bus_cfg::BUSWIDTH / 8) && start_address % (bus_cfg::BUSWIDTH / 8))
|
||||
length++;
|
||||
ext->set_length(length);
|
||||
// ext->set_burst(len * 8 > bus_cfg::buswidth ? axi::burst_e::INCR : axi::burst_e::FIXED);
|
||||
|
@ -48,79 +48,80 @@ tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, unsigned addr_in
|
|||
}
|
||||
|
||||
inline void randomize(tlm::tlm_generic_payload& gp) {
|
||||
static uint8_t req_cnt{0};
|
||||
auto addr = gp.get_address();
|
||||
uint8_t const* src = reinterpret_cast<uint8_t const*>(&addr);
|
||||
static uint8_t req_cnt{0};
|
||||
for(size_t i = 0; i < gp.get_data_length(); ++i) {
|
||||
*(gp.get_data_ptr() + i) = i % 2 ? i : req_cnt;
|
||||
}
|
||||
req_cnt++;
|
||||
}
|
||||
|
||||
template<typename STATE>
|
||||
unsigned run_scenario(STATE& state){
|
||||
template <typename STATE> unsigned run_scenario(STATE& state) {
|
||||
auto& dut = factory::get<testbench>();
|
||||
dut.tgt_pe.set_operation_cb([&state](axi::axi_protocol_types::tlm_payload_type& trans) -> unsigned {
|
||||
auto id = axi::get_axi_id(trans);
|
||||
if(trans.is_read()) {
|
||||
for(size_t i = 0; i < trans.get_data_length(); ++i) {
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? i : (state.resp_cnt+128);
|
||||
*(trans.get_data_ptr() + i) = i % 2 ? i : (state.resp_cnt + 128);
|
||||
}
|
||||
state.read_tx[id].second.emplace_back(&trans);
|
||||
}
|
||||
if(trans.is_write())
|
||||
state.write_tx[id].second.emplace_back(&trans);
|
||||
SCCDEBUG(__FUNCTION__)<<"RX: "<<trans;
|
||||
SCCDEBUG(__FUNCTION__) << "RX: " << trans;
|
||||
state.resp_cnt++;
|
||||
return 0;
|
||||
});
|
||||
|
||||
dut.rst.write(false);
|
||||
sc_start(state.ResetCycles*dut.clk.period());
|
||||
sc_start(state.ResetCycles * dut.clk.period());
|
||||
dut.rst.write(true);
|
||||
sc_start(dut.clk.period());
|
||||
|
||||
auto run1 = sc_spawn([&dut, &state](){
|
||||
auto run1 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x0};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 1);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run1, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.read_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
auto run2 = sc_spawn([&dut, &state](){
|
||||
auto run2 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x2000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 2);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 2);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run2, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run2, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.write_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
auto run3 = sc_spawn([&dut, &state](){
|
||||
auto run3 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x1000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 3);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 3);
|
||||
trans->set_command(tlm::TLM_READ_COMMAND);
|
||||
SCCDEBUG(__FUNCTION__) << "run3, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run3, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.read_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
}
|
||||
});
|
||||
auto run4 = sc_spawn([&dut, &state](){
|
||||
auto run4 = sc_spawn([&dut, &state]() {
|
||||
unsigned int StartAddr{0x3000};
|
||||
for(int i = 0; i < state.NumberOfIterations; ++i) {
|
||||
tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 4);
|
||||
tlm::scc::tlm_gp_shared_ptr trans =
|
||||
prepare_trans<testbench::bus_cfg>(StartAddr, 4, state.BurstLengthByte, state.BurstSizeBytes, 4);
|
||||
trans->set_command(tlm::TLM_WRITE_COMMAND);
|
||||
randomize(*trans);
|
||||
SCCDEBUG(__FUNCTION__) << "run4, iteration " << i <<" TX: "<<*trans;
|
||||
SCCDEBUG(__FUNCTION__) << "run4, iteration " << i << " TX: " << *trans;
|
||||
dut.intor_pe.transport(*trans, false);
|
||||
state.write_tx[axi::get_axi_id(*trans)].first.emplace_back(trans);
|
||||
StartAddr += state.BurstSizeBytes;
|
||||
|
@ -128,9 +129,9 @@ unsigned run_scenario(STATE& state){
|
|||
});
|
||||
|
||||
unsigned cycles{0};
|
||||
while(cycles<1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())){
|
||||
while(cycles < 1000 && !(run1.terminated() && run2.terminated() && run3.terminated() && run4.terminated())) {
|
||||
sc_start(10 * dut.clk.period());
|
||||
cycles+=10;
|
||||
cycles += 10;
|
||||
}
|
||||
return cycles;
|
||||
}
|
||||
|
@ -142,34 +143,34 @@ TEST_CASE("axi4_burst_alignment", "[AXI][pin-level]") {
|
|||
unsigned int BurstSizeBytes{8};
|
||||
unsigned int NumberOfIterations{8};
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> read_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
write_tx;
|
||||
unsigned resp_cnt{0};
|
||||
} state;
|
||||
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
for(auto& e: state.write_tx) {
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
for(auto& e : state.write_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i) {
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
|
||||
}
|
||||
for(auto& e: state.read_tx) {
|
||||
for(auto& e : state.read_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i){
|
||||
for(auto i = 0; i < send_tx.size(); ++i) {
|
||||
REQUIRE(send_tx[i]->get_response_status() == tlm::TLM_OK_RESPONSE);
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -181,31 +182,30 @@ TEST_CASE("axi4_narrow_burst", "[AXI][pin-level]") {
|
|||
unsigned int BurstSizeBytes{4};
|
||||
unsigned int NumberOfIterations{8};
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> read_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>> write_tx;
|
||||
std::unordered_map<unsigned, std::pair<std::vector<tlm::scc::tlm_gp_shared_ptr>, std::vector<tlm::scc::tlm_gp_shared_ptr>>>
|
||||
write_tx;
|
||||
unsigned resp_cnt{0};
|
||||
} state;
|
||||
|
||||
auto cycles = run_scenario(state);
|
||||
|
||||
REQUIRE(cycles<1000);
|
||||
REQUIRE(cycles < 1000);
|
||||
REQUIRE(sc_report_handler::get_count(SC_ERROR) == 0);
|
||||
REQUIRE(sc_report_handler::get_count(SC_WARNING) == 0);
|
||||
|
||||
REQUIRE(state.resp_cnt==4*state.NumberOfIterations);
|
||||
for(auto& e: state.write_tx) {
|
||||
REQUIRE(state.resp_cnt == 4 * state.NumberOfIterations);
|
||||
for(auto& e : state.write_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
for(auto& e: state.read_tx) {
|
||||
for(auto& e : state.read_tx) {
|
||||
auto const& send_tx = e.second.first;
|
||||
auto const& recv_tx = e.second.second;
|
||||
REQUIRE(send_tx.size() == recv_tx.size());
|
||||
for(auto i = 0; i<send_tx.size(); ++i)
|
||||
CHECK(*send_tx[i] == *recv_tx[i]);
|
||||
|
||||
for(auto i = 0; i < send_tx.size(); ++i)
|
||||
CHECK(is_equal(*send_tx[i], *recv_tx[i]));
|
||||
}
|
||||
}
|
||||
|
|
|
@ -39,7 +39,8 @@ public:
|
|||
|
||||
public:
|
||||
SC_HAS_PROCESS(testbench);
|
||||
testbench(): testbench("testbench") {}
|
||||
testbench()
|
||||
: testbench("testbench") {}
|
||||
testbench(sc_core::sc_module_name nm)
|
||||
: sc_core::sc_module(nm)
|
||||
, intor_pe("intor_pe", intor)
|
||||
|
@ -70,9 +71,7 @@ public:
|
|||
tgt_rec.isckt(tgt);
|
||||
}
|
||||
|
||||
|
||||
void run1() {
|
||||
}
|
||||
void run1() {}
|
||||
};
|
||||
|
||||
#endif // _TESTBENCH_H_
|
||||
|
|
|
@ -32,10 +32,10 @@
|
|||
#define EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_INITIATOR_H_
|
||||
|
||||
#include <cci_configuration>
|
||||
#include <tlm>
|
||||
#include <string>
|
||||
#include <tlm_utils/simple_initiator_socket.h>
|
||||
#include <scc/report.h>
|
||||
#include <string>
|
||||
#include <tlm>
|
||||
#include <tlm_utils/simple_initiator_socket.h>
|
||||
|
||||
/**
|
||||
* @class initiator
|
||||
|
@ -46,7 +46,7 @@ SC_MODULE(initiator) {
|
|||
public:
|
||||
int data;
|
||||
|
||||
tlm_utils::simple_initiator_socket<initiator, 32> initiator_socket; ///< Instance of TLM2 simple initiator socket
|
||||
tlm_utils::simple_initiator_socket<initiator, 32> initiator_socket; ///< Instance of TLM2 simple initiator socket
|
||||
|
||||
/**
|
||||
* @fn initiator
|
||||
|
@ -54,13 +54,13 @@ public:
|
|||
* @return void
|
||||
*/
|
||||
SC_CTOR(initiator)
|
||||
:
|
||||
data(0), initiator_socket("initiator_socket"), initiator_ID("initiator_ID", "initiator_default") {
|
||||
: data(0)
|
||||
, initiator_socket("initiator_socket")
|
||||
, initiator_ID("initiator_ID", "initiator_default") {
|
||||
SCCINFO(SCMOD) << "[" << initiator_ID.get_value() << " C_TOR] ------- [INITIATOR CONSTRUCTOR BEGINS HERE] --------";
|
||||
|
||||
// initiator's SC_THREAD declaration
|
||||
SC_THREAD(run_initiator);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -69,18 +69,18 @@ public:
|
|||
* @return void
|
||||
*/
|
||||
void run_initiator(void) {
|
||||
tlm::tlm_generic_payload *trans = new tlm::tlm_generic_payload;
|
||||
tlm::tlm_generic_payload* trans = new tlm::tlm_generic_payload;
|
||||
|
||||
int i = 0;
|
||||
|
||||
static tlm::tlm_command cmds[8] =
|
||||
{ tlm::TLM_WRITE_COMMAND, tlm::TLM_READ_COMMAND, tlm::TLM_WRITE_COMMAND, tlm::TLM_READ_COMMAND, tlm::TLM_READ_COMMAND,
|
||||
tlm::TLM_READ_COMMAND, tlm::TLM_WRITE_COMMAND, tlm::TLM_WRITE_COMMAND };
|
||||
while (1) {
|
||||
static tlm::tlm_command cmds[8] = {tlm::TLM_WRITE_COMMAND, tlm::TLM_READ_COMMAND, tlm::TLM_WRITE_COMMAND, tlm::TLM_READ_COMMAND,
|
||||
tlm::TLM_READ_COMMAND, tlm::TLM_READ_COMMAND, tlm::TLM_WRITE_COMMAND, tlm::TLM_WRITE_COMMAND};
|
||||
while(1) {
|
||||
tlm::tlm_command cmd = cmds[(i >> 2) % 8];
|
||||
//static_cast<tlm::tlm_command>(cmd_dist(rng));
|
||||
// static_cast<tlm::tlm_command>(cmd_dist(rng));
|
||||
|
||||
if (cmd == tlm::TLM_WRITE_COMMAND) data = 0xFF000000 | i;
|
||||
if(cmd == tlm::TLM_WRITE_COMMAND)
|
||||
data = 0xFF000000 | i;
|
||||
|
||||
trans->set_command(cmd);
|
||||
trans->set_address(i);
|
||||
|
@ -92,27 +92,28 @@ public:
|
|||
trans->set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
|
||||
sc_core::sc_time delay = sc_core::sc_time(0, sc_core::SC_NS);
|
||||
|
||||
if (cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
if(cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
SCCINFO(SCMOD) << "[Initiators Message]=>At address " << std::hex << i << " sending transaction with command = Write"
|
||||
<< ", data=" << std::hex << data << " at time " << sc_core::sc_time_stamp();
|
||||
<< ", data=" << std::hex << data << " at time " << sc_core::sc_time_stamp();
|
||||
} else {
|
||||
SCCINFO(SCMOD) << "[Initiators Message]=>At address " << std::hex << i << " sending transaction with command= Read "
|
||||
<< " at time " << sc_core::sc_time_stamp();
|
||||
<< " at time " << sc_core::sc_time_stamp();
|
||||
}
|
||||
|
||||
initiator_socket->b_transport(*trans, delay);
|
||||
|
||||
if (trans->is_response_error())
|
||||
SCCERR(SCMOD) << "TLM_2" << trans->get_response_string().c_str();
|
||||
if(trans->is_response_error())
|
||||
SCCERR(SCMOD) << "TLM_2" << trans->get_response_string().c_str();
|
||||
|
||||
if (delay.to_double() != 0) wait(delay);
|
||||
if(delay.to_double() != 0)
|
||||
wait(delay);
|
||||
|
||||
if (cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
if(cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
SCCINFO(SCMOD) << "[Initiators Message]=>At address " << std::hex << i << " received response of Write transaction "
|
||||
<< " at time " << sc_core::sc_time_stamp();
|
||||
<< " at time " << sc_core::sc_time_stamp();
|
||||
} else {
|
||||
SCCINFO(SCMOD) << "[Initiators Message]=>At address " << std::hex << i << " received response of Read transaction "
|
||||
<< " data " << data << " at time " << sc_core::sc_time_stamp();
|
||||
<< " data " << data << " at time " << sc_core::sc_time_stamp();
|
||||
}
|
||||
|
||||
SCCINFO(SCMOD) << "--------------------------------------------------------";
|
||||
|
@ -124,17 +125,15 @@ public:
|
|||
}
|
||||
|
||||
private:
|
||||
cci::cci_param<std::string, cci::CCI_MUTABLE_PARAM> initiator_ID; ///< Elab Time Param for assigning initiator ID (initialized by top_module)
|
||||
cci::cci_param<std::string, cci::CCI_MUTABLE_PARAM>
|
||||
initiator_ID; ///< Elab Time Param for assigning initiator ID (initialized by top_module)
|
||||
/**
|
||||
* @fn void end_of_elaboration()
|
||||
* @brief end of elaboration function to lock structural param
|
||||
* @return void
|
||||
*/
|
||||
void end_of_elaboration() {
|
||||
initiator_ID.lock();
|
||||
}
|
||||
|
||||
void end_of_elaboration() { initiator_ID.lock(); }
|
||||
};
|
||||
// initiator
|
||||
// initiator
|
||||
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_INITIATOR_H_
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_INITIATOR_H_
|
||||
|
|
|
@ -35,13 +35,13 @@
|
|||
#endif
|
||||
|
||||
#include <cci_configuration>
|
||||
#include <iomanip>
|
||||
#include <sstream>
|
||||
#include <tlm>
|
||||
#include <vector>
|
||||
#include <sstream>
|
||||
#include <iomanip>
|
||||
|
||||
#include <tlm_utils/multi_passthrough_target_socket.h>
|
||||
#include <tlm_utils/multi_passthrough_initiator_socket.h>
|
||||
#include <tlm_utils/multi_passthrough_target_socket.h>
|
||||
|
||||
/**
|
||||
* @class router
|
||||
|
@ -59,9 +59,13 @@ public:
|
|||
* @return void
|
||||
*/
|
||||
SC_CTOR(router)
|
||||
:
|
||||
Router_target("Router_target"), Router_initiator("Router_initiator"), r_initiators("r_initiators", 0), r_targets("r_targets",
|
||||
0), addr_limit("addr_max", 64), m_broker(cci::cci_get_broker()), addrSize(0) {
|
||||
: Router_target("Router_target")
|
||||
, Router_initiator("Router_initiator")
|
||||
, r_initiators("r_initiators", 0)
|
||||
, r_targets("r_targets", 0)
|
||||
, addr_limit("addr_max", 64)
|
||||
, m_broker(cci::cci_get_broker())
|
||||
, addrSize(0) {
|
||||
SCCINFO(SCMOD) << "[ROUTER C_TOR] ----- [ROUTER CONSTRUCTOR BEGINS HERE] ------";
|
||||
|
||||
// Register b_transport
|
||||
|
@ -78,8 +82,8 @@ public:
|
|||
SCCINFO(SCMOD) << "[ROUTER in beoe] : Number of target(s) : " << r_targets.get_value();
|
||||
SCCINFO(SCMOD) << "[ROUTER in beoe] : Maximum Addressable Limit of the router : " << addr_limit.get_value();
|
||||
|
||||
char targetName[10]; ///< Holds router table's fields' names
|
||||
addrSize = (unsigned int) (addr_limit.get_value() / r_targets);
|
||||
char targetName[10]; ///< Holds router table's fields' names
|
||||
addrSize = (unsigned int)(addr_limit.get_value() / r_targets);
|
||||
|
||||
// Printing the Router Table contents
|
||||
SCCINFO(SCMOD) << "============= ROUTER TABLE INFORMATION ==============";
|
||||
|
@ -89,7 +93,7 @@ public:
|
|||
|
||||
// Sets the contents of the routing table with (default) values
|
||||
// calculated within 'beoe' phase
|
||||
for (int i = 0; i < r_targets; i++) {
|
||||
for(int i = 0; i < r_targets; i++) {
|
||||
snprintf(targetName, sizeof(targetName), "r_index_%d", i);
|
||||
r_target_index.push_back(new cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>(targetName, i));
|
||||
|
||||
|
@ -100,37 +104,37 @@ public:
|
|||
r_addr_end.push_back(new cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>(targetName, ((i + 1) * addrSize - 1)));
|
||||
}
|
||||
|
||||
for (int i = 0; i < r_targets; i++) {
|
||||
for(int i = 0; i < r_targets; i++) {
|
||||
snprintf(stringName, sizeof(stringName), "top_module_inst.target_%d.s_base_addr", i);
|
||||
|
||||
base_handle = m_broker.get_param_handle(stringName);
|
||||
if (!base_handle.is_valid()) {
|
||||
if(!base_handle.is_valid()) {
|
||||
sc_assert(!"target Base Address Handle returned is NULL");
|
||||
}
|
||||
std::stringstream row_ss;
|
||||
row_ss << "| " << std::setw(10) << r_target_index[i]->get_value() << " | " << std::setw(10) << std::hex << std::showbase
|
||||
<< r_addr_start[i]->get_value() << " | " << std::setw(10) << r_addr_end[i]->get_value() << " | " << std::setw(10)
|
||||
<< base_handle.get_cci_value().to_json() << " |";
|
||||
<< r_addr_start[i]->get_value() << " | " << std::setw(10) << r_addr_end[i]->get_value() << " | " << std::setw(10)
|
||||
<< base_handle.get_cci_value().to_json() << " |";
|
||||
SCCINFO(SCMOD) << row_ss.str().c_str();
|
||||
SCCINFO(SCMOD) << "-----------------------------------------------------";
|
||||
}
|
||||
}
|
||||
|
||||
// Blocking transport implementation of the router
|
||||
void b_transport(int i_, tlm::tlm_generic_payload &trans, sc_core::sc_time &delay) {
|
||||
void b_transport(int i_, tlm::tlm_generic_payload& trans, sc_core::sc_time& delay) {
|
||||
wait(delay);
|
||||
|
||||
delay = sc_core::SC_ZERO_TIME;
|
||||
|
||||
sc_dt::uint64 addr = trans.get_address();
|
||||
|
||||
if (addr >= static_cast<sc_dt::uint64>(addr_limit.get_value())) {
|
||||
if(addr >= static_cast<sc_dt::uint64>(addr_limit.get_value())) {
|
||||
trans.set_response_status(tlm::TLM_ADDRESS_ERROR_RESPONSE);
|
||||
return;
|
||||
}
|
||||
|
||||
for (unsigned int i = 0; i < r_target_index.size(); i++) {
|
||||
if ((addr >= (r_addr_start[i]->get_value())) && (addr <= (r_addr_end[i]->get_value()))) {
|
||||
for(unsigned int i = 0; i < r_target_index.size(); i++) {
|
||||
if((addr >= (r_addr_start[i]->get_value())) && (addr <= (r_addr_end[i]->get_value()))) {
|
||||
SCCINFO(SCMOD) << "[Router in 'b_transport' layer]";
|
||||
SCCINFO(SCMOD) << "Address = " << std::hex << addr;
|
||||
SCCINFO(SCMOD) << "Index = " << (r_target_index[i])->get_value();
|
||||
|
@ -145,15 +149,15 @@ public:
|
|||
private:
|
||||
/// Demonstrates Model-to-Model Configuration (UC12)
|
||||
/// Elaboration Time Parameters for setting up the model hierarcy;
|
||||
cci::cci_param<int, cci::CCI_MUTABLE_PARAM> r_initiators; ///< initiator ID assigned by the top_module upon instantiation
|
||||
cci::cci_param<int, cci::CCI_MUTABLE_PARAM> r_targets; ///< target ID assigned by the top_module upon instantiation
|
||||
cci::cci_param<unsigned int, cci::CCI_MUTABLE_PARAM> addr_limit; ///< Router Addressing Range
|
||||
cci::cci_broker_handle m_broker; ///< CCI configuration broker handle
|
||||
cci::cci_param<int, cci::CCI_MUTABLE_PARAM> r_initiators; ///< initiator ID assigned by the top_module upon instantiation
|
||||
cci::cci_param<int, cci::CCI_MUTABLE_PARAM> r_targets; ///< target ID assigned by the top_module upon instantiation
|
||||
cci::cci_param<unsigned int, cci::CCI_MUTABLE_PARAM> addr_limit; ///< Router Addressing Range
|
||||
cci::cci_broker_handle m_broker; ///< CCI configuration broker handle
|
||||
|
||||
/// Router Table contents holding targets related information
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_target_index; ///< Router table target index
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_addr_start; ///< Router table start address
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_addr_end; ///< Router table end address
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_target_index; ///< Router table target index
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_addr_start; ///< Router table start address
|
||||
std::vector<cci::cci_param<unsigned int, cci::CCI_IMMUTABLE_PARAM>*> r_addr_end; ///< Router table end address
|
||||
|
||||
cci::cci_param_handle base_handle; ///< CCI base parameter handle for target base address
|
||||
|
||||
|
@ -170,6 +174,6 @@ private:
|
|||
int addrSize;
|
||||
char stringName[50];
|
||||
};
|
||||
// router
|
||||
// router
|
||||
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_ROUTER_H_
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_ROUTER_H_
|
||||
|
|
|
@ -31,10 +31,10 @@
|
|||
* @date 29th April, 2011 (Friday)
|
||||
*/
|
||||
|
||||
#include "top_module.h"
|
||||
#include <cci_configuration>
|
||||
#include <cci_utils/broker.h>
|
||||
#include <string>
|
||||
#include "top_module.h"
|
||||
|
||||
/**
|
||||
* @fn int sc_main(int argc, char* argv[])
|
||||
|
@ -43,7 +43,7 @@
|
|||
* @param argv The list of input arguments
|
||||
* @return An integer for the execution status
|
||||
*/
|
||||
int sc_main(int sc_argc, char *sc_argv[]) {
|
||||
int sc_main(int sc_argc, char* sc_argv[]) {
|
||||
scc::init_logging(scc::log::INFO);
|
||||
cci::cci_originator me = cci::cci_originator("sc_main");
|
||||
// Get handle to the default broker
|
||||
|
@ -83,4 +83,4 @@ int sc_main(int sc_argc, char *sc_argv[]) {
|
|||
SCCINFO("sc_main") << "End Simulation.";
|
||||
|
||||
return EXIT_SUCCESS;
|
||||
} // End of 'sc_main'
|
||||
} // End of 'sc_main'
|
||||
|
|
|
@ -32,10 +32,10 @@
|
|||
#define EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TARGET_H_
|
||||
|
||||
#include <cci_configuration>
|
||||
#include <tlm>
|
||||
#include <string>
|
||||
#include <tlm_utils/simple_target_socket.h>
|
||||
#include <scc/report.h>
|
||||
#include <string>
|
||||
#include <tlm>
|
||||
#include <tlm_utils/simple_target_socket.h>
|
||||
|
||||
/**
|
||||
* @class target
|
||||
|
@ -47,8 +47,10 @@ public:
|
|||
sc_core::sc_time read_latency, write_latency;
|
||||
|
||||
SC_CTOR(target)
|
||||
:
|
||||
target_socket("target_socket"), target_ID("target_ID", "target_default"), s_base_addr("s_base_addr", 0), s_size("s_size", 256) {
|
||||
: target_socket("target_socket")
|
||||
, target_ID("target_ID", "target_default")
|
||||
, s_base_addr("s_base_addr", 0)
|
||||
, s_size("s_size", 256) {
|
||||
SCCINFO(SCMOD) << "[" << target_ID.get_value() << " C_TOR] ------- [TARGET CONSTRUCTOR BEGINS HERE] --------";
|
||||
SCCINFO(SCMOD) << "[" << target_ID.get_value() << " C_TOR] : Base Address : " << s_base_addr.get_value();
|
||||
|
||||
|
@ -60,7 +62,7 @@ public:
|
|||
|
||||
mem = new int[s_size.get_value()];
|
||||
|
||||
for (unsigned int i = 0; i < s_size.get_value(); i++)
|
||||
for(unsigned int i = 0; i < s_size.get_value(); i++)
|
||||
mem[i] = 0xAABBCCDD | i;
|
||||
|
||||
// target's SC_THREAD declaration
|
||||
|
@ -72,8 +74,7 @@ public:
|
|||
* @brief The run thread of the modeul (does nothing)
|
||||
* @return void
|
||||
*/
|
||||
void run_target(void) {
|
||||
}
|
||||
void run_target(void) {}
|
||||
|
||||
/**
|
||||
* @fn void b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& delay)
|
||||
|
@ -82,49 +83,49 @@ public:
|
|||
* @param delay The annotated delay associated with the transaction
|
||||
* @return void
|
||||
*/
|
||||
void b_transport(tlm::tlm_generic_payload &trans, sc_core::sc_time &delay) {
|
||||
void b_transport(tlm::tlm_generic_payload & trans, sc_core::sc_time & delay) {
|
||||
tlm::tlm_command cmd = trans.get_command();
|
||||
sc_dt::uint64 adr = trans.get_address() - s_base_addr.get_value();
|
||||
unsigned char *ptr = trans.get_data_ptr();
|
||||
unsigned char* ptr = trans.get_data_ptr();
|
||||
unsigned int len = trans.get_data_length();
|
||||
unsigned char *byt = trans.get_byte_enable_ptr();
|
||||
unsigned char* byt = trans.get_byte_enable_ptr();
|
||||
unsigned int wid = trans.get_streaming_width();
|
||||
|
||||
SCCINFO(SCMOD) << "[TARGET] : adr ---- " << std::hex << adr;
|
||||
SCCINFO(SCMOD) << "[TARGET] : base addr ---- " << std::hex << s_base_addr.get_value();
|
||||
|
||||
// Check for storage address overflow
|
||||
if (adr > s_size.get_value()) {
|
||||
if(adr > s_size.get_value()) {
|
||||
trans.set_response_status(tlm::TLM_ADDRESS_ERROR_RESPONSE);
|
||||
return;
|
||||
}
|
||||
|
||||
// Target unable to support byte enable attribute
|
||||
if (byt) {
|
||||
if(byt) {
|
||||
trans.set_response_status(tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE);
|
||||
return;
|
||||
}
|
||||
|
||||
// Target unable to support streaming width attribute
|
||||
if (wid < len) {
|
||||
if(wid < len) {
|
||||
trans.set_response_status(tlm::TLM_BURST_ERROR_RESPONSE);
|
||||
return;
|
||||
}
|
||||
|
||||
if (cmd == tlm::TLM_READ_COMMAND) {
|
||||
if(cmd == tlm::TLM_READ_COMMAND) {
|
||||
memcpy(ptr, &mem[adr], len);
|
||||
delay = delay + read_latency;
|
||||
} else
|
||||
if (cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
memcpy(&mem[adr], ptr, len);
|
||||
delay = delay + write_latency;
|
||||
}
|
||||
} else if(cmd == tlm::TLM_WRITE_COMMAND) {
|
||||
memcpy(&mem[adr], ptr, len);
|
||||
delay = delay + write_latency;
|
||||
}
|
||||
|
||||
trans.set_response_status(tlm::TLM_OK_RESPONSE);
|
||||
}
|
||||
|
||||
private:
|
||||
cci::cci_param<std::string, cci::CCI_MUTABLE_PARAM> target_ID; ///< Elaboration Time Param for assigning target ID (initialized by top_module)
|
||||
cci::cci_param<std::string, cci::CCI_MUTABLE_PARAM>
|
||||
target_ID; ///< Elaboration Time Param for assigning target ID (initialized by top_module)
|
||||
|
||||
cci::cci_param<int, cci::CCI_MUTABLE_PARAM> s_base_addr; ///< Mutable time param for setting target's base addr (initialized by router)
|
||||
|
||||
|
@ -140,8 +141,8 @@ private:
|
|||
s_base_addr.lock();
|
||||
}
|
||||
|
||||
int *mem;
|
||||
int* mem;
|
||||
};
|
||||
// target
|
||||
// target
|
||||
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TARGET_H_
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TARGET_H_
|
||||
|
|
|
@ -32,13 +32,13 @@
|
|||
#define EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TOP_MODULE_H_
|
||||
|
||||
#include <cci_configuration>
|
||||
#include <scc/report.h>
|
||||
#include <sstream>
|
||||
#include <tlm>
|
||||
#include <vector>
|
||||
#include <sstream>
|
||||
#include <scc/report.h>
|
||||
|
||||
#include "router.h"
|
||||
#include "initiator.h"
|
||||
#include "router.h"
|
||||
#include "target.h"
|
||||
|
||||
/**
|
||||
|
@ -52,8 +52,9 @@ public:
|
|||
* @brief The class constructor
|
||||
*/
|
||||
SC_CTOR(top_module)
|
||||
:
|
||||
n_initiators("number_of_initiators", 0), n_targets("number_of_targets", 0), m_broker(cci::cci_get_broker()) {
|
||||
: n_initiators("number_of_initiators", 0)
|
||||
, n_targets("number_of_targets", 0)
|
||||
, m_broker(cci::cci_get_broker()) {
|
||||
std::stringstream ss;
|
||||
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] -- [TOP MODULE CONSTRUCTOR BEGINS HERE]";
|
||||
|
@ -80,14 +81,14 @@ public:
|
|||
// ----------------------------------------------------------------
|
||||
|
||||
cci::cci_param_handle r_addr_limit_handle = m_broker.get_param_handle("top_module_inst.RouterInstance.addr_limit");
|
||||
if (r_addr_limit_handle.is_valid()) {
|
||||
if(r_addr_limit_handle.is_valid()) {
|
||||
r_addr_max = atoi((r_addr_limit_handle.get_cci_value().to_json()).c_str());
|
||||
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Router's maximum addressable limit : " << r_addr_max;
|
||||
}
|
||||
|
||||
/// Creating instances of initiator(s)
|
||||
for (int i = 0; i < n_initiators; i++) {
|
||||
for(int i = 0; i < n_initiators; i++) {
|
||||
snprintf(initiatorName, sizeof(initiatorName), "initiator_%d", i);
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Creating initiator : " << initiatorName;
|
||||
|
||||
|
@ -107,7 +108,7 @@ public:
|
|||
targetSize = 128;
|
||||
|
||||
// Creating instances of target(s)
|
||||
for (int i = 0; i < n_targets; i++) {
|
||||
for(int i = 0; i < n_targets; i++) {
|
||||
snprintf(targetName, sizeof(targetName), "target_%d", i);
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Creating target : " << targetName;
|
||||
|
||||
|
@ -131,7 +132,7 @@ public:
|
|||
}
|
||||
|
||||
// Try re-setting locked values for Router Table contents
|
||||
for (int i = 0; i < n_targets; i++) {
|
||||
for(int i = 0; i < n_targets; i++) {
|
||||
snprintf(targetName, sizeof(targetName), "%s.RouterInstance.r_index_%d", name(), i);
|
||||
ss.clear();
|
||||
ss.str("");
|
||||
|
@ -140,7 +141,7 @@ public:
|
|||
try {
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Re-setting fields of target_" << i;
|
||||
m_broker.set_preset_cci_value(targetName, cci::cci_value::from_json(ss.str()));
|
||||
} catch (sc_core::sc_report const &exception) {
|
||||
} catch(sc_core::sc_report const& exception) {
|
||||
SCCINFO(SCMOD) << "[ROUTER : Caught] : " << exception.what();
|
||||
}
|
||||
|
||||
|
@ -157,7 +158,7 @@ public:
|
|||
try {
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Re-setting start addr of target_" << i;
|
||||
m_broker.set_preset_cci_value(targetName, cci::cci_value::from_json(ss.str()));
|
||||
} catch (sc_core::sc_report const &exception) {
|
||||
} catch(sc_core::sc_report const& exception) {
|
||||
SCCINFO(SCMOD) << "[ROUTER : Caught] : " << exception.what();
|
||||
}
|
||||
|
||||
|
@ -169,7 +170,7 @@ public:
|
|||
try {
|
||||
SCCINFO(SCMOD) << "[TOP_MODULE C_TOR] : Re-setting end addr of target_" << i;
|
||||
m_broker.set_preset_cci_value(targetName, cci::cci_value::from_json(ss.str()));
|
||||
} catch (sc_core::sc_report const &exception) {
|
||||
} catch(sc_core::sc_report const& exception) {
|
||||
SCCINFO(SCMOD) << "[ROUTER : Caught] : " << exception.what();
|
||||
}
|
||||
}
|
||||
|
@ -181,16 +182,16 @@ public:
|
|||
* @return void
|
||||
*/
|
||||
~top_module() {
|
||||
if (!initiatorList.empty()) {
|
||||
for (std::vector<initiator*>::iterator it = initiatorList.begin(); it != initiatorList.end(); ++it) {
|
||||
delete (*it);
|
||||
if(!initiatorList.empty()) {
|
||||
for(std::vector<initiator*>::iterator it = initiatorList.begin(); it != initiatorList.end(); ++it) {
|
||||
delete(*it);
|
||||
}
|
||||
initiatorList.clear();
|
||||
}
|
||||
|
||||
if (!targetList.empty()) {
|
||||
for (std::vector<target*>::iterator it = targetList.begin(); it != targetList.end(); ++it) {
|
||||
delete (*it);
|
||||
if(!targetList.empty()) {
|
||||
for(std::vector<target*>::iterator it = targetList.begin(); it != targetList.end(); ++it) {
|
||||
delete(*it);
|
||||
}
|
||||
targetList.clear();
|
||||
}
|
||||
|
@ -199,26 +200,25 @@ public:
|
|||
private:
|
||||
// Immutable type cci-parameters
|
||||
cci::cci_param<int, cci::CCI_IMMUTABLE_PARAM> n_initiators; ///< Number of initiators to be instantiated
|
||||
cci::cci_param<int, cci::CCI_IMMUTABLE_PARAM> n_targets; ///< Number of targets to be instantiated
|
||||
cci::cci_param<int, cci::CCI_IMMUTABLE_PARAM> n_targets; ///< Number of targets to be instantiated
|
||||
|
||||
cci::cci_broker_handle m_broker; ///< Configuration broker handle
|
||||
|
||||
router *routerInstance; ///< Declaration of a router pointer
|
||||
router* routerInstance; ///< Declaration of a router pointer
|
||||
|
||||
// STD::VECTORs for creating instances of initiator and target
|
||||
std::vector<initiator*> initiatorList; ///< STD::VECTOR for initiators
|
||||
std::vector<target*> targetList; ///< STD::VECTOR for targets
|
||||
std::vector<initiator*> initiatorList; ///< STD::VECTOR for initiators
|
||||
std::vector<target*> targetList; ///< STD::VECTOR for targets
|
||||
|
||||
char initiatorName[50]; ///< initiator_ID
|
||||
char targetName[50]; ///< target_ID
|
||||
char stringMisc[50]; ///< String to be used for misc things
|
||||
char targetBaseAddr[50]; ///< The base address of the target
|
||||
char initiatorName[50]; ///< initiator_ID
|
||||
char targetName[50]; ///< target_ID
|
||||
char stringMisc[50]; ///< String to be used for misc things
|
||||
char targetBaseAddr[50]; ///< The base address of the target
|
||||
|
||||
int addrValue
|
||||
{ 0 }; ///< Address Value
|
||||
int targetSize; ///< Maximum target Size (preset value)
|
||||
int r_addr_max; ///< Maximum Router Table's memory range
|
||||
int addrValue{0}; ///< Address Value
|
||||
int targetSize; ///< Maximum target Size (preset value)
|
||||
int r_addr_max; ///< Maximum Router Table's memory range
|
||||
};
|
||||
// top_module
|
||||
// top_module
|
||||
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TOP_MODULE_H_
|
||||
#endif // EXAMPLES_EX09_HIERARCHICAL_OVERRIDE_OF_PARAMETER_VALUES_TOP_MODULE_H_
|
||||
|
|
|
@ -1,17 +1,17 @@
|
|||
#define CATCH_CONFIG_MAIN
|
||||
#include <catch2/catch_all.hpp>
|
||||
#include <util/io-redirector.h>
|
||||
#include <iostream>
|
||||
#include <cstdio>
|
||||
#include <iostream>
|
||||
#include <util/io-redirector.h>
|
||||
|
||||
TEST_CASE( "io-redirector", "[io-redirector]" ) {
|
||||
TEST_CASE("io-redirector", "[io-redirector]") {
|
||||
util::IoRedirector::get().start();
|
||||
auto result1 = util::IoRedirector::get().get_output();
|
||||
printf("Some output");
|
||||
std::cout<<"Some other output"<<std::endl;
|
||||
std::cout << "Some other output" << std::endl;
|
||||
auto result2 = util::IoRedirector::get().get_output();
|
||||
util::IoRedirector::get().stop();
|
||||
|
||||
REQUIRE( result1=="" );
|
||||
REQUIRE( result2=="Some outputSome other output\n" );
|
||||
REQUIRE(result1 == "");
|
||||
REQUIRE(result2 == "Some outputSome other output\n");
|
||||
}
|
||||
|
|
|
@ -1,15 +1,19 @@
|
|||
#ifndef SC_INCLUDE_DYNAMIC_PROCESSES
|
||||
#define SC_INCLUDE_DYNAMIC_PROCESSES
|
||||
#endif
|
||||
#include <catch2/catch_all.hpp>
|
||||
#include <factory.h>
|
||||
#include <scc/ordered_semaphore.h>
|
||||
#include <scc/utilities.h>
|
||||
#include <factory.h>
|
||||
#include <catch2/catch_all.hpp>
|
||||
#include <systemc>
|
||||
|
||||
using namespace sc_core;
|
||||
|
||||
struct top: public sc_core::sc_module {
|
||||
top():top("top"){}
|
||||
top(sc_module_name const& nm):sc_core::sc_module(nm) {}
|
||||
struct top : public sc_core::sc_module {
|
||||
top()
|
||||
: top("top") {}
|
||||
top(sc_module_name const& nm)
|
||||
: sc_core::sc_module(nm) {}
|
||||
scc::ordered_semaphore sem{"sem", 2};
|
||||
scc::ordered_semaphore_t<2> sem_t{"sem_t"};
|
||||
};
|
||||
|
@ -19,7 +23,7 @@ factory::add<top> tb;
|
|||
TEST_CASE("simple ordered_semaphore test", "[SCC][ordered_semaphore]") {
|
||||
|
||||
auto& dut = factory::get<top>();
|
||||
auto run1 = sc_spawn([&dut](){
|
||||
auto run1 = sc_spawn([&dut]() {
|
||||
dut.sem.wait();
|
||||
dut.sem_t.wait();
|
||||
dut.sem.set_capacity(4);
|
||||
|
|
|
@ -14,20 +14,18 @@ struct packet {
|
|||
std::vector<uint8_t> routing;
|
||||
};
|
||||
|
||||
struct packet_ext: public tlm::tlm_extension<packet_ext>, public packet {
|
||||
struct packet_ext : public tlm::tlm_extension<packet_ext>, public packet {
|
||||
|
||||
packet_ext() = default;
|
||||
|
||||
packet_ext& operator=(packet_ext const& o) = default;
|
||||
|
||||
tlm_extension_base* clone() const override {
|
||||
return new packet_ext(*this);
|
||||
}
|
||||
tlm_extension_base* clone() const override { return new packet_ext(*this); }
|
||||
|
||||
void copy_from(tlm_extension_base const & o) override {
|
||||
void copy_from(tlm_extension_base const& o) override {
|
||||
auto* ext = dynamic_cast<packet_ext const*>(&o);
|
||||
if(ext)
|
||||
this->routing=ext->routing;
|
||||
this->routing = ext->routing;
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
@ -12,88 +12,85 @@
|
|||
|
||||
using namespace sc_core;
|
||||
|
||||
pkt_sender::pkt_sender(const sc_core::sc_module_name &nm, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count)
|
||||
pkt_sender::pkt_sender(const sc_core::sc_module_name& nm, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count)
|
||||
: sc_module(nm)
|
||||
, bw_peq("bw_peq")
|
||||
, fw_peq("fw_peq")
|
||||
, my_pos{pos_x,pos_y}
|
||||
, my_pos{pos_x, pos_y}
|
||||
, dim{dim}
|
||||
, count{count}
|
||||
{
|
||||
SCCDEBUG(SCMOD)<<"instantiating sender "<<pos_x<<"/"<<pos_y;
|
||||
, count{count} {
|
||||
SCCDEBUG(SCMOD) << "instantiating sender " << pos_x << "/" << pos_y;
|
||||
SC_HAS_PROCESS(pkt_sender);
|
||||
isck.register_nb_transport_bw([this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
|
||||
return this->nb_bw(gp, phase, delay);
|
||||
});
|
||||
tsck.register_nb_transport_fw([this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
|
||||
return this->nb_fw(gp, phase, delay);
|
||||
});
|
||||
isck.register_nb_transport_bw([this](tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
|
||||
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_bw(gp, phase, delay); });
|
||||
tsck.register_nb_transport_fw([this](tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
|
||||
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_fw(gp, phase, delay); });
|
||||
SC_METHOD(received);
|
||||
sensitive<<fw_peq.get_event();
|
||||
sensitive << fw_peq.get_event();
|
||||
dont_initialize();
|
||||
SC_THREAD(run);
|
||||
}
|
||||
|
||||
void pkt_sender::gen_routing(std::vector<uint8_t> &route_vec) {
|
||||
if(std::get<0>(my_pos)==0){
|
||||
for(auto i=0; i<dim; ++i)
|
||||
void pkt_sender::gen_routing(std::vector<uint8_t>& route_vec) {
|
||||
if(std::get<0>(my_pos) == 0) {
|
||||
for(auto i = 0; i < dim; ++i)
|
||||
route_vec.push_back(RIGHT);
|
||||
} else if(std::get<0>(my_pos)==dim+1){
|
||||
for(auto i=0; i<dim; ++i)
|
||||
} else if(std::get<0>(my_pos) == dim + 1) {
|
||||
for(auto i = 0; i < dim; ++i)
|
||||
route_vec.push_back(LEFT);
|
||||
} else if(std::get<1>(my_pos)==0){
|
||||
for(auto i=0; i<dim; ++i)
|
||||
} else if(std::get<1>(my_pos) == 0) {
|
||||
for(auto i = 0; i < dim; ++i)
|
||||
route_vec.push_back(BOTTOM);
|
||||
} else if(std::get<1>(my_pos)==dim+1){
|
||||
for(auto i=0; i<dim; ++i)
|
||||
} else if(std::get<1>(my_pos) == dim + 1) {
|
||||
for(auto i = 0; i < dim; ++i)
|
||||
route_vec.push_back(TOP);
|
||||
} else
|
||||
SCCERR(SCMOD)<<"WTF!?!";
|
||||
SCCERR(SCMOD) << "WTF!?!";
|
||||
}
|
||||
|
||||
void pkt_sender::run() {
|
||||
wait(clk_i.posedge_event());
|
||||
for(auto i=0U; i<count; i++){
|
||||
for(auto i = 0U; i < count; i++) {
|
||||
tlm::tlm_generic_payload* gp = tlm::scc::tlm_mm<>::get().allocate<packet_ext>();
|
||||
gen_routing(gp->get_extension<packet_ext>()->routing);
|
||||
tlm::tlm_phase phase{tlm::BEGIN_REQ};
|
||||
sc_time delay;
|
||||
gp->acquire();
|
||||
auto sync = isck->nb_transport_fw(*gp, phase, delay);
|
||||
sc_assert(sync==tlm::TLM_UPDATED && phase==tlm::END_REQ);
|
||||
sc_assert(sync == tlm::TLM_UPDATED && phase == tlm::END_REQ);
|
||||
tlm::tlm_generic_payload* ret{nullptr};
|
||||
while(!(ret=bw_peq.get_next_transaction())){
|
||||
while(!(ret = bw_peq.get_next_transaction())) {
|
||||
wait(bw_peq.get_event());
|
||||
}
|
||||
sc_assert(gp==ret);
|
||||
sc_assert(gp == ret);
|
||||
ret->release();
|
||||
}
|
||||
finish_evt.notify(SC_ZERO_TIME);
|
||||
}
|
||||
|
||||
tlm::tlm_sync_enum pkt_sender::nb_bw(tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
|
||||
sc_assert(phase==tlm::BEGIN_RESP);
|
||||
tlm::tlm_sync_enum pkt_sender::nb_bw(tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
|
||||
sc_assert(phase == tlm::BEGIN_RESP);
|
||||
bw_peq.notify(gp, delay);
|
||||
phase=tlm::END_RESP;
|
||||
phase = tlm::END_RESP;
|
||||
return tlm::TLM_COMPLETED;
|
||||
}
|
||||
|
||||
tlm::tlm_sync_enum pkt_sender::nb_fw(tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
|
||||
sc_assert(phase==tlm::BEGIN_REQ);
|
||||
tlm::tlm_sync_enum pkt_sender::nb_fw(tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
|
||||
sc_assert(phase == tlm::BEGIN_REQ);
|
||||
auto ext = gp.get_extension<packet_ext>();
|
||||
sc_assert(ext->routing.size()==0);
|
||||
sc_assert(ext->routing.size() == 0);
|
||||
gp.acquire();
|
||||
fw_peq.notify(gp, delay);
|
||||
phase=tlm::END_REQ;
|
||||
phase = tlm::END_REQ;
|
||||
return tlm::TLM_UPDATED;
|
||||
}
|
||||
|
||||
void pkt_sender::received() {
|
||||
if(auto gp = fw_peq.get_next_transaction()){
|
||||
if(auto gp = fw_peq.get_next_transaction()) {
|
||||
tlm::tlm_phase phase{tlm::BEGIN_RESP};
|
||||
sc_time delay;
|
||||
auto sync = tsck->nb_transport_bw(*gp, phase, delay);
|
||||
sc_assert(sync==tlm::TLM_COMPLETED && phase==tlm::END_RESP);
|
||||
sc_assert(sync == tlm::TLM_COMPLETED && phase == tlm::END_RESP);
|
||||
gp->release();
|
||||
}
|
||||
}
|
||||
|
|
|
@ -8,12 +8,11 @@
|
|||
#ifndef _SIM_PERFORMANCE_PKT_SENDER_H_
|
||||
#define _SIM_PERFORMANCE_PKT_SENDER_H_
|
||||
|
||||
#include <systemc>
|
||||
#include "packet.h"
|
||||
#include <systemc>
|
||||
#include <tlm/scc/initiator_mixin.h>
|
||||
#include <tlm/scc/target_mixin.h>
|
||||
|
||||
|
||||
class pkt_sender : sc_core::sc_module {
|
||||
public:
|
||||
sc_core::sc_in<bool> clk_i{"clk_i"};
|
||||
|
@ -21,7 +20,8 @@ public:
|
|||
tlm::scc::target_mixin<tlm::tlm_target_socket<32>> tsck;
|
||||
pkt_sender(sc_core::sc_module_name const&, unsigned dim, unsigned pos_x, unsigned pos_y, unsigned count);
|
||||
virtual ~pkt_sender() = default;
|
||||
sc_core::sc_event const& get_finish_event(){return finish_evt;}
|
||||
sc_core::sc_event const& get_finish_event() { return finish_evt; }
|
||||
|
||||
private:
|
||||
void run();
|
||||
void gen_routing(std::vector<uint8_t>& route_vec);
|
||||
|
|
|
@ -14,63 +14,67 @@
|
|||
|
||||
using namespace sc_core;
|
||||
|
||||
pkt_switch::pkt_switch(const sc_core::sc_module_name &nm):sc_module(nm) {
|
||||
pkt_switch::pkt_switch(const sc_core::sc_module_name& nm)
|
||||
: sc_module(nm) {
|
||||
SC_HAS_PROCESS(pkt_switch);
|
||||
auto index = 0U;
|
||||
for(auto& s:isck){
|
||||
s.register_nb_transport_bw([this](unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
|
||||
return this->nb_bw(id, gp, phase, delay);
|
||||
}, index++);
|
||||
for(auto& s : isck) {
|
||||
s.register_nb_transport_bw([this](unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
|
||||
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_bw(id, gp, phase, delay); },
|
||||
index++);
|
||||
}
|
||||
index = 0U;
|
||||
for(auto& s:tsck){
|
||||
s.register_nb_transport_fw([this](unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay)->tlm::tlm_sync_enum{
|
||||
return this->nb_fw(id, gp, phase, delay);
|
||||
}, index++);
|
||||
for(auto& s : tsck) {
|
||||
s.register_nb_transport_fw([this](unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase,
|
||||
sc_core::sc_time& delay) -> tlm::tlm_sync_enum { return this->nb_fw(id, gp, phase, delay); },
|
||||
index++);
|
||||
}
|
||||
SC_METHOD(clock_cb);
|
||||
sensitive<<clk_i.pos();
|
||||
sensitive << clk_i.pos();
|
||||
dont_initialize();
|
||||
for(auto i=0U; i<SIDES; ++i){
|
||||
for(auto i = 0U; i < SIDES; ++i) {
|
||||
sc_core::sc_spawn_options opts;
|
||||
opts.spawn_method();
|
||||
opts.set_sensitivity(&out_fifo[i].data_written_event());
|
||||
sc_core::sc_spawn([this, i]()->void {this->output_cb(i);}, sc_core::sc_gen_unique_name("out_peq"), &opts);
|
||||
sc_core::sc_spawn([this, i]() -> void { this->output_cb(i); }, sc_core::sc_gen_unique_name("out_peq"), &opts);
|
||||
}
|
||||
}
|
||||
|
||||
tlm::tlm_sync_enum pkt_switch::nb_fw(unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
|
||||
tlm::tlm_sync_enum pkt_switch::nb_fw(unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
|
||||
in_tx[id].write(&gp);
|
||||
if(phase==tlm::BEGIN_REQ) phase=tlm::END_REQ;
|
||||
else SCCERR(SCMOD)<<"WTF!?!";
|
||||
if(phase == tlm::BEGIN_REQ)
|
||||
phase = tlm::END_REQ;
|
||||
else
|
||||
SCCERR(SCMOD) << "WTF!?!";
|
||||
return tlm::TLM_UPDATED;
|
||||
}
|
||||
|
||||
void pkt_switch::clock_cb() {
|
||||
std::array<std::vector<unsigned>, SIDES> routing{};
|
||||
bool nothing_todo=true;
|
||||
for(auto i=0U; i<SIDES; ++i){
|
||||
if(auto gp = in_tx[i].read()){
|
||||
bool nothing_todo = true;
|
||||
for(auto i = 0U; i < SIDES; ++i) {
|
||||
if(auto gp = in_tx[i].read()) {
|
||||
auto ext = gp->get_extension<packet_ext>();
|
||||
sc_assert(ext);
|
||||
routing[ext->routing.back()].push_back(i);
|
||||
nothing_todo = false;
|
||||
}
|
||||
}
|
||||
if(nothing_todo) return;
|
||||
for(auto i=0U; i<SIDES; ++i){
|
||||
if(routing[i].size()){
|
||||
auto selected_input=routing[i].front();
|
||||
if(nothing_todo)
|
||||
return;
|
||||
for(auto i = 0U; i < SIDES; ++i) {
|
||||
if(routing[i].size()) {
|
||||
auto selected_input = routing[i].front();
|
||||
auto* gp = in_tx[selected_input].read();
|
||||
if(out_fifo[i].nb_write(gp)){
|
||||
if(out_fifo[i].nb_write(gp)) {
|
||||
auto ext = gp->get_extension<packet_ext>();
|
||||
ext->routing.pop_back();
|
||||
gp->acquire();
|
||||
tlm::tlm_phase phase{tlm::BEGIN_RESP};
|
||||
sc_core::sc_time delay;
|
||||
auto res = tsck[selected_input]->nb_transport_bw(*gp, phase, delay);
|
||||
if(res!=tlm::TLM_COMPLETED && !(res==tlm::TLM_UPDATED && phase==tlm::END_RESP))
|
||||
SCCERR(SCMOD)<<"WTF!?!";
|
||||
if(res != tlm::TLM_COMPLETED && !(res == tlm::TLM_UPDATED && phase == tlm::END_RESP))
|
||||
SCCERR(SCMOD) << "WTF!?!";
|
||||
in_tx[selected_input].clear();
|
||||
}
|
||||
}
|
||||
|
@ -79,18 +83,18 @@ void pkt_switch::clock_cb() {
|
|||
|
||||
void pkt_switch::output_cb(unsigned id) {
|
||||
|
||||
if(out_fifo[id].num_available()){
|
||||
if(out_fifo[id].num_available()) {
|
||||
auto* gp = out_fifo[id].read();
|
||||
tlm::tlm_phase phase{tlm::BEGIN_REQ};
|
||||
sc_time delay;
|
||||
auto sync = isck[id]->nb_transport_fw(*gp, phase, delay);
|
||||
sc_assert(sync==tlm::TLM_UPDATED && phase==tlm::END_REQ);
|
||||
sc_assert(sync == tlm::TLM_UPDATED && phase == tlm::END_REQ);
|
||||
}
|
||||
}
|
||||
|
||||
tlm::tlm_sync_enum pkt_switch::nb_bw(unsigned id, tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) {
|
||||
tlm::tlm_sync_enum pkt_switch::nb_bw(unsigned id, tlm::tlm_generic_payload& gp, tlm::tlm_phase& phase, sc_core::sc_time& delay) {
|
||||
gp.release();
|
||||
sc_assert(phase==tlm::BEGIN_RESP);
|
||||
phase=tlm::END_RESP;
|
||||
sc_assert(phase == tlm::BEGIN_RESP);
|
||||
phase = tlm::END_RESP;
|
||||
return tlm::TLM_COMPLETED;
|
||||
}
|
||||
|
|
|
@ -8,22 +8,22 @@
|
|||
#ifndef _SIM_PERFORMANCE_PKT_SWITCH_H_
|
||||
#define _SIM_PERFORMANCE_PKT_SWITCH_H_
|
||||
|
||||
#include <systemc>
|
||||
#include "packet.h"
|
||||
#include <array>
|
||||
#include <scc/sc_owning_signal.h>
|
||||
#include <systemc>
|
||||
#include <tlm/scc/tagged_initiator_mixin.h>
|
||||
#include <tlm/scc/tagged_target_mixin.h>
|
||||
#include <scc/sc_owning_signal.h>
|
||||
#include <array>
|
||||
|
||||
|
||||
class pkt_switch : sc_core::sc_module {
|
||||
public:
|
||||
enum {NONE=std::numeric_limits<unsigned>::max()};
|
||||
enum { NONE = std::numeric_limits<unsigned>::max() };
|
||||
sc_core::sc_in<bool> clk_i{"clk_i"};
|
||||
sc_core::sc_vector<tlm::scc::tagged_target_mixin<tlm::tlm_target_socket<32>>> tsck{"tsck",4};
|
||||
sc_core::sc_vector<tlm::scc::tagged_initiator_mixin<tlm::tlm_initiator_socket<32>>> isck{"isck",4};
|
||||
sc_core::sc_vector<tlm::scc::tagged_target_mixin<tlm::tlm_target_socket<32>>> tsck{"tsck", 4};
|
||||
sc_core::sc_vector<tlm::scc::tagged_initiator_mixin<tlm::tlm_initiator_socket<32>>> isck{"isck", 4};
|
||||
pkt_switch(sc_core::sc_module_name const&);
|
||||
virtual ~pkt_switch() = default;
|
||||
|
||||
private:
|
||||
void clock_cb();
|
||||
void output_cb(unsigned);
|
||||
|
|
|
@ -21,10 +21,10 @@
|
|||
*/
|
||||
|
||||
#include "top.h"
|
||||
#include <boost/program_options.hpp>
|
||||
#include <scc/perf_estimator.h>
|
||||
#include <scc/report.h>
|
||||
#include <scc/tracer.h>
|
||||
#include <boost/program_options.hpp>
|
||||
|
||||
using namespace scc;
|
||||
namespace po = boost::program_options;
|
||||
|
@ -35,8 +35,8 @@ const size_t SUCCESS = 0;
|
|||
const size_t ERROR_UNHANDLED_EXCEPTION = 2;
|
||||
} // namespace
|
||||
|
||||
int sc_main(int argc, char *argv[]) {
|
||||
sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING );
|
||||
int sc_main(int argc, char* argv[]) {
|
||||
sc_core::sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING);
|
||||
sc_core::sc_report_handler::set_actions(sc_core::SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, sc_core::SC_DO_NOTHING);
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// CLI argument parsing
|
||||
|
@ -54,13 +54,13 @@ int sc_main(int argc, char *argv[]) {
|
|||
try {
|
||||
po::store(po::parse_command_line(argc, argv, desc), vm); // can throw
|
||||
// --help option
|
||||
if (vm.count("help")) {
|
||||
if(vm.count("help")) {
|
||||
std::cout << "JIT-ISS simulator for AVR" << std::endl << desc << std::endl;
|
||||
return SUCCESS;
|
||||
}
|
||||
po::notify(vm); // throws on error, so do after help in case
|
||||
// there are any problems
|
||||
} catch (po::error &e) {
|
||||
} catch(po::error& e) {
|
||||
std::cerr << "ERROR: " << e.what() << std::endl << std::endl;
|
||||
std::cerr << desc << std::endl;
|
||||
return ERROR_IN_COMMAND_LINE;
|
||||
|
@ -68,20 +68,20 @@ int sc_main(int argc, char *argv[]) {
|
|||
///////////////////////////////////////////////////////////////////////////
|
||||
// configure logging
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
scc::init_logging(vm.count("debug")?scc::log::DEBUG:scc::log::INFO);
|
||||
scc::init_logging(vm.count("debug") ? scc::log::DEBUG : scc::log::INFO);
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// set up tracing & transaction recording
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
//tracer trace("simple_system", tracer::TEXT, vm.count("trace"));
|
||||
// todo: fix displayed clock period in VCD
|
||||
// tracer trace("simple_system", tracer::TEXT, vm.count("trace"));
|
||||
// todo: fix displayed clock period in VCD
|
||||
try {
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// instantiate top level
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
perf_estimator estimator;
|
||||
auto const count=vm["count"].as<unsigned>();
|
||||
auto const count = vm["count"].as<unsigned>();
|
||||
auto const dim = vm["dim"].as<unsigned>();
|
||||
SCCINFO()<<"Instantiating "<<(unsigned)dim<<"x"<<(unsigned)dim<<" matrix and executing "<<count<<" accesses";
|
||||
SCCINFO() << "Instantiating " << (unsigned)dim << "x" << (unsigned)dim << " matrix and executing " << count << " accesses";
|
||||
top i_top("i_top", dim, count);
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// run simulation
|
||||
|
|
|
@ -6,34 +6,35 @@
|
|||
*/
|
||||
|
||||
#include "top.h"
|
||||
#include <scc/utilities.h>
|
||||
#include <scc/report.h>
|
||||
#include <fmt/format.h>
|
||||
#include <scc/report.h>
|
||||
#include <scc/utilities.h>
|
||||
|
||||
using namespace sc_core;
|
||||
using namespace fmt;
|
||||
|
||||
top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :sc_module(nm){
|
||||
sc_assert(dimension>0);
|
||||
top::top(sc_core::sc_module_name const& nm, uint8_t dimension, unsigned count)
|
||||
: sc_module(nm) {
|
||||
sc_assert(dimension > 0);
|
||||
SC_HAS_PROCESS(top);
|
||||
for(auto yidx=0U; yidx<dimension; ++yidx){
|
||||
for(auto xidx=0U; xidx<dimension; ++xidx){
|
||||
for(auto yidx = 0U; yidx < dimension; ++yidx) {
|
||||
for(auto xidx = 0U; xidx < dimension; ++xidx) {
|
||||
auto name = format("sw_{}_{}", xidx, yidx);
|
||||
SCCDEBUG(SCMOD)<<"instantiating switch "<<xidx<<"/"<<yidx;
|
||||
SCCDEBUG(SCMOD) << "instantiating switch " << xidx << "/" << yidx;
|
||||
switches.push_back(scc::make_unique<pkt_switch>(sc_module_name(name.c_str())));
|
||||
switches.back()->clk_i(clk);
|
||||
}
|
||||
}
|
||||
for(auto yidx=0U; yidx<dimension; ++yidx){
|
||||
for(auto xidx=0U; xidx<dimension; ++xidx){
|
||||
auto& sw = switches[yidx*dimension+xidx];
|
||||
if(xidx<dimension-1) {
|
||||
auto& swr = switches[yidx*dimension+(xidx+1)];
|
||||
for(auto yidx = 0U; yidx < dimension; ++yidx) {
|
||||
for(auto xidx = 0U; xidx < dimension; ++xidx) {
|
||||
auto& sw = switches[yidx * dimension + xidx];
|
||||
if(xidx < dimension - 1) {
|
||||
auto& swr = switches[yidx * dimension + (xidx + 1)];
|
||||
sw->isck[RIGHT](swr->tsck[LEFT]);
|
||||
swr->isck[LEFT](sw->tsck[RIGHT]);
|
||||
}
|
||||
if(yidx<dimension-1){
|
||||
auto& swb = switches[(yidx+1)*dimension+xidx];
|
||||
if(yidx < dimension - 1) {
|
||||
auto& swb = switches[(yidx + 1) * dimension + xidx];
|
||||
sw->isck[BOTTOM](swb->tsck[TOP]);
|
||||
swb->isck[TOP](sw->tsck[BOTTOM]);
|
||||
}
|
||||
|
@ -41,42 +42,42 @@ top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :s
|
|||
}
|
||||
auto yidx = 0U;
|
||||
auto xidx = 0U;
|
||||
for(xidx=0U; xidx<dimension; ++xidx){
|
||||
auto name = format("snd_{}_{}", xidx+1, 0);
|
||||
senders[TOP].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx+1, 0, count));
|
||||
for(xidx = 0U; xidx < dimension; ++xidx) {
|
||||
auto name = format("snd_{}_{}", xidx + 1, 0);
|
||||
senders[TOP].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx + 1, 0, count));
|
||||
auto& snd = senders[TOP].back();
|
||||
snd->clk_i(clk);
|
||||
auto& sw = switches[yidx*dimension+xidx];
|
||||
auto& sw = switches[yidx * dimension + xidx];
|
||||
snd->isck(sw->tsck[TOP]);
|
||||
sw->isck[TOP](snd->tsck);
|
||||
}
|
||||
yidx=dimension-1;
|
||||
for(xidx=0U; xidx<dimension; ++xidx){
|
||||
auto name = format("snd_{}_{}", xidx+1, dimension+1);
|
||||
senders[BOTTOM].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx+1, dimension+1, count));
|
||||
yidx = dimension - 1;
|
||||
for(xidx = 0U; xidx < dimension; ++xidx) {
|
||||
auto name = format("snd_{}_{}", xidx + 1, dimension + 1);
|
||||
senders[BOTTOM].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, xidx + 1, dimension + 1, count));
|
||||
auto& snd = senders[BOTTOM].back();
|
||||
snd->clk_i(clk);
|
||||
auto& sw = switches[yidx*dimension+xidx];
|
||||
auto& sw = switches[yidx * dimension + xidx];
|
||||
snd->isck(sw->tsck[BOTTOM]);
|
||||
sw->isck[BOTTOM](snd->tsck);
|
||||
}
|
||||
xidx=0U;
|
||||
for(yidx=0U; yidx<dimension; ++yidx){
|
||||
auto name = format("snd_{}_{}", 0, yidx+1);
|
||||
senders[LEFT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, 0, yidx+1, count));
|
||||
xidx = 0U;
|
||||
for(yidx = 0U; yidx < dimension; ++yidx) {
|
||||
auto name = format("snd_{}_{}", 0, yidx + 1);
|
||||
senders[LEFT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, 0, yidx + 1, count));
|
||||
auto& snd = senders[LEFT].back();
|
||||
snd->clk_i(clk);
|
||||
auto& sw = switches[yidx*dimension+xidx];
|
||||
auto& sw = switches[yidx * dimension + xidx];
|
||||
snd->isck(sw->tsck[LEFT]);
|
||||
sw->isck[LEFT](snd->tsck);
|
||||
}
|
||||
xidx=dimension-1;
|
||||
for(yidx=0U; yidx<dimension; ++yidx){
|
||||
auto name = format("snd_{}_{}", dimension+1, yidx+1);
|
||||
senders[RIGHT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, dimension+1, yidx+1, count));
|
||||
xidx = dimension - 1;
|
||||
for(yidx = 0U; yidx < dimension; ++yidx) {
|
||||
auto name = format("snd_{}_{}", dimension + 1, yidx + 1);
|
||||
senders[RIGHT].push_back(scc::make_unique<pkt_sender>(sc_module_name(name.c_str()), dimension, dimension + 1, yidx + 1, count));
|
||||
auto& snd = senders[RIGHT].back();
|
||||
snd->clk_i(clk);
|
||||
auto& sw = switches[yidx*dimension+xidx];
|
||||
auto& sw = switches[yidx * dimension + xidx];
|
||||
snd->isck(sw->tsck[RIGHT]);
|
||||
sw->isck[RIGHT](snd->tsck);
|
||||
}
|
||||
|
@ -85,12 +86,11 @@ top::top(sc_core::sc_module_name const& nm, uint8_t dimension,unsigned count) :s
|
|||
|
||||
void top::run() {
|
||||
sc_event_and_list evt_list;
|
||||
for(auto& sides:senders) {
|
||||
for(auto& sender:sides){
|
||||
evt_list&=sender->get_finish_event();
|
||||
for(auto& sides : senders) {
|
||||
for(auto& sender : sides) {
|
||||
evt_list &= sender->get_finish_event();
|
||||
}
|
||||
}
|
||||
wait(evt_list);
|
||||
sc_stop();
|
||||
}
|
||||
|
||||
|
|
|
@ -8,17 +8,18 @@
|
|||
#ifndef _SIM_PERFORMANCE_TOP_H_
|
||||
#define _SIM_PERFORMANCE_TOP_H_
|
||||
|
||||
#include <systemc>
|
||||
#include <memory>
|
||||
#include <vector>
|
||||
#include "pkt_sender.h"
|
||||
#include "pkt_switch.h"
|
||||
#include "types.h"
|
||||
#include <memory>
|
||||
#include <systemc>
|
||||
#include <vector>
|
||||
|
||||
class top: public sc_core::sc_module {
|
||||
class top : public sc_core::sc_module {
|
||||
public:
|
||||
top(sc_core::sc_module_name const&, uint8_t, unsigned);
|
||||
virtual ~top() = default;
|
||||
|
||||
private:
|
||||
void run();
|
||||
sc_core::sc_clock clk;
|
||||
|
|
|
@ -8,6 +8,6 @@
|
|||
#ifndef TESTS_SIM_PERFORMANCE_TYPES_H_
|
||||
#define TESTS_SIM_PERFORMANCE_TYPES_H_
|
||||
|
||||
enum {TOP=0, RIGHT=1, BOTTOM=2, LEFT=3, SIDES=4};
|
||||
enum { TOP = 0, RIGHT = 1, BOTTOM = 2, LEFT = 3, SIDES = 4 };
|
||||
|
||||
#endif /* TESTS_SIM_PERFORMANCE_TYPES_H_ */
|
||||
|
|
Loading…
Reference in New Issue