Vladimir Kondratiev 9169290ca9 platform: generic: mips eyeq7h: fix NCORE registers access from clusters 1..2 ...

CPU clusters 1 and 2 cannot access NCORE registers through AUX ports.
AUX ports of clusters 1 and 2 are connected to NCORE through east port.
East port has no access to NCORE registers address space.

Re-route NCORE registers range to MEM port by re-configuring MMIO
regions in the GCR. REsulting map is as below. Mind a gap between
regions [1] and [2]; this gap covering NCORE registers now routed
to the default MEM port
Cluster 0: 4 MMIO regions
  [0] : 0x0000000000000000-0x000000001fff0000 AUX0 UC|UCA
  [1] : 0x0000000020000000-0x00000000677f0000 AUX0    ANY
  [2] : 0x0000000080000000-0x0000001fffff0000 AUX0 UC|UCA
  [3] : --disabled--
Cluster 1: 4 MMIO regions
  [0] : 0x0000000000000000-0x000000001fff0000 AUX0 UC|UCA
  [1] : 0x0000000020000000-0x00000000677f0000 AUX0    ANY
  [2] : 0x0000000080000000-0x0000001fffff0000 AUX0 UC|UCA
  [3] : --disabled--
Cluster 2: 4 MMIO regions
  [0] : 0x0000000000000000-0x000000001fff0000 AUX0 UC|UCA
  [1] : 0x0000000020000000-0x00000000677f0000 AUX0    ANY
  [2] : 0x0000000080000000-0x0000001fffff0000 AUX0 UC|UCA
  [3] : --disabled--

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260223-for-upstream-eyeq7h-v3-19-621d004d1a21@mobileye.com
Signed-off-by: Anup Patel <anup@brainfault.org>

2026-02-25 18:49:03 +05:30

13 KiB

Raw Blame History

View Raw