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Merge remote-tracking branch 'github/main'

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This commit is contained in:
Eyck Jentzsch
2026-03-31 13:05:53 +00:00
parent ebf21274ee e67d7b4301
commit c180e9958a
6 changed files with 54 additions and 42 deletions
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2
dbt-rise-core

Submodule dbt-rise-core updated: 52b3ed8f04...e17e1b58ae

2
dbt-rise-riscv

Submodule dbt-rise-riscv updated: 0fe85baa81...b800f513d4

2
requirements.txt
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@@ -1 +1,3 @@
conan>=2.0
cmake<4.0
ninja

7
src/sc_main.cpp
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@@ -154,10 +154,11 @@ int sc_main(int argc, char* argv[]) {
case SIGTERM:
case SIGUSR1:
case SIGUSR2:
SCCINFO() << "Simulation stopped with signal " << res << ".";
sc_core::sc_stop();
SCCINFO() << "Simulation stopped with signal " << sigabbrev_np(res) << ".";
break;
default:
SCCERR() << "Simulation aborted with signal " << res << "!";
SCCERR() << "Simulation aborted with signal " << sigabbrev_np(res) << "!";
}
} else {
try {
@@ -171,5 +172,5 @@ int sc_main(int argc, char* argv[]) {
sc_core::sc_report_handler::get_handler()(rep, sc_core::SC_DISPLAY | sc_core::SC_STOP);
}
}
return 0;
return sc_core::sc_report_handler::get_count(SC_ERROR) + sc_core::sc_report_handler::get_count(SC_WARNING);
}

56
src/vp/system.cpp
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@@ -17,42 +17,48 @@ namespace vp {
using namespace sc_core;
using namespace vpvper::minres;
#define UART0_IRQ 16
#define TIMER0_IRQ0 17
#define TIMER0_IRQ1 18
#define QSPI_IRQ 19
#define I2S_IRQ 20
#define CAM_IRQ 21
#define DMA_IRQ 22
#define GPIO_ORQ 23
#define ETH0_IRQ 24
#define ETH1_IRQ 25
#define MDIO0_IRQ 26
#define MDIO1_IRQ 27
enum {
UART0_IRQ = 16,
TIMER0_IRQ0 = 17,
TIMER0_IRQ1 = 18,
QSPI_IRQ = 19,
I2S_IRQ = 20,
CAM_IRQ = 21,
DMA_IRQ = 22,
GPIO_ORQ = 23,
ETH0_IRQ = 24,
ETH1_IRQ = 25,
MDIO0_IRQ = 26,
MDIO1_IRQ = 27
};
#if SC_VERSION_MAJOR < 3
SC_HAS_PROCESS(system); // NOLINT
#endif
system::system(sc_core::sc_module_name nm)
: sc_core::sc_module(nm)
, NAMED(ahb_router, 7, 2)
, NAMED(apbBridge, PipelinedMemoryBusToApbBridge_map.size(), 1) {
, NAMED(main_bus, 7, 2)
, NAMED(peripheral_bus, PipelinedMemoryBusToApbBridge_map.size(), 1) {
mtime_clk = (1.0 / 32768) * 1_sec;
clint_int_s.init(core_complex.clint_irq_i.size());
core_complex.ibus(ahb_router.target[0]);
core_complex.dbus(ahb_router.target[1]);
core_complex.ibus(main_bus.target[0]);
core_complex.dbus(main_bus.target[1]);
core_complex.mtime_i(mtime_s);
core_complex.clint_irq_i(clint_int_s);
ahb_router.bind_target(apbBridge.target[0], 0, 0x10000000, 16_MB);
ahb_router.bind_target(eth0.socket, 1, 0x11000000, 4_KiB);
ahb_router.bind_target(eth1.socket, 2, 0x11001000, 4_KiB);
ahb_router.bind_target(qspi.xip_sck, 3, 0x20000000, 16_MB);
ahb_router.bind_target(mem_ram.target, 4, 0x30000000, mem_ram.getSize());
ahb_router.bind_target(mem_trace.target, 5, 0x31000000, mem_trace.getSize());
ahb_router.bind_target(mem_dram.target, 6, 0x40000000, mem_dram.getSize());
main_bus.bind_target(peripheral_bus.target[0], 0, 0x10000000, 16_MB);
main_bus.bind_target(qspi.xip_sck, 1, 0x20000000, 16_MB);
main_bus.bind_target(mem_ram.target, 2, 0x30000000, mem_ram.getSize());
main_bus.bind_target(mem_trace.target, 3, 0x31000000, mem_trace.getSize());
main_bus.bind_target(mem_dram.target, 4, 0x40000000, mem_dram.getSize());
main_bus.bind_target(eth0.socket, 5, 0x11000000, 4_KiB);
main_bus.bind_target(eth1.socket, 6, 0x11001000, 4_KiB);
size_t i = 0;
for(const auto& e : PipelinedMemoryBusToApbBridge_map) {
apbBridge.initiator.at(i)(e.target);
apbBridge.set_target_range(i, e.start, e.size);
peripheral_bus.initiator.at(i)(e.target);
peripheral_bus.set_target_range(i, e.start, e.size);
i++;
}

11
src/vp/system.h
View File

@@ -32,7 +32,7 @@ namespace vp {
class system : public sc_core::sc_module {
public:
SC_HAS_PROCESS(system); // NOLINT
enum { CLINT_IRQ_SIZE = 32, CLUSTER_ID = 0 };
sc_core::sc_vector<sc_core::sc_out<bool>> pins_o{"pins_o", 32};
sc_core::sc_vector<sc_core::sc_out<bool>> pins_oe_o{"pins_oe_o", 32};
@@ -58,7 +58,7 @@ public:
private:
#include "../vp/gen/PipelinedMemoryBusToApbBridge.h" // IWYU pragma: keep
sysc::riscv::core_complex<> core_complex{"core_complex"};
scc::router<> ahb_router, apbBridge;
scc::router<> main_bus, peripheral_bus;
vpvper::minres::gpio_tl gpio0{"gpio0"};
vpvper::minres::uart_tl uart0{"uart0"};
vpvper::minres::timer_tl timer0{"timer0"};
@@ -73,11 +73,14 @@ private:
scc::memory<1_MiB, scc::LT> mem_trace{"mem_trace"};
sc_core::sc_signal<sc_core::sc_time> mtime_clk{"mtime_clk"};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"};
template <typename T> using vp_signal = sc_core::sc_signal<T, sc_core::SC_MANY_WRITERS>;
vp_signal<bool> rst_s{"rst_s"};
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> clint_int_s{"clint_int_s", 0};
sc_core::sc_vector<vp_signal<bool>> clint_int_s{"clint_int_s", 0};
sc_core::sc_signal<uint64_t> mtime_s{"mtime_s"};
sc_core::sc_event_or_list finish_evt_or_list;
sc_core::sc_event_and_list finish_evt_and_list;
std::vector<uint8_t> trace_buffer;
void gen_reset();