mirror of
https://github.com/Minres/RISCV-VP.git
synced 2025-12-17 17:01:35 +00:00
adds separate clock for aclints mtime register
This commit is contained in:
@@ -60,6 +60,7 @@ private:
|
||||
scc::memory<128_kB, scc::LT> mem_ram{"mem_ram"};
|
||||
scc::memory<8_kB, scc::LT> boot_rom{"boot_rom"};
|
||||
|
||||
sc_core::sc_signal<sc_core::sc_time> mtime_clk{"mtime_clk"};
|
||||
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"};
|
||||
|
||||
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> irq_int_s{"irq_int_s", 32}, local_int_s{"local_int_s", 16};
|
||||
|
||||
Reference in New Issue
Block a user