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adds mtime connection

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This commit is contained in:
Eyck Jentzsch
2025-08-12 10:43:42 +02:00
parent ec38023f3e
commit 58cd8e7b07
4 changed files with 8 additions and 7 deletions
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2
dbt-rise-riscv

Submodule dbt-rise-riscv updated: 1c8e1bef1c...82b765336f

2
src/vp/system.cpp
View File

@@ -53,6 +53,7 @@ system::system(sc_core::sc_module_name nm)
qspi.rst_i(rst_s);
core_complex.rst_i(rst_s);
aclint.mtime_o(mtime_s);
aclint.mtime_int_o(mtime_int_s);
aclint.msip_int_o(msip_int_s);
irq_ctrl.irq_o(core_int_s);
@@ -63,6 +64,7 @@ system::system(sc_core::sc_module_name nm)
timer0.interrupt_o[1](irq_int_s[2]);
qspi.irq_o(irq_int_s[3]);
core_complex.mtime_i(mtime_s);
core_complex.timer_irq_i(mtime_int_s);
core_complex.ext_irq_i(core_int_s);
core_complex.local_irq_i(local_int_s);

9
src/vp/system.h
View File

@@ -18,6 +18,7 @@
#include <scc/router.h>
#include <scc/utilities.h>
#include <sysc/communication/sc_clock.h>
#include <sysc/communication/sc_signal.h>
#include <sysc/communication/sc_signal_ports.h>
#include <sysc/core_complex.h>
#include <sysc/kernel/sc_module.h>
@@ -59,13 +60,11 @@ private:
scc::memory<128_kB, scc::LT> mem_ram{"mem_ram"};
scc::memory<8_kB, scc::LT> boot_rom{"boot_rom"};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"},
msip_int_s{"msip_int_s"};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"};
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> irq_int_s{"irq_int_s", 32},
local_int_s{"local_int_s", 16};
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> irq_int_s{"irq_int_s", 32}, local_int_s{"local_int_s", 16};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> core_int_s{"core_int_s"};
sc_core::sc_signal<uint64_t> mtime_s{"mtime_s"};
void gen_reset();
#include "../vp/gen/PipelinedMemoryBusToApbBridge.h" // IWYU pragma: keep
};

2
vpvper

Submodule vpvper updated: 77b5ffa40d...ec61cb97a5