Firmware/ThreadX4TGFS
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Introduces Regression for 32 and 64 bit threadx and smp kernel in Debug, MinSizeRel and Release configuration #4

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alex merged 79 commits from feature/test into main 2026-04-02 14:09:29 +01:00
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19
port/threadx_smp/src/tx_initialize_low_level.S
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@@ -73,23 +73,24 @@
STORE x1, 28*REGBYTES(sp) // Store RA, 28*REGBYTES(because call will override ra [ra is a calle register in riscv])
call _tx_thread_context_save
call _tx_thread_context_save
csrr a0, mcause
csrr a1, mepc
csrr a2, mtval
addi sp, sp, -8
STORE ra, 0(sp)
call trap_handler
LOAD ra, 0(sp)
addi sp, sp, 8
STORE ra, 0(sp)
call trap_handler
LOAD ra, 0(sp)
addi sp, sp, 8
call _tx_thread_context_restore
// it will nerver return
.weak trap_handler
trap_handler:
1:
j 1b
.section .text
trap_handler:
1:
j 1b
.section .text
/**************************************************************************/
/* */
/* FUNCTION RELEASE */