Introduces Regression for 32 and 64 bit threadx and smp kernel in Debug, MinSizeRel and Release configuration #4

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alex merged 79 commits from feature/test into main 2026-04-02 14:09:29 +01:00
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@@ -348,13 +348,13 @@ ULONG _tx_thread_interrupt_control(unsigned int new_posture);
/* Atomically read mstatus into tx_saved_posture and clear bit 3 of mstatus. */
#define TX_DISABLE \
{ \
__asm__("csrrci %0, mstatus, 0x08" : "=r"(tx_saved_posture) :); \
__asm__ volatile("csrrci %0, mstatus, 0x08" : "=r"(tx_saved_posture) : : "memory"); \
};
/* We only care about mstatus.mie (bit 3), so mask tx_saved_posture and write to mstatus. */
#define TX_RESTORE \
{ \
register ULONG __tempmask = tx_saved_posture & 0x08; \
__asm__("csrrs x0, mstatus, %0 \n\t" : : "r"(__tempmask) :); \
__asm__ volatile("csrrs x0, mstatus, %0" : : "r"(__tempmask) : "memory"); \
};
#endif