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changes memeory map to match RISCV-VP, commit a94fd67

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Eyck Jentzsch
2026-02-01 18:58:28 +01:00
parent 3ee8f6d230
commit f3232373fe
3 changed files with 15 additions and 10 deletions
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6
port/moonlight/platform.h
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@@ -5,11 +5,11 @@
#include "riscv-traps.h" #include "riscv-traps.h"
#define PERIPH(TYPE, ADDR) ((volatile TYPE*)(ADDR)) #define PERIPH(TYPE, ADDR) ((volatile TYPE*)(ADDR))
#define APB_BASE 0x10000000 #define APB_BASE 0xF0000000
#define uart PERIPH(uart_t, APB_BASE + 0x01000) #define uart PERIPH(uart_t, APB_BASE + 0x01000)
#define aclint PERIPH(aclint_t, APB_BASE + 0x30000) #define aclint PERIPH(aclint_t, APB_BASE + 0x30000)
#define ethmac0 PERIPH(ethmac_t, 0x18000000) #define ethmac0 PERIPH(ethmac_t, 0xF1000000)
#define ethmac1 PERIPH(ethmac_t, 0x18001000) #define ethmac1 PERIPH(ethmac_t, 0xF1001000)
#define UART0_IRQ 16 #define UART0_IRQ 16
#define TIMER0_IRQ0 17 #define TIMER0_IRQ0 17

8
src/memory_map.ld
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@@ -1,7 +1,7 @@
MEMORY MEMORY
{ {
ram (wxa!ri) : ORIGIN = 0x00000000, LENGTH = 128K dram (wxa!ri) : ORIGIN = 0x00000000, LENGTH = 1024M
rom (rxai!w) : ORIGIN = 0x10080000, LENGTH = 8k ram (wxa!ri) : ORIGIN = 0xE0000000, LENGTH = 128K
flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 16M rom (rxai!w) : ORIGIN = 0xF0080000, LENGTH = 8k
dram (wxa!ri) : ORIGIN = 0x40000000, LENGTH = 2048M flash (rxai!w) : ORIGIN = 0xF2000000, LENGTH = 16M
} }

11
src/sections.ld
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@@ -11,7 +11,6 @@ SECTIONS
{ {
__stack_size = DEFINED(__stack_size) ? __stack_size : 2K; __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
__stack_segment_size = DEFINED(__stack_segment_size) ? __stack_segment_size : __stack_size; __stack_segment_size = DEFINED(__stack_segment_size) ? __stack_segment_size : __stack_size;
__data_vma_base = ORIGIN(LOCATION_DATA) + ((ORIGIN(LOCATION_DATA) == 0) ? 0x10 : 0);
/* Code/Const in LOCATION_TEXT */ /* Code/Const in LOCATION_TEXT */
. = ORIGIN(LOCATION_TEXT); . = ORIGIN(LOCATION_TEXT);
@@ -48,9 +47,15 @@ SECTIONS
PROVIDE_HIDDEN(__fini_array_end = .); PROVIDE_HIDDEN(__fini_array_end = .);
} > LOCATION_TEXT :text } > LOCATION_TEXT :text
/* .data in LOCATION_DATA, Load-Image in LOCATION_TEXT, PHDR is data */ .data_pad (NOLOAD) : ALIGN(4)
.data __data_vma_base : ALIGN(4)
{ {
} > LOCATION_DATA :data
__data_offs = ((ADDR(.data_pad) == 0) ? 0x10 : 0);
/* .data in LOCATION_DATA, Load-Image in LOCATION_TEXT, PHDR is data */
.data : ALIGN(4)
{
. += __data_offs;
__data_start = .; __data_start = .;
*(.data .data.*) *(.data .data.*)
__data_end = .; __data_end = .;