Firmware/ThreadX4TGFS
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makes ULONG 64 bit on RV64

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Eyck-Alexander Jentzsch
2026-04-02 10:31:12 +02:00
parent bdf3893bf2
commit eda2a85dc1
6 changed files with 15 additions and 20 deletions
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9
port/threadx/inc/tx_port.h
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@@ -66,9 +66,7 @@
#define LWU lw #define LWU lw
#define LOG_REGBYTES 2 #define LOG_REGBYTES 2
#endif #endif
#define REGBYTES (1 << LOG_REGBYTES) #define REGBYTES (1 << LOG_REGBYTES)
#define TX_THREAD_STACK_END_OFFSET 2 * 4 + 2 * REGBYTES
#define TX_THREAD_TIME_SLICE_OFFSET 3 * 4 + 3 * REGBYTES
#else /*not __ASSEMBLER__ */ #else /*not __ASSEMBLER__ */
@@ -96,14 +94,11 @@ typedef unsigned char UCHAR;
typedef int INT; typedef int INT;
typedef unsigned int UINT; typedef unsigned int UINT;
typedef int LONG; typedef int LONG;
typedef unsigned int ULONG; // ThreadX expects ULONG to be 32 bit typedef unsigned long ULONG;
typedef unsigned long long ULONG64; typedef unsigned long long ULONG64;
typedef short SHORT; typedef short SHORT;
typedef unsigned short USHORT; typedef unsigned short USHORT;
#define ULONG64_DEFINED #define ULONG64_DEFINED
#define ALIGN_TYPE_DEFINED
// Since ULONG is not actually unsigned long, it is to small to hold pointers for 64-bit systems
#define ALIGN_TYPE unsigned long
/* Define the priority levels for ThreadX. Legal values range /* Define the priority levels for ThreadX. Legal values range
from 32 to 1024 and MUST be evenly divisible by 32. */ from 32 to 1024 and MUST be evenly divisible by 32. */

12
port/threadx/src/tx_thread_context_restore.S
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@@ -80,9 +80,9 @@ _tx_thread_context_restore:
{ */ { */
la t0, _tx_thread_system_state // Pickup addr of nested interrupt count la t0, _tx_thread_system_state // Pickup addr of nested interrupt count
lw t1, 0(t0) // Pickup nested interrupt count LOAD t1, 0(t0) // Pickup nested interrupt count
addi t1, t1, -1 // Decrement the nested interrupt counter addi t1, t1, -1 // Decrement the nested interrupt counter
sw t1, 0(t0) // Store new nested count STORE t1, 0(t0) // Store new nested count
beqz t1, _tx_thread_not_nested_restore // If 0, not nested restore beqz t1, _tx_thread_not_nested_restore // If 0, not nested restore
/* Interrupts are nested. */ /* Interrupts are nested. */
@@ -190,7 +190,7 @@ _tx_thread_not_nested_restore:
LOAD t1, _tx_thread_current_ptr // Pickup current thread pointer LOAD t1, _tx_thread_current_ptr // Pickup current thread pointer
beqz t1, _tx_thread_idle_system_restore // If NULL, idle system restore beqz t1, _tx_thread_idle_system_restore // If NULL, idle system restore
LOAD t2, _tx_thread_preempt_disable // Pickup preempt disable flag LWU t2, _tx_thread_preempt_disable // Pickup preempt disable flag
bgtz t2, _tx_thread_no_preempt_restore // If set, restore interrupted thread bgtz t2, _tx_thread_no_preempt_restore // If set, restore interrupted thread
LOAD t2, _tx_thread_execute_ptr // Pickup thread execute pointer LOAD t2, _tx_thread_execute_ptr // Pickup thread execute pointer
@@ -354,14 +354,14 @@ _tx_thread_preempt_restore:
{ */ { */
la t0, _tx_timer_time_slice // Pickup time slice variable address la t0, _tx_timer_time_slice // Pickup time slice variable address
lw t2, 0(t0) // Pickup time slice LOAD t2, 0(t0) // Pickup time slice
beqz t2, _tx_thread_dont_save_ts // If 0, skip time slice processing beqz t2, _tx_thread_dont_save_ts // If 0, skip time slice processing
/* _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice /* _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice
_tx_timer_time_slice = 0; */ _tx_timer_time_slice = 0; */
sw t2, TX_THREAD_TIME_SLICE_OFFSET(t1) // Save current time slice STORE t2, 6*REGBYTES(t1) // Save current time slice
sw x0, 0(t0) // Clear global time slice STORE x0, 0(t0) // Clear global time slice
/* } */ /* } */

4
port/threadx/src/tx_thread_context_save.S
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@@ -74,14 +74,14 @@ _tx_thread_context_save:
STORE t1, 18*REGBYTES(sp) STORE t1, 18*REGBYTES(sp)
la t0, _tx_thread_system_state // Pickup address of system state la t0, _tx_thread_system_state // Pickup address of system state
lw t1, 0(t0) // Pickup system state LOAD t1, 0(t0) // Pickup system state
/* Check for a nested interrupt condition. */ /* Check for a nested interrupt condition. */
/* if (_tx_thread_system_state++) /* if (_tx_thread_system_state++)
{ */ { */
beqz t1, _tx_thread_not_nested_save // If 0, first interrupt condition beqz t1, _tx_thread_not_nested_save // If 0, first interrupt condition
addi t1, t1, 1 // Increment the interrupt counter addi t1, t1, 1 // Increment the interrupt counter
sw t1, 0(t0) // Store the interrupt counter STORE t1, 0(t0) // Store the interrupt counter
/* Nested interrupt condition. /* Nested interrupt condition.
Save the reset of the scratch registers on the stack and return to the Save the reset of the scratch registers on the stack and return to the

2
port/threadx/src/tx_thread_schedule.S
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@@ -105,12 +105,12 @@ _tx_thread_schedule_loop:
/* _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; */ /* _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; */
la t2, _tx_timer_time_slice // Pickup time-slice variable address la t2, _tx_timer_time_slice // Pickup time-slice variable address
STORE t3, 0(t2) // Store new time-slice*/
/* Switch to the thread's stack. */ /* Switch to the thread's stack. */
/* SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr; */ /* SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr; */
LOAD sp, 2*REGBYTES(t1) // Switch to thread's stack LOAD sp, 2*REGBYTES(t1) // Switch to thread's stack
STORE t3, 0(t2) // Store new time-slice*/
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY

2
port/threadx/src/tx_thread_stack_build.S
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@@ -138,7 +138,7 @@ If floating point support:
Stack Bottom: (higher memory address) */ Stack Bottom: (higher memory address) */
LOAD t0, TX_THREAD_STACK_END_OFFSET(a0) // Pickup end of stack area LOAD t0, 4*REGBYTES(a0) // Pickup end of stack area
andi t0, t0, -16 // Ensure 16-byte alignment andi t0, t0, -16 // Ensure 16-byte alignment
/* Actually build the stack frame. */ /* Actually build the stack frame. */

6
port/threadx/src/tx_thread_system_return.S
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@@ -151,7 +151,7 @@ _tx_thread_system_return:
{ */ { */
la t4, _tx_timer_time_slice // Pickup time slice variable addr la t4, _tx_timer_time_slice // Pickup time slice variable addr
lw t3, 0(t4) // Pickup time slice value LOAD t3, 0(t4) // Pickup time slice value
la t2, _tx_thread_schedule // Pickup address of scheduling loop la t2, _tx_thread_schedule // Pickup address of scheduling loop
beqz t3, _tx_thread_dont_save_ts // If no time-slice, don't save it beqz t3, _tx_thread_dont_save_ts // If no time-slice, don't save it
@@ -159,8 +159,8 @@ _tx_thread_system_return:
/* _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice; /* _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
_tx_timer_time_slice = 0; */ _tx_timer_time_slice = 0; */
sw t3, TX_THREAD_TIME_SLICE_OFFSET(t1) // Save current time-slice for thread STORE t3, 6*REGBYTES(t1) // Save current time-slice for thread
sw x0, 0(t4) // Clear time-slice variable STORE x0, 0(t4) // Clear time-slice variable
/* } */ /* } */
_tx_thread_dont_save_ts: _tx_thread_dont_save_ts: