adds hooks in bootup do move smp booting into the smp port lib
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@@ -6,20 +6,15 @@
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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//#include <picotls.h>
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#include <aclint_ipi.h>
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//#include <tx_port.h>
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#include <riscv-csr.h>
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#ifdef __cplusplus
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#define EXTERN_C extern "C"
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#else
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#define EXTERN_C extern
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#endif
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#if defined(TX_THREAD_SMP_MAX_CORES) && (TX_THREAD_SMP_MAX_CORES > 1)
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#define BOOTUP_SMP_ENABLED
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#endif
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// Generic C function pointer.
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typedef void(*function_t)(void) ;
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@@ -49,8 +44,9 @@ EXTERN_C void _start(void) __attribute__ ((naked,section(".text.boot")));
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// Entry and exit points as C functions.
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EXTERN_C void _initialize(void) __attribute__ ((noreturn,section(".text.boot")));
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EXTERN_C void _secondary_sleep_forever(void) __attribute__ ((noreturn,section(".text.boot")));
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EXTERN_C void _secondary_initialize(void) __attribute__ ((noreturn,section(".text.boot"),weak));
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EXTERN_C void _exit(int exit_code) __attribute__ ((noreturn,noinline,weak));
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EXTERN_C void bootup_wake_secondary_cores(void) __attribute__ ((weak));
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// Standard entry point, no arguments.
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extern int main(void);
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@@ -59,52 +55,6 @@ extern int main(void);
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EXTERN_C void _set_tls(uint8_t*) __attribute__ ((noreturn,section(".text.boot")));
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#endif
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#if defined BOOTUP_SMP_ENABLED
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EXTERN_C void _secondary_initialize(void) __attribute__ ((noreturn,section(".text.boot")));
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EXTERN_C void _secondary_ipi_trap(void) __attribute__ ((naked,noreturn,section(".text.boot")));
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EXTERN_C void _tx_thread_smp_initialize_wait(void) __attribute__ ((noreturn));
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void _secondary_initialize(void) {
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csr_write_mtvec((uint_xlen_t)_secondary_ipi_trap);
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csr_set_bits_mie(MIE_MSI_BIT_MASK);
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csr_set_bits_mstatus(MSTATUS_MIE_BIT_MASK);
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__asm__ volatile ("wfi");
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csr_clr_bits_mstatus(MSTATUS_MIE_BIT_MASK);
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_tx_thread_smp_initialize_wait();
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}
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void _secondary_ipi_trap(void) {
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#if __riscv_xlen == 64
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__asm__ volatile ("addi sp, sp, -16;"
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"sd ra, 8(sp);"
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"call bootup_ipi_clear_handler;"
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"ld ra, 8(sp);"
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"addi sp, sp, 16;"
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"mret");
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#else
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__asm__ volatile ("addi sp, sp, -8;"
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"sw ra, 4(sp);"
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"call bootup_ipi_clear_handler;"
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"lw ra, 4(sp);"
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"addi sp, sp, 8;"
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"mret");
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#endif
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}
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static void bootup_wake_secondary_cores(void) {
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for (UINT core = 1; core < TX_THREAD_SMP_MAX_CORES; ++core) {
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send_ipi(core);
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}
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}
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__attribute__((used)) void bootup_ipi_clear_handler(void) {
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set_aclint_msip(aclint, csr_read_mhartid(), 0);
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}
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#endif
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// The linker script will place this in the reset entry point.
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// It will be 'called' with no stack or C runtime configuration.
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// tp will not be initialized
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@@ -137,11 +87,7 @@ void _start(void) {
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"j 1b;"
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"2:;"
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"beqz t0, 3f;"
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#ifdef BOOTUP_SMP_ENABLED
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"jal zero, _secondary_initialize;"
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#else
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"jal zero, _secondary_sleep_forever;"
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#endif
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"3:;"
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"jal zero, _initialize;"
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: /* output: none %0 */
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@@ -167,9 +113,7 @@ void _initialize(void) {
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++entry) {
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(*entry)();
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}
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#ifdef BOOTUP_SMP_ENABLED
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bootup_wake_secondary_cores();
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#endif
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#ifdef __THREAD_LOCAL_STORAGE
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_set_tls(__tls_base)
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#endif
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@@ -183,7 +127,8 @@ void _initialize(void) {
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_exit(rc);
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}
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void _secondary_sleep_forever(void) {
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void _secondary_initialize(void) {
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// sleep forever
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csr_clr_bits_mie(MIE_MTI_BIT_MASK);
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csr_clr_bits_mstatus(MSTATUS_MIE_BIT_MASK);
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while (1) {
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@@ -191,6 +136,9 @@ void _secondary_sleep_forever(void) {
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}
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}
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void bootup_wake_secondary_cores(void) {
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}
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// This should never be called. Report the exit code through HTIF and idle the CPU.
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void _exit(int exit_code) {
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uintptr_t htif_exit_code = (((uintptr_t)(unsigned int)exit_code) << 1) | 1u;
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@@ -201,4 +149,4 @@ void _exit(int exit_code) {
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while (1) {
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__asm__ volatile ("wfi");
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}
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}
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}
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@@ -30,13 +30,6 @@ void trap_handler(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval) {
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if(OS_IS_INTERRUPT(mcause)) {
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unsigned irq_id = mcause&(__riscv_xlen-1);
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switch(irq_id){
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/*
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#ifdef TX_THREAD_SMP_INTER_CORE_INTERRUPT
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case RISCV_INT_MSI:
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set_aclint_msip(aclint, csr_read_mhartid(), 0);
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break;
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#endif
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*/
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default:
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if(irq_handler[irq_id])
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irq_handler[irq_id]();
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