corrects interrupt disable and restore macros
Turns out the port was really that shitty
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@@ -348,13 +348,13 @@ ULONG _tx_thread_interrupt_control(unsigned int new_posture);
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/* Atomically read mstatus into tx_saved_posture and clear bit 3 of mstatus. */
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/* Atomically read mstatus into tx_saved_posture and clear bit 3 of mstatus. */
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#define TX_DISABLE \
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#define TX_DISABLE \
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{ \
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{ \
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__asm__("csrrci %0, mstatus, 0x08" : "=r"(tx_saved_posture) :); \
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__asm__ volatile("csrrci %0, mstatus, 0x08" : "=r"(tx_saved_posture) : : "memory"); \
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};
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};
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/* We only care about mstatus.mie (bit 3), so mask tx_saved_posture and write to mstatus. */
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/* We only care about mstatus.mie (bit 3), so mask tx_saved_posture and write to mstatus. */
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#define TX_RESTORE \
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#define TX_RESTORE \
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{ \
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{ \
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register ULONG __tempmask = tx_saved_posture & 0x08; \
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register ULONG __tempmask = tx_saved_posture & 0x08; \
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__asm__("csrrs x0, mstatus, %0 \n\t" : : "r"(__tempmask) :); \
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__asm__ volatile("csrrs x0, mstatus, %0" : : "r"(__tempmask) : "memory"); \
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};
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};
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#endif
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#endif
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