Firmware/ThreadX4TGFS
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small formatting changes

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Eyck-Alexander Jentzsch
2026-03-12 15:56:33 +01:00
parent 3fc721d6f2
commit 6d635345dd
1 changed files with 7 additions and 7 deletions
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14
port/threadx/src/tx_initialize_low_level.S
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@@ -138,19 +138,19 @@ trap_handler:
.extern __heap_start .extern __heap_start
.extern board_init .extern board_init
_tx_initialize_low_level: _tx_initialize_low_level:
STORE sp, _tx_thread_system_stack_ptr, t0 // Save system stack pointer STORE sp, _tx_thread_system_stack_ptr, t0 // Save system stack pointer
la t0, __heap_start // Pickup first free address la t0, __heap_start // Pickup first free address
STORE t0, _tx_initialize_unused_memory, t1 // Save unused memory address STORE t0, _tx_initialize_unused_memory, t1 // Save unused memory address
li t0, MSTATUS_MIE li t0, MSTATUS_MIE
csrrc zero, mstatus, t0 // clear MSTATUS_MIE bit csrrc zero, mstatus, t0 // clear MSTATUS_MIE bit
li t0, (MSTATUS_MPP_M | MSTATUS_MPIE ) li t0, (MSTATUS_MPP_M | MSTATUS_MPIE )
csrrs zero, mstatus, t0 // set MSTATUS_MPP, MPIE bit csrrs zero, mstatus, t0 // set MSTATUS_MPP, MPIE bit
li t0, (MIE_MTIE | MIE_MSIE | MIE_MEIE) li t0, (MIE_MTIE | MIE_MSIE | MIE_MEIE)
csrrs zero, mie, t0 // set mie csrrs zero, mie, t0 // set mie
#ifdef __riscv_flen #ifdef __riscv_flen
li t0, MSTATUS_FS li t0, MSTATUS_FS
csrrs zero, mstatus, t0 // set MSTATUS_FS bit to open f/d isa in riscv csrrs zero, mstatus, t0 // set MSTATUS_FS bit to open f/d isa in riscv
fscsr x0 fscsr x0
#endif #endif
addi sp, sp, -8 addi sp, sp, -8