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updates memeory map to match RISCV-VP commit b8b1c23

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This commit is contained in:
Eyck Jentzsch
2026-02-03 08:07:10 +01:00
parent c805aca52d
commit 39ffc7c743
4 changed files with 21 additions and 17 deletions
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14
port/moonlight/exception.c
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@@ -5,7 +5,13 @@
// Expect this to increment one time per second - inside exception handler, after each return of MTI handler.
static volatile uint64_t ecall_count = 0;
#ifdef NX_DEBUG
#define PUTS(STR) puts(STR)
#define PRINTF(...) printf(__VA_ARGS__)
#else
#define PUTS(STR)
#define PRINTF(...)
#endif
void exception(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval) {
switch(mcause) {
case RISCV_EXCP_INSTRUCTION_ADDRESS_MISALIGNED: {
@@ -26,8 +32,6 @@ void exception(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval) {
}
case RISCV_EXCP_LOAD_ADDRESS_MISALIGNED: {
puts("[EXCEPTION] : Load address misaligned");
printf("[EXCEPTION] : PC: 0x%x\n", mepc);
printf("[EXCEPTION] : Addr: 0x%x\n", mtval);
break;
}
case RISCV_EXCP_LOAD_ACCESS_FAULT: {
@@ -36,8 +40,6 @@ void exception(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval) {
}
case RISCV_EXCP_STORE_AMO_ADDRESS_MISALIGNED: {
puts("[EXCEPTION] : Store/AMO address misaligned");
printf("[EXCEPTION] : PC: 0x%x\n", mepc);
printf("[EXCEPTION] : Addr: 0x%x\n", mtval);
break;
}
case RISCV_EXCP_STORE_AMO_ACCESS_FAULT: {
@@ -74,6 +76,8 @@ void exception(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval) {
printf("[EXCEPTION] : Unknown trap cause: %lu\n", mcause);
}
}
printf("[EXCEPTION] : PC: 0x%x\n", mepc);
printf("[EXCEPTION] : Addr: 0x%x\n", mtval);
while(1)
;
}