initial commit
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382
port/threadx/src/tx_thread_context_restore.S
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382
port/threadx/src/tx_thread_context_restore.S
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/***************************************************************************
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* Copyright (c) 2024 Microsoft Corporation
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*
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* This program and the accompanying materials are made available under the
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* terms of the MIT License which is available at
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* https://opensource.org/licenses/MIT.
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*
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* SPDX-License-Identifier: MIT
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**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Thread */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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#include "tx_port.h"
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.section .text
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/**************************************************************************/
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_context_restore RISC-V64/GNU */
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/* 6.2.1 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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/* */
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/* DESCRIPTION */
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/* */
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/* This function restores the interrupt context if it is processing a */
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/* nested interrupt. If not, it returns to the interrupt thread if no */
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/* preemption is necessary. Otherwise, if preemption is necessary or */
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/* if no thread was running, the function returns to the scheduler. */
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/* */
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/* INPUT */
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/* */
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/* None */
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/* */
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/* OUTPUT */
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/* */
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/* None */
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/* */
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/* CALLS */
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/* */
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/* _tx_thread_schedule Thread scheduling routine */
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/* */
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/* CALLED BY */
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/* */
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/* ISRs Interrupt Service Routines */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
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/* */
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/**************************************************************************/
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/* VOID _tx_thread_context_restore(VOID)
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{ */
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.global _tx_thread_context_restore
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_tx_thread_context_restore:
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/* Lockout interrupts. */
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csrci mstatus, 0x08 // Disable interrupts
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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call _tx_execution_isr_exit // Call the ISR execution exit function
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#endif
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/* Determine if interrupts are nested. */
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/* if (--_tx_thread_system_state)
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{ */
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la t0, _tx_thread_system_state // Pickup addr of nested interrupt count
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lw t1, 0(t0) // Pickup nested interrupt count
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addi t1, t1, -1 // Decrement the nested interrupt counter
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sw t1, 0(t0) // Store new nested count
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beqz t1, _tx_thread_not_nested_restore // If 0, not nested restore
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/* Interrupts are nested. */
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/* Just recover the saved registers and return to the point of
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interrupt. */
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/* Recover floating point registers. */
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#if defined(__riscv_float_abi_single)
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flw f0, 31*REGBYTES(sp) // Recover ft0
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flw f1, 32*REGBYTES(sp) // Recover ft1
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flw f2, 33*REGBYTES(sp) // Recover ft2
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flw f3, 34*REGBYTES(sp) // Recover ft3
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flw f4, 35*REGBYTES(sp) // Recover ft4
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flw f5, 36*REGBYTES(sp) // Recover ft5
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flw f6, 37*REGBYTES(sp) // Recover ft6
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flw f7, 38*REGBYTES(sp) // Recover ft7
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flw f10,41*REGBYTES(sp) // Recover fa0
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flw f11,42*REGBYTES(sp) // Recover fa1
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flw f12,43*REGBYTES(sp) // Recover fa2
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flw f13,44*REGBYTES(sp) // Recover fa3
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flw f14,45*REGBYTES(sp) // Recover fa4
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flw f15,46*REGBYTES(sp) // Recover fa5
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flw f16,47*REGBYTES(sp) // Recover fa6
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flw f17,48*REGBYTES(sp) // Recover fa7
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flw f28,59*REGBYTES(sp) // Recover ft8
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flw f29,60*REGBYTES(sp) // Recover ft9
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flw f30,61*REGBYTES(sp) // Recover ft10
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flw f31,62*REGBYTES(sp) // Recover ft11
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lw t0, 63*REGBYTES(sp) // Recover fcsr
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csrw fcsr, t0 //
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#elif defined(__riscv_float_abi_double)
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fld f0, 31*REGBYTES(sp) // Recover ft0
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fld f1, 32*REGBYTES(sp) // Recover ft1
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fld f2, 33*REGBYTES(sp) // Recover ft2
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fld f3, 34*REGBYTES(sp) // Recover ft3
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fld f4, 35*REGBYTES(sp) // Recover ft4
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fld f5, 36*REGBYTES(sp) // Recover ft5
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fld f6, 37*REGBYTES(sp) // Recover ft6
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fld f7, 38*REGBYTES(sp) // Recover ft7
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fld f10,41*REGBYTES(sp) // Recover fa0
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fld f11,42*REGBYTES(sp) // Recover fa1
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fld f12,43*REGBYTES(sp) // Recover fa2
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fld f13,44*REGBYTES(sp) // Recover fa3
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fld f14,45*REGBYTES(sp) // Recover fa4
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fld f15,46*REGBYTES(sp) // Recover fa5
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fld f16,47*REGBYTES(sp) // Recover fa6
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fld f17,48*REGBYTES(sp) // Recover fa7
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fld f28,59*REGBYTES(sp) // Recover ft8
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fld f29,60*REGBYTES(sp) // Recover ft9
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fld f30,61*REGBYTES(sp) // Recover ft10
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fld f31,62*REGBYTES(sp) // Recover ft11
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LOAD t0, 63*REGBYTES(sp) // Recover fcsr
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csrw fcsr, t0 //
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#endif
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/* Recover standard registers. */
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/* Restore registers,
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Skip global pointer because that does not change.
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Also skip the saved registers since they have been restored by any function we called,
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except s0 since we use it ourselves. */
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LOAD t0, 30*REGBYTES(sp) // Recover mepc
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csrw mepc, t0 // Setup mepc
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li t0, 0x1880 // Prepare MPIP
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#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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li t1, 1<<13
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or t0, t1, t0
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#endif
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csrw mstatus, t0 // Enable MPIP
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LOAD x1, 28*REGBYTES(sp) // Recover RA
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LOAD x5, 19*REGBYTES(sp) // Recover t0
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LOAD x6, 18*REGBYTES(sp) // Recover t1
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LOAD x7, 17*REGBYTES(sp) // Recover t2
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LOAD x8, 12*REGBYTES(sp) // Recover s0
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LOAD x10, 27*REGBYTES(sp) // Recover a0
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LOAD x11, 26*REGBYTES(sp) // Recover a1
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LOAD x12, 25*REGBYTES(sp) // Recover a2
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LOAD x13, 24*REGBYTES(sp) // Recover a3
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LOAD x14, 23*REGBYTES(sp) // Recover a4
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LOAD x15, 22*REGBYTES(sp) // Recover a5
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LOAD x16, 21*REGBYTES(sp) // Recover a6
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LOAD x17, 20*REGBYTES(sp) // Recover a7
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LOAD x28, 16*REGBYTES(sp) // Recover t3
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LOAD x29, 15*REGBYTES(sp) // Recover t4
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LOAD x30, 14*REGBYTES(sp) // Recover t5
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LOAD x31, 13*REGBYTES(sp) // Recover t6
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#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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addi sp, sp, 65*REGBYTES // Recover stack frame - with floating point enabled
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#else
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addi sp, sp, 32*REGBYTES // Recover stack frame - without floating point enabled
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#endif
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mret // Return to point of interrupt
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/* } */
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_tx_thread_not_nested_restore:
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/* Determine if a thread was interrupted and no preemption is required. */
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/* else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)
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|| (_tx_thread_preempt_disable))
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{ */
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LOAD t1, _tx_thread_current_ptr // Pickup current thread pointer
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beqz t1, _tx_thread_idle_system_restore // If NULL, idle system restore
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LOAD t2, _tx_thread_preempt_disable // Pickup preempt disable flag
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bgtz t2, _tx_thread_no_preempt_restore // If set, restore interrupted thread
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LOAD t2, _tx_thread_execute_ptr // Pickup thread execute pointer
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bne t1, t2, _tx_thread_preempt_restore // If higher-priority thread is ready, preempt
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_tx_thread_no_preempt_restore:
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/* Restore interrupted thread or ISR. */
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/* Pickup the saved stack pointer. */
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/* SP = _tx_thread_current_ptr -> tx_thread_stack_ptr; */
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LOAD sp, 2*REGBYTES(t1) // Switch back to thread's stack
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/* Recover floating point registers. */
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#if defined(__riscv_float_abi_single)
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flw f0, 31*REGBYTES(sp) // Recover ft0
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flw f1, 32*REGBYTES(sp) // Recover ft1
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flw f2, 33*REGBYTES(sp) // Recover ft2
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flw f3, 34*REGBYTES(sp) // Recover ft3
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flw f4, 35*REGBYTES(sp) // Recover ft4
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flw f5, 36*REGBYTES(sp) // Recover ft5
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flw f6, 37*REGBYTES(sp) // Recover ft6
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flw f7, 38*REGBYTES(sp) // Recover ft7
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flw f10,41*REGBYTES(sp) // Recover fa0
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flw f11,42*REGBYTES(sp) // Recover fa1
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flw f12,43*REGBYTES(sp) // Recover fa2
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flw f13,44*REGBYTES(sp) // Recover fa3
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flw f14,45*REGBYTES(sp) // Recover fa4
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flw f15,46*REGBYTES(sp) // Recover fa5
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flw f16,47*REGBYTES(sp) // Recover fa6
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flw f17,48*REGBYTES(sp) // Recover fa7
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flw f28,59*REGBYTES(sp) // Recover ft8
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flw f29,60*REGBYTES(sp) // Recover ft9
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flw f30,61*REGBYTES(sp) // Recover ft10
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flw f31,62*REGBYTES(sp) // Recover ft11
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lw t0, 63*REGBYTES(sp) // Recover fcsr
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csrw fcsr, t0 //
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#elif defined(__riscv_float_abi_double)
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fld f0, 31*REGBYTES(sp) // Recover ft0
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fld f1, 32*REGBYTES(sp) // Recover ft1
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fld f2, 33*REGBYTES(sp) // Recover ft2
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fld f3, 34*REGBYTES(sp) // Recover ft3
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fld f4, 35*REGBYTES(sp) // Recover ft4
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fld f5, 36*REGBYTES(sp) // Recover ft5
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fld f6, 37*REGBYTES(sp) // Recover ft6
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fld f7, 38*REGBYTES(sp) // Recover ft7
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fld f10,41*REGBYTES(sp) // Recover fa0
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fld f11,42*REGBYTES(sp) // Recover fa1
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fld f12,43*REGBYTES(sp) // Recover fa2
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fld f13,44*REGBYTES(sp) // Recover fa3
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fld f14,45*REGBYTES(sp) // Recover fa4
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fld f15,46*REGBYTES(sp) // Recover fa5
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fld f16,47*REGBYTES(sp) // Recover fa6
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fld f17,48*REGBYTES(sp) // Recover fa7
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fld f28,59*REGBYTES(sp) // Recover ft8
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fld f29,60*REGBYTES(sp) // Recover ft9
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fld f30,61*REGBYTES(sp) // Recover ft10
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fld f31,62*REGBYTES(sp) // Recover ft11
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LOAD t0, 63*REGBYTES(sp) // Recover fcsr
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csrw fcsr, t0 //
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#endif
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/* Recover the saved context and return to the point of interrupt. */
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/* Recover standard registers. */
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/* Restore registers,
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Skip global pointer because that does not change */
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LOAD t0, 30*REGBYTES(sp) // Recover mepc
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csrw mepc, t0 // Setup mepc
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li t0, 0x1880 // Prepare MPIP
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#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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li t1, 1<<13
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or t0, t1, t0
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#endif
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csrw mstatus, t0 // Enable MPIP
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LOAD x1, 28*REGBYTES(sp) // Recover RA
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LOAD x5, 19*REGBYTES(sp) // Recover t0
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LOAD x6, 18*REGBYTES(sp) // Recover t1
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LOAD x7, 17*REGBYTES(sp) // Recover t2
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LOAD x8, 12*REGBYTES(sp) // Recover s0
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LOAD x10, 27*REGBYTES(sp) // Recover a0
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LOAD x11, 26*REGBYTES(sp) // Recover a1
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LOAD x12, 25*REGBYTES(sp) // Recover a2
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LOAD x13, 24*REGBYTES(sp) // Recover a3
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LOAD x14, 23*REGBYTES(sp) // Recover a4
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LOAD x15, 22*REGBYTES(sp) // Recover a5
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LOAD x16, 21*REGBYTES(sp) // Recover a6
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LOAD x17, 20*REGBYTES(sp) // Recover a7
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LOAD x28, 16*REGBYTES(sp) // Recover t3
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LOAD x29, 15*REGBYTES(sp) // Recover t4
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LOAD x30, 14*REGBYTES(sp) // Recover t5
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LOAD x31, 13*REGBYTES(sp) // Recover t6
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#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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addi sp, sp, 65*REGBYTES // Recover stack frame - with floating point enabled
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#else
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addi sp, sp, 32*REGBYTES // Recover stack frame - without floating point enabled
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#endif
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mret // Return to point of interrupt
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/* }
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else
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{ */
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_tx_thread_preempt_restore:
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/* Instead of directly activating the thread again, ensure we save the
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entire stack frame by saving the remaining registers. */
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LOAD t0, 2*REGBYTES(t1) // Pickup thread's stack pointer
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ori t3, x0, 1 // Build interrupt stack type
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STORE t3, 0(t0) // Store stack type
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/* Store floating point preserved registers. */
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#ifdef __riscv_float_abi_single
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fsw f8, 39*REGBYTES(t0) // Store fs0
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fsw f9, 40*REGBYTES(t0) // Store fs1
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fsw f18, 49*REGBYTES(t0) // Store fs2
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fsw f19, 50*REGBYTES(t0) // Store fs3
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fsw f20, 51*REGBYTES(t0) // Store fs4
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fsw f21, 52*REGBYTES(t0) // Store fs5
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fsw f22, 53*REGBYTES(t0) // Store fs6
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fsw f23, 54*REGBYTES(t0) // Store fs7
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fsw f24, 55*REGBYTES(t0) // Store fs8
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fsw f25, 56*REGBYTES(t0) // Store fs9
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fsw f26, 57*REGBYTES(t0) // Store fs10
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fsw f27, 58*REGBYTES(t0) // Store fs11
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#elif defined(__riscv_float_abi_double)
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fsd f8, 39*REGBYTES(t0) // Store fs0
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fsd f9, 40*REGBYTES(t0) // Store fs1
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fsd f18, 49*REGBYTES(t0) // Store fs2
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fsd f19, 50*REGBYTES(t0) // Store fs3
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fsd f20, 51*REGBYTES(t0) // Store fs4
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fsd f21, 52*REGBYTES(t0) // Store fs5
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fsd f22, 53*REGBYTES(t0) // Store fs6
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fsd f23, 54*REGBYTES(t0) // Store fs7
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fsd f24, 55*REGBYTES(t0) // Store fs8
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fsd f25, 56*REGBYTES(t0) // Store fs9
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fsd f26, 57*REGBYTES(t0) // Store fs10
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fsd f27, 58*REGBYTES(t0) // Store fs11
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#endif
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/* Store standard preserved registers. */
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STORE x9, 11*REGBYTES(t0) // Store s1
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STORE x18, 10*REGBYTES(t0) // Store s2
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STORE x19, 9*REGBYTES(t0) // Store s3
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STORE x20, 8*REGBYTES(t0) // Store s4
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STORE x21, 7*REGBYTES(t0) // Store s5
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STORE x22, 6*REGBYTES(t0) // Store s6
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STORE x23, 5*REGBYTES(t0) // Store s7
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STORE x24, 4*REGBYTES(t0) // Store s8
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STORE x25, 3*REGBYTES(t0) // Store s9
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STORE x26, 2*REGBYTES(t0) // Store s10
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STORE x27, 1*REGBYTES(t0) // Store s11
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// Note: s0 is already stored!
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/* Save the remaining time-slice and disable it. */
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/* if (_tx_timer_time_slice)
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{ */
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la t0, _tx_timer_time_slice // Pickup time slice variable address
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lw t2, 0(t0) // Pickup time slice
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beqz t2, _tx_thread_dont_save_ts // If 0, skip time slice processing
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/* _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice
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_tx_timer_time_slice = 0; */
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sw t2, TX_THREAD_TIME_SLICE_OFFSET(t1) // Save current time slice
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sw x0, 0(t0) // Clear global time slice
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/* } */
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_tx_thread_dont_save_ts:
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/* Clear the current task pointer. */
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/* _tx_thread_current_ptr = TX_NULL; */
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/* Return to the scheduler. */
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/* _tx_thread_schedule(); */
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STORE x0, _tx_thread_current_ptr, t0 // Clear current thread pointer*/
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/* } */
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_tx_thread_idle_system_restore:
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/* Just return back to the scheduler! */
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j _tx_thread_schedule // Return to scheduler
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/* } */
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