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Firmware/MNRS-BM-BSP
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Code Issues 1 Pull Requests Projects Releases Wiki Activity
257 Commits 4 Branches 0 Tags
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Commit Graph

11 Commits

Author SHA1 Message Date
eyck 0e948fe1be updates riscv-vp memory map to mathc implementation 2026-03-15 10:42:00 +01:00
eyck 925f08e0b9 implements halt using WFI if hartid!=0 and multicore 2025-12-14 17:12:42 +01:00
eyck c8ea882b3e adds some hooks for SMT startup 2025-11-29 12:49:50 +01:00
eyck 5f220ff09b simplifies linker scripts of riscv-vp 2025-11-29 06:38:45 +01:00
eyck fce1372494 improves bsp of riscv-vp by including init.c 2025-11-21 15:40:08 +01:00
eyck 328a961276 adds csr access functions 2025-11-21 11:26:09 +01:00
eyck 703fbf67b4 fixes ROM location 2025-09-15 21:02:23 +02:00
eyck 59d0a22738 adapts riscv-vp rom to implementation 2025-09-15 20:52:50 +02:00
eyck 3df19468e9 corrects XIP start addr in risc-v vp 2025-09-14 14:55:23 +02:00
eyck b5cee82f3e adds rom linker script 2025-07-30 06:36:41 +02:00
eyck 20161cc1af adds RISCV-VP platform 2025-07-30 06:35:53 +02:00
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