move data handling into snp_checker vp

raven_spn/src/raven_spn.cpp

@@ -6,10 +6,6 @@
 using spn = spn_regs<0x90000000>;
 using spn_checker = spn_checker_regs<0x10040000>;
 
-// huge arrays of XSPN input and referance data
-extern std::array<uint8_t, 50000> input_data;
-extern std::array<double, 10000> ref_data;
-
 void run_xspn(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
     spn::mode_reg() = 0;
     spn::input_length_reg() = num_samples;      // each sample consists of 5 uint8 values
@@ -53,7 +49,7 @@ int main() {
 
     printf("Result Bytes: %d\n", result_bytes);
 
-    uint32_t step = 2000;
+    uint32_t step = 10000;
     uint32_t iterations = 5;
     
     uint32_t in_beats = (step * sample_bytes) / axi_bytes;
@@ -61,19 +57,24 @@ int main() {
     uint32_t out_beats = (step * result_bytes) / axi_bytes;
     if (out_beats * axi_bytes < step * result_bytes) out_beats++;
 
-    int in_addr  = (int)input_data.data();
-    int out_addr = 0x800B0000;
+    int in_addr  = 0x20010000; // place input samples in the SPI memory
+    int out_addr = 0x20210000;
 
-    spn_checker::ref_addr_reg() = (int)ref_data.data();
-    spn_checker::addr_reg() = out_addr;
+    // inject SPN input data
+    spn_checker::input_addr_reg() = in_addr;
+    spn_checker::num_input_samples_reg() = sample_bytes * step * iterations;
+    spn_checker::start_data_trans_reg() = 1;
 
+
+    spn_checker::output_addr_reg() = out_addr;
     for (int k = 0; k < iterations*step; k+=step) {
         run_xspn(in_addr, out_addr, step, in_beats, out_beats);
         wait_for_interrupt();
         printf("XSPN finished\n");
         spn_checker::offset_reg() = k;
         spn_checker::length_reg() = step;
-        spn_checker::start_reg() = 1;
+        spn_checker::start_result_check_reg() = 1;
+
         spn::interrupt_reg() = 1;
 
         in_addr += step * sample_bytes; // 5 bytes in each sample

raven_spn/src/spn_checker_regs.h

@@ -32,18 +32,18 @@
 //             *      spn_regs.h Author: <RDL Generator>
 //
 ////////////////////////////////////////////////////////////////////////////////
-
-#ifndef _SPN_CNTL_REGS_H_
-#define _SPN_CNTL_REGS_H_
+#pragma once
 
 #include <util/bit_field.h>
 #include <cstdint>
 
-#define SPN_CNTL_REG_START              0x00
-#define SPN_CNTL_REG_OFFSET             0x10
-#define SPN_CNTL_REG_LENGTH             0x20
-#define SPN_CNTL_REG_ADDR               0x30
-#define SPN_CNTL_REG_REF_ADDR           0x40
+#define SPN_CNTL_REG_START_RESULT_CHECK   0x00
+#define SPN_CNTL_REG_OFFSET               0x10
+#define SPN_CNTL_REG_LENGTH               0x20
+#define SPN_CNTL_REG_OUTPUT_ADDR          0x30
+#define SPN_CNTL_REG_INPUT_ADDR           0x40
+#define SPN_CNTL_REG_NUM_INPUT_SAMPLES    0x50
+#define SPN_CNTL_REG_START_DATA_TRANS     0x60
 
 template<uint32_t BASE_ADDR>
 class spn_checker_regs {
@@ -52,19 +52,22 @@ public:
 //    BEGIN_BF_DECL(start_t, uint32_t);
 //        BF_FIELD(start, 0, 1);
 //    END_BF_DECL() r_start;
-    uint32_t r_start;
+    uint32_t r_start_result_check;
 
     uint32_t r_offset;
 
     uint32_t r_length;
 
-    uint32_t r_addr;
+    uint32_t r_output_addr;
 
-    uint32_t r_ref_addr;
+    uint32_t r_input_addr;
 
+    uint32_t r_num_input_samples;
 
-    static inline uint32_t& start_reg(){
-        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_START);
+    uint32_t r_start_data_trans;
+
+    static inline uint32_t& start_result_check_reg(){
+        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_START_RESULT_CHECK);
     }
 
     static inline uint32_t & offset_reg(){
@@ -75,14 +78,20 @@ public:
         return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_LENGTH);
     }
 
-    static inline uint32_t & addr_reg(){
-        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_ADDR);
+    static inline uint32_t & output_addr_reg(){
+        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR);
     }
 
-    static inline uint32_t & ref_addr_reg(){
-        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_REF_ADDR);
+    static inline uint32_t & input_addr_reg(){
+        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR);
+    }
+
+    static inline uint32_t & num_input_samples_reg(){
+        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_NUM_INPUT_SAMPLES);
+    }
+
+    static inline uint32_t& start_data_trans_reg(){
+        return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_START_DATA_TRANS);
     }
 
 };
-
-#endif // _SPN_CNTL_REGS_H_