Merge branch 'develop'
This commit is contained in:
commit
e051cf180e
|
|
@ -0,0 +1,54 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="cdt.managedbuild.toolchain.gnu.base.1610975709">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.toolchain.gnu.base.1610975709" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration buildProperties="" id="cdt.managedbuild.toolchain.gnu.base.1610975709" name="Default" optionalBuildProperties="" parent="org.eclipse.cdt.build.core.emptycfg">
|
||||
<folderInfo id="cdt.managedbuild.toolchain.gnu.base.1610975709.1546824349" name="/" resourcePath="">
|
||||
<toolChain id="cdt.managedbuild.toolchain.gnu.base.759422847" name="Linux GCC" superClass="cdt.managedbuild.toolchain.gnu.base">
|
||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.GNU_ELF" id="cdt.managedbuild.target.gnu.platform.base.1243356996" name="Debug Platform" osList="linux,hpux,aix,qnx" superClass="cdt.managedbuild.target.gnu.platform.base"/>
|
||||
<builder id="cdt.managedbuild.target.gnu.builder.base.1892113927" managedBuildOn="false" name="Gnu Make Builder.Default" superClass="cdt.managedbuild.target.gnu.builder.base"/>
|
||||
<tool id="cdt.managedbuild.tool.gnu.archiver.base.1296149061" name="GCC Archiver" superClass="cdt.managedbuild.tool.gnu.archiver.base"/>
|
||||
<tool id="cdt.managedbuild.tool.gnu.cpp.compiler.base.407512210" name="GCC C++ Compiler" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.base">
|
||||
<inputType id="cdt.managedbuild.tool.gnu.cpp.compiler.input.1764780737" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="cdt.managedbuild.tool.gnu.c.compiler.base.1062663578" name="GCC C Compiler" superClass="cdt.managedbuild.tool.gnu.c.compiler.base">
|
||||
<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1828857752" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="cdt.managedbuild.tool.gnu.c.linker.base.774157935" name="GCC C Linker" superClass="cdt.managedbuild.tool.gnu.c.linker.base"/>
|
||||
<tool id="cdt.managedbuild.tool.gnu.cpp.linker.base.1756027799" name="GCC C++ Linker" superClass="cdt.managedbuild.tool.gnu.cpp.linker.base">
|
||||
<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.103622118" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="cdt.managedbuild.tool.gnu.assembler.base.236534392" name="GCC Assembler" superClass="cdt.managedbuild.tool.gnu.assembler.base">
|
||||
<inputType id="cdt.managedbuild.tool.gnu.assembler.input.1135961135" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="bm-bsp.null.406870477" name="bm-bsp"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>bm-bsp</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
|
|
@ -7,7 +7,7 @@
|
|||
#define MCAUSE_INT 0x80000000
|
||||
#define MCAUSE_CAUSE 0x7FFFFFFF
|
||||
|
||||
#include "rtl/const.h"
|
||||
#include "bits.h"
|
||||
/****************************************************************************
|
||||
* Platform definitions
|
||||
*****************************************************************************/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,52 @@
|
|||
EABI Name Description Saver
|
||||
x0 zero Hard-wired zero value -
|
||||
x1 ra Return address Caller
|
||||
x2 sp Stack pointer Callee
|
||||
x3 gp Global pointer -
|
||||
x4 tp Thread pointer -
|
||||
x5 t0 Temporary/link register Caller
|
||||
x6 s3 Saved register Callee
|
||||
x7 s4 Saved register Callee
|
||||
x8 s0/fp Saved register/frame pointer Callee
|
||||
x9 s1 Saved register Callee
|
||||
x10 a0 Argument/return value Caller
|
||||
x11 a1 Argument/return value Caller
|
||||
x12 a2 Argument Caller
|
||||
x13 a3 Argument Caller
|
||||
x14 s2 Saved register Callee
|
||||
x15 t1 Temporary Caller
|
||||
x16-x31 s5-s20 Saved registers Callee
|
||||
|
||||
reg ABI Use by convention Preserved?
|
||||
x0 zero hardwired to 0, ignores writes n/a
|
||||
x1 ra return address for jumps no
|
||||
x2 sp stack pointer yes
|
||||
x3 gp global pointer n/a
|
||||
x4 tp thread pointer n/a
|
||||
x5 t0 temporary register 0 no
|
||||
x6 t1 temporary register 1 no
|
||||
x7 t2 temporary register 2 no
|
||||
x8 s0/fp saved register 0 or frame pointer yes
|
||||
x9 s1 saved register 1 yes
|
||||
x10 a0 argument/return value 0 no
|
||||
x11 a1 argument/return value 1 no
|
||||
x12 a2 argument 2 no
|
||||
x13 a3 argument 3 no
|
||||
x14 a4 argument 4 no
|
||||
x15 a5 argument 5 no
|
||||
x16 a6 argument 6 no
|
||||
x17 a7 argument 7 no
|
||||
x18 s2 saved register 2 yes
|
||||
x19 s3 saved register 3 yes
|
||||
x20 s4 saved register 4 yes
|
||||
x21 s5 saved register 5 yes
|
||||
x22 s6 saved register 6 yes
|
||||
x23 s7 saved register 7 yes
|
||||
x24 s8 saved register 8 yes
|
||||
x25 s9 saved register 9 yes
|
||||
x26 s10 saved register 10 yes
|
||||
x27 s11 saved register 11 yes
|
||||
x28 t3 temporary register 3 no
|
||||
x29 t4 temporary register 4 no
|
||||
x30 t5 temporary register 5 no
|
||||
x31 t6 temporary register 6 no
|
||||
|
|
@ -1,32 +1,39 @@
|
|||
ifndef _MK_COMMON
|
||||
_MK_COMMON := # defined
|
||||
|
||||
.PHONY: all
|
||||
all: $(TARGET)
|
||||
TL_TARGET?=all
|
||||
|
||||
.PHONY: $(TL_TARGET)
|
||||
$(TL_TARGET): $(TARGET)
|
||||
|
||||
ENV_DIR:=$(dir $(lastword $(MAKEFILE_LIST)))
|
||||
BSP_BASE=$(ENV_DIR)/..
|
||||
PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
|
||||
|
||||
include $(BSP_BASE)/libwrap/libwrap.mk
|
||||
|
||||
BOARD?=iss
|
||||
ENV_DIR = $(BSP_BASE)/env
|
||||
PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
|
||||
|
||||
ASM_SRCS += $(ENV_DIR)/start.S
|
||||
ASM_SRCS += $(ENV_DIR)/entry.S
|
||||
C_SRCS += $(PLATFORM_DIR)/init.c
|
||||
ASM_SRCS += $(ENV_DIR)/start.S $(ENV_DIR)/entry.S
|
||||
C_SRCS += $(PLATFORM_DIR)/init.c
|
||||
|
||||
LINKER_SCRIPT := $(PLATFORM_DIR)/$(LINK_TARGET).lds
|
||||
LINKER_SCRIPT ?= $(PLATFORM_DIR)/$(LINK_TARGET).lds
|
||||
|
||||
INCLUDES += -I$(BSP_BASE)/include
|
||||
INCLUDES += -I$(BSP_BASE)/drivers/
|
||||
INCLUDES += -I$(ENV_DIR)
|
||||
INCLUDES += -I$(PLATFORM_DIR)
|
||||
|
||||
TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
|
||||
|
||||
LDFLAGS += -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
|
||||
LDFLAGS += -T $(LINKER_SCRIPT) -Wl,--no-warn-rwx-segments -Wl,-Map=$(TARGET).map -nostartfiles
|
||||
LDFLAGS += -L$(ENV_DIR)
|
||||
# --specs=nano.specs
|
||||
LD_SCRIPT += -T $(LINKER_SCRIPT) -Wl,--no-warn-rwx-segments -Wl,-Map=$(TARGET).map -nostartfiles
|
||||
|
||||
ifneq (,$(findstring specs=nano.specs,$(LDFLAGS), LD_SCRIPT))
|
||||
# Found
|
||||
else
|
||||
# Not found
|
||||
endif
|
||||
|
||||
|
||||
ASM_OBJS := $(ASM_SRCS:.S=.o)
|
||||
C_OBJS := $(C_SRCS:.c=.o)
|
||||
|
|
@ -53,11 +60,14 @@ CC=$(TOOL_DIR)$(TRIPLET)-gcc
|
|||
LD=$(TOOL_DIR)$(TRIPLET)-gcc
|
||||
AR=$(TOOL_DIR)$(TRIPLET)-ar
|
||||
OBJDUMP := $(TOOL_DIR)$(TRIPLET)-objdump
|
||||
OBJCOPY := $(TOOL_DIR)$(TRIPLET)-objcopy
|
||||
|
||||
|
||||
ifndef NO_DEFAULT_LINK
|
||||
$(TARGET): $(LINK_OBJS) $(LINK_DEPS)
|
||||
$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
|
||||
$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
|
||||
echo LINK_OBJS: $(LINK_OBJS)
|
||||
$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP_LDFLAGS) $(LIBWRAP) $(LD_SCRIPT) -o $@
|
||||
$(OBJDUMP) -d -S $@ > $(TARGET).dis
|
||||
endif
|
||||
|
||||
$(ASM_OBJS): %.o: %.S $(HEADERS)
|
||||
$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
/*.o
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include "platform.h"
|
||||
#include "encoding.h"
|
||||
|
||||
|
||||
extern int main(int argc, char** argv);
|
||||
extern void trap_entry(void);
|
||||
#define IRQ_M_SOFT 3
|
||||
#define IRQ_M_TIMER 7
|
||||
#define IRQ_M_EXT 11
|
||||
|
||||
#define NUM_INTERRUPTS 16
|
||||
#define MTIMER_NEXT_TICK_INC 1000
|
||||
|
||||
void handle_m_ext_interrupt(void);
|
||||
void handle_m_time_interrupt(void);
|
||||
uint32_t handle_trap(uint32_t mcause, uint32_t mepc, uint32_t sp);
|
||||
void default_handler(void);
|
||||
void _init(void);
|
||||
|
||||
typedef void (*my_interrupt_function_ptr_t) (void);
|
||||
my_interrupt_function_ptr_t localISR[NUM_INTERRUPTS] __attribute__((aligned(64)));
|
||||
|
||||
static unsigned long mtime_lo(void)
|
||||
{
|
||||
unsigned long ret;
|
||||
__asm volatile("rdtime %0":"=r"(ret));
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
#if __riscv_xlen==32
|
||||
|
||||
static uint32_t mtime_hi(void)
|
||||
{
|
||||
unsigned long ret;
|
||||
__asm volatile("rdtimeh %0":"=r"(ret));
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint64_t get_timer_value(void)
|
||||
{
|
||||
while (1) {
|
||||
uint32_t hi = mtime_hi();
|
||||
uint32_t lo = mtime_lo();
|
||||
if (hi == mtime_hi())
|
||||
return ((uint64_t)hi << 32) | lo;
|
||||
}
|
||||
}
|
||||
|
||||
#elif __riscv_xlen==64
|
||||
|
||||
uint64_t get_timer_value()
|
||||
{
|
||||
return mtime_lo();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
unsigned long get_timer_freq()
|
||||
{
|
||||
return 32768;
|
||||
}
|
||||
|
||||
unsigned long get_cpu_freq()
|
||||
{
|
||||
return 100000000;
|
||||
}
|
||||
|
||||
void init_pll(void){
|
||||
//TODO: implement initialization
|
||||
}
|
||||
|
||||
static void uart_init(size_t baud_rate)
|
||||
{
|
||||
//TODO: implement initialization
|
||||
}
|
||||
|
||||
void __attribute__((weak)) handle_m_ext_interrupt(){
|
||||
}
|
||||
|
||||
void __attribute__((weak)) handle_m_time_interrupt(){
|
||||
uint64_t time = get_aclint_mtime(aclint);
|
||||
time+=MTIMER_NEXT_TICK_INC;
|
||||
set_aclint_mtime(aclint, time);
|
||||
}
|
||||
|
||||
void __attribute__((weak)) default_handler(void) {
|
||||
puts("default handler\n");
|
||||
}
|
||||
|
||||
uint32_t handle_trap(uint32_t mcause, uint32_t mepc, uint32_t sp){
|
||||
if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
|
||||
handle_m_ext_interrupt();
|
||||
// External Machine-Level interrupt from PLIC
|
||||
} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
|
||||
handle_m_time_interrupt();
|
||||
} else {
|
||||
write(1, "trap\n", 5);
|
||||
_exit(1 + mcause);
|
||||
}
|
||||
return mepc;
|
||||
}
|
||||
|
||||
void _init()
|
||||
{
|
||||
|
||||
#ifndef NO_INIT
|
||||
init_pll();
|
||||
uart_init(115200);
|
||||
printf("core freq at %lu Hz\n", get_cpu_freq());
|
||||
write_csr(mtvec, &trap_entry);
|
||||
if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
|
||||
write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
|
||||
write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
|
||||
}
|
||||
int i=0;
|
||||
while(i<NUM_INTERRUPTS) {
|
||||
localISR[i++] = default_handler;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
void _fini(void)
|
||||
{
|
||||
}
|
||||
|
|
@ -0,0 +1,176 @@
|
|||
OUTPUT_ARCH( "riscv" )
|
||||
|
||||
ENTRY( _start )
|
||||
|
||||
MEMORY
|
||||
{
|
||||
rom (rxai!w) : ORIGIN = 0xFFFFE000, LENGTH = 4k
|
||||
flash (rxai!w) : ORIGIN = 0xE0000000, LENGTH = 4M
|
||||
ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 32K
|
||||
dram (wxa!ri) : ORIGIN = 0x00000000, LENGTH = 256M
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
flash PT_LOAD;
|
||||
ram_init PT_LOAD;
|
||||
ram PT_NULL;
|
||||
dram PT_NULL;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
|
||||
|
||||
.init ORIGIN(flash) :
|
||||
{
|
||||
KEEP (*(SORT_NONE(.init)))
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.text :
|
||||
{
|
||||
*(.text.unlikely .text.unlikely.*)
|
||||
*(.text.startup .text.startup.*)
|
||||
*(.text .text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP (*(SORT_NONE(.fini)))
|
||||
} >flash AT>flash :flash
|
||||
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
|
||||
.rodata :
|
||||
{
|
||||
*(.rdata)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
} >flash AT>flash :flash
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.lalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data_lma = . );
|
||||
} >flash AT>flash :flash
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data = . );
|
||||
} >ram AT>flash :ram_init
|
||||
|
||||
.data :
|
||||
{
|
||||
__DATA_BEGIN__ = .;
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
} >ram AT>flash :ram_init
|
||||
|
||||
.srodata :
|
||||
{
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
} >ram AT>flash :ram_init
|
||||
|
||||
.sdata :
|
||||
{
|
||||
__SDATA_BEGIN__ = .;
|
||||
*(.sdata .sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
} >ram AT>flash :ram_init
|
||||
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = . );
|
||||
PROVIDE( edata = . );
|
||||
|
||||
PROVIDE( _fbss = . );
|
||||
PROVIDE( __bss_start = . );
|
||||
.bss :
|
||||
{
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
} >ram AT>ram :ram
|
||||
|
||||
. = ALIGN(8);
|
||||
__BSS_END__ = .;
|
||||
__global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800, MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
|
||||
PROVIDE( _end = . );
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = __stack_size;
|
||||
PROVIDE( _sp = . );
|
||||
} >ram AT>ram :ram
|
||||
|
||||
PROVIDE( tohost = 0xfffffff0 );
|
||||
PROVIDE( fromhost = 0xfffffff8 );
|
||||
}
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
// See LICENSE for license details.
|
||||
|
||||
#ifndef _ISS_PLATFORM_H
|
||||
#define _ISS_PLATFORM_H
|
||||
|
||||
#if __riscv_xlen == 32
|
||||
#define MCAUSE_INT 0x80000000UL
|
||||
#define MCAUSE_CAUSE 0x000003FFUL
|
||||
#else
|
||||
#define MCAUSE_INT 0x8000000000000000UL
|
||||
#define MCAUSE_CAUSE 0x00000000000003FFUL
|
||||
#endif
|
||||
|
||||
#define APB_BUS
|
||||
|
||||
#include "ehrenberg/devices/gpio.h"
|
||||
#include "ehrenberg/devices/uart.h"
|
||||
#include "ehrenberg/devices/timer.h"
|
||||
#include "ehrenberg/devices/aclint.h"
|
||||
#include "ehrenberg/devices/interrupt.h"
|
||||
#include "ehrenberg/devices/qspi.h"
|
||||
|
||||
#define PERIPH(TYPE, ADDR) ((volatile TYPE*) (ADDR))
|
||||
|
||||
#define APB_BASE 0xF0000000
|
||||
|
||||
#define gpio PERIPH(gpio_t, APB_BASE+0x0000)
|
||||
#define uart PERIPH(uart_t, APB_BASE+0x1000)
|
||||
#define timer PERIPH(timer_t, APB_BASE+0x20000)
|
||||
#define aclint PERIPH(aclint_t, APB_BASE+0x30000)
|
||||
#define irq PERIPH(irq_t, APB_BASE+0x40000)
|
||||
#define qspi PERIPH(qspi_t, APB_BASE+0x50000)
|
||||
|
||||
#define XIP_START_LOC 0xE0040000
|
||||
|
||||
// Misc
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void init_pll(void);
|
||||
unsigned long get_cpu_freq(void);
|
||||
unsigned long get_timer_freq(void);
|
||||
|
||||
#endif /* _ISS_PLATFORM_H */
|
||||
|
|
@ -4,91 +4,73 @@
|
|||
#define ENTRY_S
|
||||
|
||||
#include "encoding.h"
|
||||
#include "rtl/bits.h"
|
||||
#include "bits.h"
|
||||
|
||||
.section .text.entry
|
||||
.align 2
|
||||
.global trap_entry
|
||||
trap_entry:
|
||||
addi sp, sp, -32*REGBYTES
|
||||
|
||||
STORE x1, 1*REGBYTES(sp)
|
||||
STORE x2, 2*REGBYTES(sp)
|
||||
STORE x3, 3*REGBYTES(sp)
|
||||
STORE x4, 4*REGBYTES(sp)
|
||||
STORE x5, 5*REGBYTES(sp)
|
||||
STORE x6, 6*REGBYTES(sp)
|
||||
STORE x7, 7*REGBYTES(sp)
|
||||
STORE x8, 8*REGBYTES(sp)
|
||||
STORE x9, 9*REGBYTES(sp)
|
||||
STORE x10, 10*REGBYTES(sp)
|
||||
STORE x11, 11*REGBYTES(sp)
|
||||
STORE x12, 12*REGBYTES(sp)
|
||||
STORE x13, 13*REGBYTES(sp)
|
||||
STORE x14, 14*REGBYTES(sp)
|
||||
STORE x15, 15*REGBYTES(sp)
|
||||
#ifndef __riscv_abi_rve
|
||||
STORE x16, 16*REGBYTES(sp)
|
||||
STORE x17, 17*REGBYTES(sp)
|
||||
STORE x18, 18*REGBYTES(sp)
|
||||
STORE x19, 19*REGBYTES(sp)
|
||||
STORE x20, 20*REGBYTES(sp)
|
||||
STORE x21, 21*REGBYTES(sp)
|
||||
STORE x22, 22*REGBYTES(sp)
|
||||
STORE x23, 23*REGBYTES(sp)
|
||||
STORE x24, 24*REGBYTES(sp)
|
||||
STORE x25, 25*REGBYTES(sp)
|
||||
STORE x26, 26*REGBYTES(sp)
|
||||
STORE x27, 27*REGBYTES(sp)
|
||||
STORE x28, 28*REGBYTES(sp)
|
||||
STORE x29, 29*REGBYTES(sp)
|
||||
STORE x30, 30*REGBYTES(sp)
|
||||
STORE x31, 31*REGBYTES(sp)
|
||||
addi sp, sp, -8*REGBYTES
|
||||
STORE x1, 1*REGBYTES(sp) // ra
|
||||
STORE x5, 2*REGBYTES(sp) // t0
|
||||
STORE x10, 3*REGBYTES(sp) // a0
|
||||
STORE x11, 4*REGBYTES(sp) // a1
|
||||
STORE x12, 5*REGBYTES(sp) // a2
|
||||
STORE x13, 6*REGBYTES(sp) // a3
|
||||
STORE x15, 7*REGBYTES(sp) // t1
|
||||
#else
|
||||
addi sp, sp, -16*REGBYTES
|
||||
STORE x1, 1*REGBYTES(sp) // ra
|
||||
STORE x5, 2*REGBYTES(sp) // t0
|
||||
STORE x6, 3*REGBYTES(sp) // t1
|
||||
STORE x7, 4*REGBYTES(sp) // t2
|
||||
STORE x10, 5*REGBYTES(sp) // a0
|
||||
STORE x11, 6*REGBYTES(sp) // a1
|
||||
STORE x12, 7*REGBYTES(sp) // a2
|
||||
STORE x13, 8*REGBYTES(sp) // a3
|
||||
STORE x14, 9*REGBYTES(sp) // a4
|
||||
STORE x15, 10*REGBYTES(sp) // a5
|
||||
STORE x16, 11*REGBYTES(sp) // a6
|
||||
STORE x17, 12*REGBYTES(sp) // a7
|
||||
STORE x28, 13*REGBYTES(sp) // t3
|
||||
STORE x29, 14*REGBYTES(sp) // t4
|
||||
STORE x30, 15*REGBYTES(sp) // t5
|
||||
STORE x31, 16*REGBYTES(sp) // t6
|
||||
#endif
|
||||
csrr a0, mcause
|
||||
csrr a1, mepc
|
||||
mv a2, sp
|
||||
call handle_trap
|
||||
csrw mepc, a0
|
||||
|
||||
# Remain in M-mode after mret
|
||||
li t0, MSTATUS_MPP
|
||||
csrs mstatus, t0
|
||||
|
||||
LOAD x1, 1*REGBYTES(sp)
|
||||
LOAD x2, 2*REGBYTES(sp)
|
||||
LOAD x3, 3*REGBYTES(sp)
|
||||
LOAD x4, 4*REGBYTES(sp)
|
||||
LOAD x5, 5*REGBYTES(sp)
|
||||
LOAD x6, 6*REGBYTES(sp)
|
||||
LOAD x7, 7*REGBYTES(sp)
|
||||
LOAD x8, 8*REGBYTES(sp)
|
||||
LOAD x9, 9*REGBYTES(sp)
|
||||
LOAD x10, 10*REGBYTES(sp)
|
||||
LOAD x11, 11*REGBYTES(sp)
|
||||
LOAD x12, 12*REGBYTES(sp)
|
||||
LOAD x13, 13*REGBYTES(sp)
|
||||
LOAD x14, 14*REGBYTES(sp)
|
||||
LOAD x15, 15*REGBYTES(sp)
|
||||
#ifndef __riscv_abi_rve
|
||||
LOAD x16, 16*REGBYTES(sp)
|
||||
LOAD x17, 17*REGBYTES(sp)
|
||||
LOAD x18, 18*REGBYTES(sp)
|
||||
LOAD x19, 19*REGBYTES(sp)
|
||||
LOAD x20, 20*REGBYTES(sp)
|
||||
LOAD x21, 21*REGBYTES(sp)
|
||||
LOAD x22, 22*REGBYTES(sp)
|
||||
LOAD x23, 23*REGBYTES(sp)
|
||||
LOAD x24, 24*REGBYTES(sp)
|
||||
LOAD x25, 25*REGBYTES(sp)
|
||||
LOAD x26, 26*REGBYTES(sp)
|
||||
LOAD x27, 27*REGBYTES(sp)
|
||||
LOAD x28, 28*REGBYTES(sp)
|
||||
LOAD x29, 29*REGBYTES(sp)
|
||||
LOAD x30, 30*REGBYTES(sp)
|
||||
LOAD x31, 31*REGBYTES(sp)
|
||||
addi sp, sp, -8*REGBYTES
|
||||
LOAD x1, 1*REGBYTES(sp) // ra
|
||||
LOAD x5, 2*REGBYTES(sp) // t0
|
||||
LOAD x10, 3*REGBYTES(sp) // a0
|
||||
LOAD x11, 4*REGBYTES(sp) // a1
|
||||
LOAD x12, 5*REGBYTES(sp) // a2
|
||||
LOAD x13, 6*REGBYTES(sp) // a3
|
||||
LOAD x15, 7*REGBYTES(sp) // t1
|
||||
#else
|
||||
addi sp, sp, -16*REGBYTES
|
||||
LOAD x1, 1*REGBYTES(sp) // ra
|
||||
LOAD x5, 2*REGBYTES(sp) // t0
|
||||
LOAD x6, 3*REGBYTES(sp) // t1
|
||||
LOAD x7, 4*REGBYTES(sp) // t2
|
||||
LOAD x10, 5*REGBYTES(sp) // a0
|
||||
LOAD x11, 6*REGBYTES(sp) // a1
|
||||
LOAD x12, 7*REGBYTES(sp) // a2
|
||||
LOAD x13, 8*REGBYTES(sp) // a3
|
||||
LOAD x14, 9*REGBYTES(sp) // a4
|
||||
LOAD x15, 10*REGBYTES(sp) // a5
|
||||
LOAD x16, 11*REGBYTES(sp) // a6
|
||||
LOAD x17, 12*REGBYTES(sp) // a7
|
||||
LOAD x28, 13*REGBYTES(sp) // t3
|
||||
LOAD x29, 14*REGBYTES(sp) // t4
|
||||
LOAD x30, 15*REGBYTES(sp) // t5
|
||||
LOAD x31, 16*REGBYTES(sp) // t6
|
||||
#endif
|
||||
addi sp, sp, 32*REGBYTES
|
||||
mret
|
||||
|
||||
.weak handle_trap
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include "../hifive1/platform.h"
|
||||
#include "platform.h"
|
||||
#include "encoding.h"
|
||||
|
||||
extern int main(int argc, char** argv);
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#define MCAUSE_INT 0x80000000
|
||||
#define MCAUSE_CAUSE 0x7FFFFFFF
|
||||
|
||||
#include "sifive/const.h"
|
||||
#include "bits.h"
|
||||
#include "sifive/devices/aon.h"
|
||||
#include "sifive/devices/clint.h"
|
||||
#include "sifive/devices/gpio.h"
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#define MCAUSE_INT 0x80000000
|
||||
#define MCAUSE_CAUSE 0x7FFFFFFF
|
||||
|
||||
#include "rtl/const.h"
|
||||
#include "bits.h"
|
||||
/****************************************************************************
|
||||
* Platform definitions
|
||||
*****************************************************************************/
|
||||
|
|
|
|||
|
|
@ -7,7 +7,18 @@
|
|||
#define MCAUSE_INT 0x80000000
|
||||
#define MCAUSE_CAUSE 0x7FFFFFFF
|
||||
|
||||
#include "rtl/const.h"
|
||||
#define UART0_BASE_ADDR 0xffff0000ULL
|
||||
|
||||
#define UART_REG_TXFIFO 0x00
|
||||
#define UART_REG_RXFIFO 0x04
|
||||
#define UART_REG_TXCTRL 0x08
|
||||
#define UART_REG_RXCTRL 0x0c
|
||||
#define UART_REG_IE 0x10
|
||||
#define UART_REG_IP 0x14
|
||||
#define UART_REG_DIV 0x18
|
||||
#define UART_TXEN 0x1
|
||||
|
||||
#define UART0_REG(ADDR) *((volatile uint32_t*) (UART0_BASE_ADDR + ADDR))
|
||||
/****************************************************************************
|
||||
* Platform definitions
|
||||
*****************************************************************************/
|
||||
|
|
|
|||
|
|
@ -5,10 +5,10 @@
|
|||
.type _start,@function
|
||||
|
||||
_start:
|
||||
la gp, trap_entry
|
||||
csrw mtvec, gp
|
||||
.option push
|
||||
.option norelax
|
||||
la gp, trap_entry
|
||||
csrw mtvec, gp
|
||||
la gp, __global_pointer$
|
||||
.option pop
|
||||
la sp, _sp
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#define MCAUSE_INT 0x80000000
|
||||
#define MCAUSE_CAUSE 0x7FFFFFFF
|
||||
|
||||
#include "tgc-vp/const.h"
|
||||
#include "bits.h"
|
||||
#include "tgc-vp/devices/aon.h"
|
||||
#include "tgc-vp/devices/clint.h"
|
||||
#include "tgc-vp/devices/gpio.h"
|
||||
|
|
|
|||
|
|
@ -32,4 +32,15 @@
|
|||
#endif
|
||||
#define REGBYTES (1 << LOG_REGBYTES)
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define _AC(X,Y) X
|
||||
#define _AT(T,X) X
|
||||
#else
|
||||
#define _AC(X,Y) (X##Y)
|
||||
#define _AT(T,X) ((T)(X))
|
||||
#endif /* !__ASSEMBLER__*/
|
||||
|
||||
#define _BITUL(x) (_AC(1,UL) << (x))
|
||||
#define _BITULL(x) (_AC(1,ULL) << (x))
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
#ifndef _BSP_ACLINT_H
|
||||
#define _BSP_ACLINT_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3AClint.h"
|
||||
|
||||
#define aclint_t apb3aclint_t
|
||||
|
||||
static void set_aclint_mtime(volatile aclint_t* reg, uint64_t value){
|
||||
set_aclint_mtime_hi(reg, (uint32_t)(value >> 32));
|
||||
set_aclint_mtime_lo(reg, (uint32_t)value);
|
||||
}
|
||||
|
||||
static uint64_t get_aclint_mtime(volatile aclint_t* reg){
|
||||
uint64_t value = ((uint64_t)get_aclint_mtime_hi(reg) << 32) | (uint64_t)get_aclint_mtime_lo(reg);
|
||||
return value;
|
||||
}
|
||||
|
||||
static void set_aclint_mtimecmp(volatile aclint_t* reg, uint64_t value){
|
||||
set_aclint_mtimecmp0hi(reg, (uint32_t)(value >> 32));
|
||||
set_aclint_mtimecmp0lo(reg, (uint32_t)value);
|
||||
}
|
||||
|
||||
static uint64_t get_aclint_mtimecmp(volatile aclint_t* reg){
|
||||
uint64_t value = ((uint64_t)get_aclint_mtimecmp0hi(reg) << 32) | (uint64_t)get_aclint_mtimecmp0lo(reg);
|
||||
return value;
|
||||
}
|
||||
|
||||
#endif /* _BSP_ACLINT_H */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3ACLINT_H
|
||||
#define _BSP_APB3ACLINT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t MSIP0;
|
||||
volatile uint32_t MTIMECMP0LO;
|
||||
volatile uint32_t MTIMECMP0HI;
|
||||
volatile uint32_t MTIME_LO;
|
||||
volatile uint32_t MTIME_HI;
|
||||
}apb3aclint_t;
|
||||
|
||||
inline uint32_t get_aclint_msip0(volatile apb3aclint_t *reg){
|
||||
return (reg->MSIP0 >> 0) & 0x1;
|
||||
}
|
||||
inline void set_aclint_msip0(volatile apb3aclint_t *reg, uint8_t value){
|
||||
reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_aclint_mtimecmp0lo(volatile apb3aclint_t *reg){
|
||||
return (reg->MTIMECMP0LO >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_aclint_mtimecmp0lo(volatile apb3aclint_t *reg, uint32_t value){
|
||||
reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_aclint_mtimecmp0hi(volatile apb3aclint_t *reg){
|
||||
return (reg->MTIMECMP0HI >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_aclint_mtimecmp0hi(volatile apb3aclint_t *reg, uint32_t value){
|
||||
reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_aclint_mtime_lo(volatile apb3aclint_t *reg){
|
||||
return (reg->MTIME_LO >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_aclint_mtime_lo(volatile apb3aclint_t *reg, uint32_t value){
|
||||
reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_aclint_mtime_hi(volatile apb3aclint_t *reg){
|
||||
return (reg->MTIME_HI >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_aclint_mtime_hi(volatile apb3aclint_t *reg, uint32_t value){
|
||||
reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
#endif /* _BSP_APB3ACLINT_H */
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3GPIO_H
|
||||
#define _BSP_APB3GPIO_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t VALUE;
|
||||
volatile uint32_t WRITE;
|
||||
volatile uint32_t WRITEENABLE;
|
||||
}apb3gpio_t;
|
||||
|
||||
inline uint32_t get_gpio_value(volatile apb3gpio_t *reg){
|
||||
return (reg->VALUE >> 0) & 0xffffffff;
|
||||
}
|
||||
inline uint32_t get_gpio_write(volatile apb3gpio_t *reg){
|
||||
return (reg->WRITE >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_gpio_write(volatile apb3gpio_t *reg, uint32_t value){
|
||||
reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_gpio_writeEnable(volatile apb3gpio_t *reg){
|
||||
return (reg->WRITEENABLE >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_gpio_writeEnable(volatile apb3gpio_t *reg, uint32_t value){
|
||||
reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
#endif /* _BSP_APB3GPIO_H */
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3IRQCTRL_H
|
||||
#define _BSP_APB3IRQCTRL_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t PENDINGSREG;
|
||||
volatile uint32_t MASKSREG;
|
||||
}apb3irqctrl_t;
|
||||
|
||||
inline uint32_t get_irq_pendingsReg(volatile apb3irqctrl_t *reg){
|
||||
return (reg->PENDINGSREG >> 0) & 0xf;
|
||||
}
|
||||
inline void set_irq_pendingsReg(volatile apb3irqctrl_t *reg, uint8_t value){
|
||||
reg->PENDINGSREG = (reg->PENDINGSREG & ~(0xfU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_irq_masksReg(volatile apb3irqctrl_t *reg){
|
||||
return (reg->MASKSREG >> 0) & 0xf;
|
||||
}
|
||||
inline void set_irq_masksReg(volatile apb3irqctrl_t *reg, uint8_t value){
|
||||
reg->MASKSREG = (reg->MASKSREG & ~(0xfU << 0)) | (value << 0);
|
||||
}
|
||||
#endif /* _BSP_APB3IRQCTRL_H */
|
||||
|
|
@ -0,0 +1,214 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3SPIXDRMASTERCTRL_H
|
||||
#define _BSP_APB3SPIXDRMASTERCTRL_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t DATA;
|
||||
volatile uint32_t STATUS;
|
||||
volatile uint32_t CONFIG;
|
||||
volatile uint32_t INTR;
|
||||
uint32_t fill0[4];
|
||||
volatile uint32_t SCLK_CONFIG;
|
||||
volatile uint32_t SSGEN_SETUP;
|
||||
volatile uint32_t SSGEN_HOLD;
|
||||
volatile uint32_t SSGEN_DISABLE;
|
||||
volatile uint32_t SSGEN_ACTIVE_HIGH;
|
||||
uint32_t fill1[3];
|
||||
volatile uint32_t XIP_ENABLE;
|
||||
volatile uint32_t XIP_CONFIG;
|
||||
volatile uint32_t XIP_MODE;
|
||||
uint32_t fill2[1];
|
||||
volatile uint32_t XIP_WRITE;
|
||||
volatile uint32_t XIP_READ_WRITE;
|
||||
volatile uint32_t XIP_READ;
|
||||
}apb3spixdrmasterctrl_t;
|
||||
|
||||
#define SPI_XIP_CONFIG_INSTRUCTION_OFFS 0
|
||||
#define SPI_XIP_CONFIG_INSTRUCTION_MASK 0xff
|
||||
#define SPI_XIP_CONFIG_INSTRUCTION(V) ((V & SPI_XIP_CONFIG_INSTRUCTION_MASK) << SPI_XIP_CONFIG_INSTRUCTION_OFFS)
|
||||
|
||||
#define SPI_XIP_CONFIG_ENABLE_OFFS 8
|
||||
#define SPI_XIP_CONFIG_ENABLE_MASK 1
|
||||
#define SPI_XIP_CONFIG_ENABLE(V) ((V & SPI_XIP_CONFIG_ENABLE_MASK) << SPI_XIP_CONFIG_ENABLE_OFFS)
|
||||
|
||||
#define SPI_XIP_CONFIG_DUMMY_VALUE_OFFS 16
|
||||
#define SPI_XIP_CONFIG_DUMMY_VALUE_MASK 0xff
|
||||
#define SPI_XIP_CONFIG_DUMMY_VALUE(V) ((V & SPI_XIP_CONFIG_DUMMY_VALUE_MASK) << SPI_XIP_CONFIG_DUMMY_VALUE_OFFS)
|
||||
|
||||
#define SPI_XIP_CONFIG_DUMMY_COUNT_OFFS 24
|
||||
#define SPI_XIP_CONFIG_DUMMY_COUNT_MASK 0xf
|
||||
#define SPI_XIP_CONFIG_DUMMY_COUNT(V) ((V & SPI_XIP_CONFIG_DUMMY_COUNT_MASK) << SPI_XIP_CONFIG_DUMMY_COUNT_OFFS)
|
||||
|
||||
inline void set_spi_data_data(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->DATA = (reg->DATA & ~(0xffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_data_write(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->DATA >> 8) & 0x1;
|
||||
}
|
||||
inline void set_spi_data_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->DATA = (reg->DATA & ~(0x1U << 8)) | (value << 8);
|
||||
}
|
||||
inline uint32_t get_spi_data_read(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->DATA >> 9) & 0x1;
|
||||
}
|
||||
inline void set_spi_data_read(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->DATA = (reg->DATA & ~(0x1U << 9)) | (value << 9);
|
||||
}
|
||||
inline uint32_t get_spi_data_kind(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->DATA >> 11) & 0x1;
|
||||
}
|
||||
inline void set_spi_data_kind(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->DATA = (reg->DATA & ~(0x1U << 11)) | (value << 11);
|
||||
}
|
||||
inline uint32_t get_spi_data_rx_data_invalid(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->DATA >> 31) & 0x1;
|
||||
}
|
||||
inline uint32_t get_spi_status_tx_free(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->STATUS >> 0) & 0x3f;
|
||||
}
|
||||
inline uint32_t get_spi_status_rx_avail(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->STATUS >> 16) & 0x3f;
|
||||
}
|
||||
inline uint32_t get_spi_config_kind(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->CONFIG >> 0) & 0x3;
|
||||
}
|
||||
inline void set_spi_config_kind(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_config_mode(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->CONFIG >> 4) & 0x7;
|
||||
}
|
||||
inline void set_spi_config_mode(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->CONFIG = (reg->CONFIG & ~(0x7U << 4)) | (value << 4);
|
||||
}
|
||||
inline uint32_t get_spi_intr_tx_ie(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->INTR >> 0) & 0x1;
|
||||
}
|
||||
inline void set_spi_intr_tx_ie(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->INTR = (reg->INTR & ~(0x1U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_intr_rx_ie(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->INTR >> 1) & 0x1;
|
||||
}
|
||||
inline void set_spi_intr_rx_ie(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->INTR = (reg->INTR & ~(0x1U << 1)) | (value << 1);
|
||||
}
|
||||
inline uint32_t get_spi_intr_tx_ip(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->INTR >> 8) & 0x1;
|
||||
}
|
||||
inline uint32_t get_spi_intr_rx_ip(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->INTR >> 9) & 0x1;
|
||||
}
|
||||
inline uint32_t get_spi_intr_tx_active(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->INTR >> 16) & 0x1;
|
||||
}
|
||||
inline uint32_t get_spi_sclk_config(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->SCLK_CONFIG >> 0) & 0xfff;
|
||||
}
|
||||
inline void set_spi_sclk_config(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){
|
||||
reg->SCLK_CONFIG = (reg->SCLK_CONFIG & ~(0xfffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_ssgen_setup(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->SSGEN_SETUP >> 0) & 0xfff;
|
||||
}
|
||||
inline void set_spi_ssgen_setup(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){
|
||||
reg->SSGEN_SETUP = (reg->SSGEN_SETUP & ~(0xfffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_ssgen_hold(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->SSGEN_HOLD >> 0) & 0xfff;
|
||||
}
|
||||
inline void set_spi_ssgen_hold(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){
|
||||
reg->SSGEN_HOLD = (reg->SSGEN_HOLD & ~(0xfffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_ssgen_disable(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->SSGEN_DISABLE >> 0) & 0xfff;
|
||||
}
|
||||
inline void set_spi_ssgen_disable(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){
|
||||
reg->SSGEN_DISABLE = (reg->SSGEN_DISABLE & ~(0xfffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_ssgen_active_high(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->SSGEN_ACTIVE_HIGH >> 0) & 0x1;
|
||||
}
|
||||
inline void set_spi_ssgen_active_high(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->SSGEN_ACTIVE_HIGH = (reg->SSGEN_ACTIVE_HIGH & ~(0x1U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_xip_enable(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_ENABLE >> 0) & 0x1;
|
||||
}
|
||||
inline void set_spi_xip_enable(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_ENABLE = (reg->XIP_ENABLE & ~(0x1U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_xip_config(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return reg->XIP_CONFIG;
|
||||
}
|
||||
inline void set_spi_xip_config(volatile apb3spixdrmasterctrl_t *reg, uint32_t value){
|
||||
reg->XIP_CONFIG = value;
|
||||
}
|
||||
inline uint32_t get_spi_xip_config_instruction(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_CONFIG >> 0) & 0xff;
|
||||
}
|
||||
inline void set_spi_xip_config_instruction(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_xip_config_enable(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_CONFIG >> 8) & 0x1;
|
||||
}
|
||||
inline void set_spi_xip_config_enable(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0x1U << 8)) | (value << 8);
|
||||
}
|
||||
inline uint32_t get_spi_xip_config_dummy_value(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_CONFIG >> 16) & 0xff;
|
||||
}
|
||||
inline void set_spi_xip_config_dummy_value(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 16)) | (value << 16);
|
||||
}
|
||||
inline uint32_t get_spi_xip_config_dummy_count(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_CONFIG >> 24) & 0xf;
|
||||
}
|
||||
inline void set_spi_xip_config_dummy_count(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xfU << 24)) | (value << 24);
|
||||
}
|
||||
inline uint32_t get_spi_xip_mode_instruction(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_MODE >> 0) & 0x7;
|
||||
}
|
||||
inline void set_spi_xip_mode_instruction(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_xip_mode_address(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_MODE >> 8) & 0x7;
|
||||
}
|
||||
inline void set_spi_xip_mode_address(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 8)) | (value << 8);
|
||||
}
|
||||
inline uint32_t get_spi_xip_mode_dummy(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_MODE >> 16) & 0x7;
|
||||
}
|
||||
inline void set_spi_xip_mode_dummy(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 16)) | (value << 16);
|
||||
}
|
||||
inline uint32_t get_spi_xip_mode_payload(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_MODE >> 24) & 0x7;
|
||||
}
|
||||
inline void set_spi_xip_mode_payload(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 24)) | (value << 24);
|
||||
}
|
||||
inline void set_spi_xip_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_WRITE = (reg->XIP_WRITE & ~(0xffU << 0)) | (value << 0);
|
||||
}
|
||||
inline void set_spi_xip_read_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){
|
||||
reg->XIP_READ_WRITE = (reg->XIP_READ_WRITE & ~(0xffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_spi_xip_read(volatile apb3spixdrmasterctrl_t *reg){
|
||||
return (reg->XIP_READ >> 0) & 0xff;
|
||||
}
|
||||
#endif /* _BSP_APB3SPIXDRMASTERCTRL_H */
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3TIMER_H
|
||||
#define _BSP_APB3TIMER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t PRESCALER;
|
||||
volatile uint32_t T0_CTRL;
|
||||
volatile uint32_t T0_OVERFLOW;
|
||||
volatile uint32_t T0_VALUE;
|
||||
volatile uint32_t T1_CTRL;
|
||||
volatile uint32_t T1_OVERFLOW;
|
||||
volatile uint32_t T1_VALUE;
|
||||
}apb3timer_t;
|
||||
|
||||
inline uint32_t get_timer_prescaler(volatile apb3timer_t *reg){
|
||||
return (reg->PRESCALER >> 0) & 0xffff;
|
||||
}
|
||||
inline void set_timer_prescaler(volatile apb3timer_t *reg, uint16_t value){
|
||||
reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_timer_t0_ctrl_enable(volatile apb3timer_t *reg){
|
||||
return (reg->T0_CTRL >> 0) & 0x7;
|
||||
}
|
||||
inline void set_timer_t0_ctrl_enable(volatile apb3timer_t *reg, uint8_t value){
|
||||
reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_timer_t0_ctrl_clear(volatile apb3timer_t *reg){
|
||||
return (reg->T0_CTRL >> 3) & 0x3;
|
||||
}
|
||||
inline void set_timer_t0_ctrl_clear(volatile apb3timer_t *reg, uint8_t value){
|
||||
reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3);
|
||||
}
|
||||
inline uint32_t get_timer_t0_overflow(volatile apb3timer_t *reg){
|
||||
return (reg->T0_OVERFLOW >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_timer_t0_overflow(volatile apb3timer_t *reg, uint32_t value){
|
||||
reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_timer_t0_value(volatile apb3timer_t *reg){
|
||||
return (reg->T0_VALUE >> 0) & 0xffffffff;
|
||||
}
|
||||
inline uint32_t get_timer_t1_ctrl_enable(volatile apb3timer_t *reg){
|
||||
return (reg->T1_CTRL >> 0) & 0x7;
|
||||
}
|
||||
inline void set_timer_t1_ctrl_enable(volatile apb3timer_t *reg, uint8_t value){
|
||||
reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_timer_t1_ctrl_clear(volatile apb3timer_t *reg){
|
||||
return (reg->T1_CTRL >> 3) & 0x3;
|
||||
}
|
||||
inline void set_timer_t1_ctrl_clear(volatile apb3timer_t *reg, uint8_t value){
|
||||
reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3);
|
||||
}
|
||||
inline uint32_t get_timer_t1_overflow(volatile apb3timer_t *reg){
|
||||
return (reg->T1_OVERFLOW >> 0) & 0xffffffff;
|
||||
}
|
||||
inline void set_timer_t1_overflow(volatile apb3timer_t *reg, uint32_t value){
|
||||
reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_timer_t1_value(volatile apb3timer_t *reg){
|
||||
return (reg->T1_VALUE >> 0) & 0xffffffff;
|
||||
}
|
||||
#endif /* _BSP_APB3TIMER_H */
|
||||
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Generated at 2024-02-19 14:24:37 UTC
|
||||
* by peakrdl_mnrs version 1.2.2
|
||||
*/
|
||||
|
||||
#ifndef _BSP_APB3UART_H
|
||||
#define _BSP_APB3UART_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct __attribute((__packed__)) {
|
||||
volatile uint32_t RX_TX_REG;
|
||||
volatile uint32_t INT_CTRL_REG;
|
||||
volatile uint32_t CLK_DIVIDER_REG;
|
||||
volatile uint32_t FRAME_CONFIG_REG;
|
||||
volatile uint32_t STATUS_REG;
|
||||
}apb3uart_t;
|
||||
|
||||
inline uint32_t get_uart_rx_tx_reg_data(volatile apb3uart_t *reg){
|
||||
return (reg->RX_TX_REG >> 0) & 0xff;
|
||||
}
|
||||
inline void set_uart_rx_tx_reg_data(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile apb3uart_t *reg){
|
||||
return (reg->RX_TX_REG >> 14) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_rx_tx_reg_tx_free(volatile apb3uart_t *reg){
|
||||
return (reg->RX_TX_REG >> 15) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg){
|
||||
return (reg->INT_CTRL_REG >> 0) & 0x1;
|
||||
}
|
||||
inline void set_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg){
|
||||
return (reg->INT_CTRL_REG >> 1) & 0x1;
|
||||
}
|
||||
inline void set_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1);
|
||||
}
|
||||
inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile apb3uart_t *reg){
|
||||
return (reg->INT_CTRL_REG >> 8) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile apb3uart_t *reg){
|
||||
return (reg->INT_CTRL_REG >> 9) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_clk_divider_reg(volatile apb3uart_t *reg){
|
||||
return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff;
|
||||
}
|
||||
inline void set_uart_clk_divider_reg(volatile apb3uart_t *reg, uint32_t value){
|
||||
reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg){
|
||||
return (reg->FRAME_CONFIG_REG >> 0) & 0x7;
|
||||
}
|
||||
inline void set_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0);
|
||||
}
|
||||
inline uint32_t get_uart_frame_config_reg_parity(volatile apb3uart_t *reg){
|
||||
return (reg->FRAME_CONFIG_REG >> 3) & 0x3;
|
||||
}
|
||||
inline void set_uart_frame_config_reg_parity(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3);
|
||||
}
|
||||
inline uint32_t get_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg){
|
||||
return (reg->FRAME_CONFIG_REG >> 5) & 0x1;
|
||||
}
|
||||
inline void set_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5);
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_read_error(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 0) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_stall(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 1) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_break(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 8) & 0x1;
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_break_detected(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 9) & 0x1;
|
||||
}
|
||||
inline void set_uart_status_reg_break_detected(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9);
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_set_break(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 10) & 0x1;
|
||||
}
|
||||
inline void set_uart_status_reg_set_break(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10);
|
||||
}
|
||||
inline uint32_t get_uart_status_reg_clear_break(volatile apb3uart_t *reg){
|
||||
return (reg->STATUS_REG >> 11) & 0x1;
|
||||
}
|
||||
inline void set_uart_status_reg_clear_break(volatile apb3uart_t *reg, uint8_t value){
|
||||
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11);
|
||||
}
|
||||
#endif /* _BSP_APB3UART_H */
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
#ifndef _BSP_GPIO_H
|
||||
#define _BSP_GPIO_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3Gpio.h"
|
||||
|
||||
#define gpio_t apb3gpio_t
|
||||
|
||||
inline void gpio_init(gpio_t* reg) {
|
||||
set_gpio_write(reg, 0);
|
||||
set_gpio_writeEnable(reg, 0);
|
||||
}
|
||||
|
||||
#endif /* _BSP_GPIO_H */
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
#ifndef _BSP_INTERRUPT_H
|
||||
#define _BSP_INTERRUPT_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3IrqCtrl.h"
|
||||
|
||||
#define irq_t apb3irqctrl_t
|
||||
|
||||
inline void irq_init(irq_t* reg){
|
||||
set_irq_masksReg(reg, 0);
|
||||
set_irq_pendingsReg(reg, 0xff);
|
||||
}
|
||||
|
||||
#endif /* _BSP_INTERRUPT_H */
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
#ifndef _BSP_QSPI_H
|
||||
#define _BSP_QSPI_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3SpiXdrMasterCtrl.h"
|
||||
|
||||
#define qspi_t apb3spixdrmasterctrl_t
|
||||
typedef struct {
|
||||
uint32_t cpol;
|
||||
uint32_t cpha;
|
||||
uint32_t mode;
|
||||
uint32_t clkDivider;
|
||||
uint32_t ssSetup;
|
||||
uint32_t ssHold;
|
||||
uint32_t ssDisable;
|
||||
} spi_cfg;
|
||||
|
||||
#define SPI_CMD_WRITE (1 << 8)
|
||||
#define SPI_CMD_READ (1 << 9)
|
||||
#define SPI_CMD_SS (1 << 11)
|
||||
|
||||
#define SPI_RSP_VALID (1 << 31)
|
||||
|
||||
#define SPI_STATUS_CMD_INT_ENABLE = (1 << 0)
|
||||
#define SPI_STATUS_RSP_INT_ENABLE = (1 << 1)
|
||||
#define SPI_STATUS_CMD_INT_FLAG = (1 << 8)
|
||||
#define SPI_STATUS_RSP_INT_FLAG = (1 << 9)
|
||||
|
||||
static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){
|
||||
reg->CONFIG = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
|
||||
reg->SCLK_CONFIG = config->clkDivider;
|
||||
reg->SSGEN_SETUP = config->ssSetup;
|
||||
reg->SSGEN_HOLD = config->ssHold;
|
||||
reg->SSGEN_DISABLE = config->ssDisable;
|
||||
}
|
||||
|
||||
static inline void spi_init(volatile qspi_t* spi){
|
||||
spi_cfg spiCfg;
|
||||
spiCfg.cpol = 0;
|
||||
spiCfg.cpha = 0;
|
||||
spiCfg.mode = 0;
|
||||
spiCfg.clkDivider = 2;
|
||||
spiCfg.ssSetup = 2;
|
||||
spiCfg.ssHold = 2;
|
||||
spiCfg.ssDisable = 2;
|
||||
spi_configure(spi, &spiCfg);
|
||||
}
|
||||
|
||||
static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){
|
||||
return reg->STATUS & 0xFFFF;
|
||||
}
|
||||
static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){
|
||||
return reg->STATUS >> 16;
|
||||
}
|
||||
|
||||
static inline void spi_write(volatile qspi_t* reg, uint8_t data){
|
||||
while(spi_cmd_avail(reg) == 0);
|
||||
reg->DATA = data | SPI_CMD_WRITE;
|
||||
}
|
||||
|
||||
static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){
|
||||
while(spi_cmd_avail(reg) == 0);
|
||||
reg->DATA = data | SPI_CMD_READ | SPI_CMD_WRITE;
|
||||
while(spi_rsp_occupied(reg) == 0);
|
||||
return reg->DATA;
|
||||
}
|
||||
|
||||
|
||||
static inline uint8_t spi_read(volatile qspi_t* reg){
|
||||
while(spi_cmd_avail(reg) == 0);
|
||||
reg->DATA = SPI_CMD_READ;
|
||||
while(spi_rsp_occupied(reg) == 0);
|
||||
while((reg->DATA & 0x80000000)==0);
|
||||
return reg->DATA;
|
||||
}
|
||||
|
||||
static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){
|
||||
while(spi_cmd_avail(reg) == 0);
|
||||
reg->DATA = slaveId | 0x80 | SPI_CMD_SS;
|
||||
}
|
||||
|
||||
static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){
|
||||
while(spi_cmd_avail(reg) == 0);
|
||||
reg->DATA = slaveId | SPI_CMD_SS;
|
||||
}
|
||||
|
||||
static inline void spi_wait_tx_idle(volatile qspi_t* reg){
|
||||
while(spi_cmd_avail(reg) < 0x20);
|
||||
}
|
||||
#endif /* _BSP_QSPI_H */
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
#ifndef _BSP_TIMER_H
|
||||
#define _BSP_TIMER_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3Timer.h"
|
||||
|
||||
#define timer_t apb3timer_t
|
||||
|
||||
inline void prescaler_init(timer_t* reg, uint16_t value){
|
||||
set_timer_prescaler(reg, value);
|
||||
}
|
||||
|
||||
inline void timer_t0__init(timer_t *reg){
|
||||
set_timer_t0_overflow(reg, 0xffffffff);
|
||||
}
|
||||
|
||||
inline void timer_t1__init(timer_t *reg){
|
||||
set_timer_t1_overflow(reg, 0xffffffff);
|
||||
}
|
||||
|
||||
#endif /* _BSP_TIMER_H */
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
#ifndef _BSP_UART_H
|
||||
#define _BSP_UART_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "gen/Apb3Uart.h"
|
||||
|
||||
#define uart_t apb3uart_t
|
||||
|
||||
static inline uint32_t uart_get_tx_free(volatile uart_t *reg){
|
||||
return (reg->STATUS_REG >> 16) & 0xFF;
|
||||
}
|
||||
|
||||
static inline uint32_t uart_get_rx_avail(volatile uart_t *reg){
|
||||
return reg->STATUS_REG >> 24;
|
||||
}
|
||||
|
||||
static inline void uart_write(volatile uart_t *reg, uint8_t data){
|
||||
while(get_uart_rx_tx_reg_tx_free(reg) == 0);
|
||||
set_uart_rx_tx_reg_data(reg, data);
|
||||
}
|
||||
|
||||
static inline inline uint8_t uart_read(volatile uart_t *reg){
|
||||
uint32_t res = get_uart_rx_tx_reg_data(reg);
|
||||
while((res&0x10000) == 0) res = get_uart_rx_tx_reg_data(reg);
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif /* _BSP_UART_H */
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
#ifndef _RTL_CONST_H
|
||||
#define _RTL_CONST_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define _AC(X,Y) X
|
||||
#define _AT(T,X) X
|
||||
#else
|
||||
#define _AC(X,Y) (X##Y)
|
||||
#define _AT(T,X) ((T)(X))
|
||||
#endif /* !__ASSEMBLER__*/
|
||||
|
||||
#define _BITUL(x) (_AC(1,UL) << (x))
|
||||
#define _BITULL(x) (_AC(1,ULL) << (x))
|
||||
|
||||
#define UART0_BASE_ADDR 0xffff0000ULL
|
||||
|
||||
#define UART_REG_TXFIFO 0x00
|
||||
#define UART_REG_RXFIFO 0x04
|
||||
#define UART_REG_TXCTRL 0x08
|
||||
#define UART_REG_RXCTRL 0x0c
|
||||
#define UART_REG_IE 0x10
|
||||
#define UART_REG_IP 0x14
|
||||
#define UART_REG_DIV 0x18
|
||||
#define UART_TXEN 0x1
|
||||
|
||||
#define UART0_REG(ADDR) *((volatile uint32_t*) (UART0_BASE_ADDR + ADDR))
|
||||
#endif /* _RTL_CONST_H */
|
||||
|
|
@ -1,36 +0,0 @@
|
|||
// See LICENSE for license details.
|
||||
#ifndef _RISCV_BITS_H
|
||||
#define _RISCV_BITS_H
|
||||
|
||||
#define likely(x) __builtin_expect((x), 1)
|
||||
#define unlikely(x) __builtin_expect((x), 0)
|
||||
|
||||
#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
|
||||
#define ROUNDDOWN(a, b) ((a)/(b)*(b))
|
||||
|
||||
#define MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
|
||||
|
||||
#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
|
||||
#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
|
||||
|
||||
#define STR(x) XSTR(x)
|
||||
#define XSTR(x) #x
|
||||
|
||||
#if __riscv_xlen == 64
|
||||
# define SLL32 sllw
|
||||
# define STORE sd
|
||||
# define LOAD ld
|
||||
# define LWU lwu
|
||||
# define LOG_REGBYTES 3
|
||||
#else
|
||||
# define SLL32 sll
|
||||
# define STORE sw
|
||||
# define LOAD lw
|
||||
# define LWU lw
|
||||
# define LOG_REGBYTES 2
|
||||
#endif
|
||||
#define REGBYTES (1 << LOG_REGBYTES)
|
||||
|
||||
#endif
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
// See LICENSE for license details.
|
||||
/* Derived from <linux/const.h> */
|
||||
|
||||
#ifndef _SIFIVE_CONST_H
|
||||
#define _SIFIVE_CONST_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define _AC(X,Y) X
|
||||
#define _AT(T,X) X
|
||||
#else
|
||||
#define _AC(X,Y) (X##Y)
|
||||
#define _AT(T,X) ((T)(X))
|
||||
#endif /* !__ASSEMBLER__*/
|
||||
|
||||
#define _BITUL(x) (_AC(1,UL) << (x))
|
||||
#define _BITULL(x) (_AC(1,ULL) << (x))
|
||||
|
||||
#endif /* _SIFIVE_CONST_H */
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
#ifndef PLIC_H
|
||||
#define PLIC_H
|
||||
|
||||
#include <sifive/const.h>
|
||||
//#include <sifive/const.h>
|
||||
|
||||
// 32 bits per source
|
||||
#define PLIC_PRIORITY_OFFSET _AC(0x0000,UL)
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
// See LICENSE for license details.
|
||||
#ifndef _SECTIONS_H
|
||||
#define _SECTIONS_H
|
||||
|
||||
extern unsigned char _rom[];
|
||||
extern unsigned char _rom_end[];
|
||||
|
||||
extern unsigned char _ram[];
|
||||
extern unsigned char _ram_end[];
|
||||
|
||||
extern unsigned char _ftext[];
|
||||
extern unsigned char _etext[];
|
||||
extern unsigned char _fbss[];
|
||||
extern unsigned char _ebss[];
|
||||
extern unsigned char _end[];
|
||||
|
||||
#endif /* _SECTIONS_H */
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
#ifndef _RISCV_BITS_H
|
||||
#define _RISCV_BITS_H
|
||||
|
||||
#define likely(x) __builtin_expect((x), 1)
|
||||
#define unlikely(x) __builtin_expect((x), 0)
|
||||
|
||||
#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
|
||||
#define ROUNDDOWN(a, b) ((a)/(b)*(b))
|
||||
|
||||
#define MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
|
||||
|
||||
#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
|
||||
#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
|
||||
|
||||
#define STR(x) XSTR(x)
|
||||
#define XSTR(x) #x
|
||||
|
||||
#ifdef __riscv64
|
||||
# define SLL32 sllw
|
||||
# define STORE sd
|
||||
# define LOAD ld
|
||||
# define LWU lwu
|
||||
# define LOG_REGBYTES 3
|
||||
#else
|
||||
# define SLL32 sll
|
||||
# define STORE sw
|
||||
# define LOAD lw
|
||||
# define LWU lw
|
||||
# define LOG_REGBYTES 2
|
||||
#endif
|
||||
#define REGBYTES (1 << LOG_REGBYTES)
|
||||
|
||||
#endif
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
/* Derived from <linux/const.h> */
|
||||
|
||||
#ifndef _SIFIVE_CONST_H
|
||||
#define _SIFIVE_CONST_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#define _AC(X,Y) X
|
||||
#define _AT(T,X) X
|
||||
#else
|
||||
#define _AC(X,Y) (X##Y)
|
||||
#define _AT(T,X) ((T)(X))
|
||||
#endif /* !__ASSEMBLER__*/
|
||||
|
||||
#define _BITUL(x) (_AC(1,UL) << (x))
|
||||
#define _BITULL(x) (_AC(1,ULL) << (x))
|
||||
|
||||
#endif /* _SIFIVE_CONST_H */
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
#ifndef PLIC_H
|
||||
#define PLIC_H
|
||||
|
||||
#include <tgc-vp/const.h>
|
||||
//#include <tgc-vp/const.h>
|
||||
|
||||
// 32 bits per source
|
||||
#define PLIC_PRIORITY_OFFSET _AC(0x0000,UL)
|
||||
|
|
|
|||
|
|
@ -1,16 +0,0 @@
|
|||
#ifndef _SECTIONS_H
|
||||
#define _SECTIONS_H
|
||||
|
||||
extern unsigned char _rom[];
|
||||
extern unsigned char _rom_end[];
|
||||
|
||||
extern unsigned char _ram[];
|
||||
extern unsigned char _ram_end[];
|
||||
|
||||
extern unsigned char _ftext[];
|
||||
extern unsigned char _etext[];
|
||||
extern unsigned char _fbss[];
|
||||
extern unsigned char _ebss[];
|
||||
extern unsigned char _end[];
|
||||
|
||||
#endif /* _SECTIONS_H */
|
||||
|
|
@ -59,9 +59,9 @@ LIBWRAP := libwrap.a
|
|||
|
||||
LINK_DEPS += $(LIBWRAP)
|
||||
|
||||
LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
|
||||
#LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
|
||||
LDFLAGS += -L. -Wl,--start-group -lwrap -lc -Wl,--end-group
|
||||
LIBWRAP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
|
||||
#LIBWRAP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
|
||||
LIBWRAP_LDFLAGS += -L. -Wl,--start-group -lwrap -lc -Wl,--end-group
|
||||
|
||||
CLEAN_OBJS += $(LIBWRAP_OBJS)
|
||||
|
||||
|
|
|
|||
|
|
@ -21,6 +21,10 @@ size_t strnlen (const char *str, size_t n)
|
|||
return str - start;
|
||||
}
|
||||
|
||||
static void fprintf_putch(int ch, void** data)
|
||||
{
|
||||
putchar(ch);
|
||||
}
|
||||
static void sprintf_putch(int ch, void** data)
|
||||
{
|
||||
char** pstr = (char**)data;
|
||||
|
|
@ -100,13 +104,13 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
{
|
||||
register const char* p;
|
||||
const char* last_fmt;
|
||||
register int ch, err;
|
||||
register int ch;
|
||||
unsigned long num;
|
||||
int base, lflag, width, precision, altflag;
|
||||
int base, lflag, width, precision;
|
||||
char padc;
|
||||
|
||||
while (1) {
|
||||
while ((ch = *(unsigned char *) fmt) != '%') {
|
||||
while ((ch = *(const char *) fmt) != '%') {
|
||||
if (ch == '\0')
|
||||
return;
|
||||
fmt++;
|
||||
|
|
@ -120,9 +124,8 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
width = -1;
|
||||
precision = -1;
|
||||
lflag = 0;
|
||||
altflag = 0;
|
||||
reswitch:
|
||||
switch (ch = *(unsigned char *) fmt++) {
|
||||
switch (ch = *(const char *) fmt++) {
|
||||
|
||||
// flag to pad on the right
|
||||
case '-':
|
||||
|
|
@ -162,7 +165,6 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
goto reswitch;
|
||||
|
||||
case '#':
|
||||
altflag = 1;
|
||||
goto reswitch;
|
||||
|
||||
process_precision:
|
||||
|
|
@ -170,24 +172,17 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
width = precision, precision = -1;
|
||||
goto reswitch;
|
||||
|
||||
// long flag
|
||||
case 'l':
|
||||
case 'l': // long flag
|
||||
if (lflag)
|
||||
goto bad;
|
||||
goto reswitch;
|
||||
|
||||
// character
|
||||
case 'c':
|
||||
case 'c': // character
|
||||
putch(va_arg(ap, int), putdat);
|
||||
break;
|
||||
|
||||
// double
|
||||
case 'f':
|
||||
case 'f': // double
|
||||
print_double(putch, putdat, va_arg(ap, double), width, precision);
|
||||
break;
|
||||
|
||||
// string
|
||||
case 's':
|
||||
case 's': // string
|
||||
if ((p = va_arg(ap, char *)) == NULL)
|
||||
p = "(null)";
|
||||
if (width > 0 && padc != '-')
|
||||
|
|
@ -200,9 +195,7 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
for (; width > 0; width--)
|
||||
putch(' ', putdat);
|
||||
break;
|
||||
|
||||
// (signed) decimal
|
||||
case 'd':
|
||||
case 'd': // (signed) decimal
|
||||
num = getint(&ap, lflag);
|
||||
if ((long) num < 0) {
|
||||
putch('-', putdat);
|
||||
|
|
@ -210,41 +203,30 @@ static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt
|
|||
}
|
||||
base = 10;
|
||||
goto signed_number;
|
||||
|
||||
// unsigned decimal
|
||||
case 'u':
|
||||
case 'u': // unsigned decimal
|
||||
base = 10;
|
||||
goto unsigned_number;
|
||||
|
||||
// (unsigned) octal
|
||||
case 'o':
|
||||
case 'o': // (unsigned) octal
|
||||
// should do something with padding so it's always 3 octits
|
||||
base = 8;
|
||||
goto unsigned_number;
|
||||
|
||||
// pointer
|
||||
case 'p':
|
||||
case 'p':// pointer
|
||||
lflag = 1;
|
||||
putch('0', putdat);
|
||||
putch('x', putdat);
|
||||
/* fall through to 'x' */
|
||||
|
||||
// (unsigned) hexadecimal
|
||||
case 'x':
|
||||
__attribute__((fallthrough));
|
||||
case 'x': // (unsigned) hexadecimal
|
||||
base = 16;
|
||||
unsigned_number:
|
||||
unsigned_number:
|
||||
num = getuint(&ap, lflag);
|
||||
signed_number:
|
||||
signed_number:
|
||||
printnum(putch, putdat, num, base, width, padc);
|
||||
break;
|
||||
|
||||
// escaped '%' character
|
||||
case '%':
|
||||
case '%': // escaped '%' character
|
||||
putch(ch, putdat);
|
||||
break;
|
||||
|
||||
// unrecognized escape sequence - just print it literally
|
||||
default:
|
||||
default: // unrecognized escape sequence - just print it literally
|
||||
bad:
|
||||
putch('%', putdat);
|
||||
fmt = last_fmt;
|
||||
|
|
@ -258,7 +240,7 @@ int __wrap_printf(const char* fmt, ...)
|
|||
va_list ap;
|
||||
va_start(ap, fmt);
|
||||
|
||||
vprintfmt((void*)putchar, 0, fmt, ap);
|
||||
vprintfmt(fprintf_putch, 0, fmt, ap);
|
||||
|
||||
va_end(ap);
|
||||
return 0; // incorrect return value, but who cares, anyway?
|
||||
|
|
|
|||
|
|
@ -12,6 +12,14 @@
|
|||
int __wrap_puts(const char *s)
|
||||
{
|
||||
while (*s != '\0') {
|
||||
#if defined(BOARD_ehrenberg)
|
||||
while (get_uart_rx_tx_reg_tx_free(uart)==0) ;
|
||||
uart_write(uart, *s);
|
||||
#elif defined(BOARD_iss)
|
||||
*((uint32_t*) 0xFFFF0000) = *s;
|
||||
#elif defined(BOARD_TGCP)
|
||||
//TODO: implement
|
||||
#else
|
||||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = *s;
|
||||
|
||||
|
|
@ -19,7 +27,7 @@ int __wrap_puts(const char *s)
|
|||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = '\r';
|
||||
}
|
||||
|
||||
#endif
|
||||
++s;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4,32 +4,53 @@
|
|||
#include <errno.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
|
||||
#if defined(BOARD_ehrenberg)
|
||||
#include "platform.h"
|
||||
#endif
|
||||
#include "platform.h"
|
||||
#include "stub.h"
|
||||
#include "weak_under_alias.h"
|
||||
|
||||
ssize_t __wrap_read(int fd, void* ptr, size_t len)
|
||||
{
|
||||
#if defined(BOARD_hifive1)
|
||||
uint8_t * current = (uint8_t *)ptr;
|
||||
#if defined(BOARD_hifive1)
|
||||
volatile uint32_t * uart_rx = (uint32_t *)(UART0_CTRL_ADDR + UART_REG_RXFIFO);
|
||||
volatile uint8_t * uart_rx_cnt = (uint8_t *)(UART0_CTRL_ADDR + UART_REG_RXCTRL + 2);
|
||||
#else
|
||||
uint8_t * current = (uint8_t *)ptr;
|
||||
#elif defined(BOARD_iss)
|
||||
volatile uint32_t * uart_rx = (uint32_t*)0xFFFF0000;
|
||||
#elif defined(BOARD_TGCP)
|
||||
//TODO: implement
|
||||
#elif !defined(BOARD_ehrenberg)
|
||||
volatile uint32_t * uart_rx = (uint32_t *)(UART0_BASE_ADDR + UART_REG_RXFIFO);
|
||||
volatile uint8_t * uart_rx_cnt = (uint8_t *)(UART0_BASE_ADDR + UART_REG_RXCTRL + 2);
|
||||
#endif
|
||||
|
||||
ssize_t result = 0;
|
||||
|
||||
if (isatty(fd)) {
|
||||
#if defined(BOARD_ehrenberg)
|
||||
for (current = (uint8_t *)ptr;
|
||||
(current < ((uint8_t *)ptr) + len) && (get_uart_rx_tx_reg_rx_avail(uart) > 0);
|
||||
current ++) {
|
||||
*current = uart_read(uart);
|
||||
result++;
|
||||
}
|
||||
#elif defined(BOARD_iss)
|
||||
for (current = (uint8_t *)ptr;
|
||||
(current < ((uint8_t *)ptr) + len);
|
||||
current ++) {
|
||||
*current = *uart_rx;
|
||||
result++;
|
||||
}
|
||||
#elif defined(BOARD_TGCP)
|
||||
//TODO: implement
|
||||
#else
|
||||
for (current = (uint8_t *)ptr;
|
||||
(current < ((uint8_t *)ptr) + len) && (*uart_rx_cnt > 0);
|
||||
current ++) {
|
||||
*current = *uart_rx;
|
||||
result++;
|
||||
}
|
||||
#endif
|
||||
return result;
|
||||
}
|
||||
return _stub(EBADF);
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ void *__wrap_sbrk(ptrdiff_t incr)
|
|||
static char *curbrk = _end;
|
||||
|
||||
if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
|
||||
return NULL - 1;
|
||||
return (void*)- 1;
|
||||
|
||||
curbrk += incr;
|
||||
return curbrk - incr;
|
||||
|
|
|
|||
|
|
@ -8,24 +8,35 @@
|
|||
#include "platform.h"
|
||||
#include "stub.h"
|
||||
#include "weak_under_alias.h"
|
||||
|
||||
ssize_t __wrap_write(int fd, const void* ptr, size_t len)
|
||||
{
|
||||
const uint8_t * current = (const char *)ptr;
|
||||
const uint8_t * current = (const uint8_t *)ptr;
|
||||
if (isatty(fd)) {
|
||||
for (size_t jj = 0; jj < len; jj++) {
|
||||
#if defined(BOARD_ehrenberg)
|
||||
while (get_uart_rx_tx_reg_tx_free(uart)==0) ;
|
||||
uart_write(uart, current[jj]);
|
||||
if (current[jj] == '\n') {
|
||||
while (get_uart_rx_tx_reg_tx_free(uart)==0) ;
|
||||
uart_write(uart, '\r');
|
||||
}
|
||||
#elif defined(BOARD_iss)
|
||||
*((uint32_t*) 0xFFFF0000) = current[jj];
|
||||
#elif defined(BOARD_TGCP)
|
||||
//TODO: implement
|
||||
#else
|
||||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = current[jj];
|
||||
|
||||
if (isatty(fd)) {
|
||||
for (size_t jj = 0; jj < len; jj++) {
|
||||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = current[jj];
|
||||
|
||||
if (current[jj] == '\n') {
|
||||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = '\r';
|
||||
}
|
||||
if (current[jj] == '\n') {
|
||||
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
|
||||
UART0_REG(UART_REG_TXFIFO) = '\r';
|
||||
}
|
||||
#endif
|
||||
}
|
||||
return len;
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
return _stub(EBADF);
|
||||
return _stub(EBADF);
|
||||
}
|
||||
weak_under_alias(write);
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
/*.o
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
#CFLAGS+=--specs=nano.specs
|
||||
#LDFLAGS+=--specs=nano.specs
|
||||
#CFLAGS+=--specs=rv32imac/ilp32/nano.specs
|
||||
#LDFLAGS+=--specs=rv32imac/ilp32/nano.specs
|
||||
|
||||
NANO_LIB_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
|
||||
NANO_LIB_SYMS := read write syscalls
|
||||
|
||||
#NANO_LIB_SRCS := $(foreach s,$(NANO_LIB_SYMS),$(s).c)
|
||||
NANO_LIB_SRCS := $(foreach s,$(NANO_LIB_SYMS),$(NANO_LIB_DIR)/$(s).c)
|
||||
#NANO_LIB_SRCS := $(foreach f,$(LIB_SRCS),$(LIB_DIR)/$(f))
|
||||
NANO_LIB_OBJS := $(NANO_LIB_SRCS:.c=.o)
|
||||
NANO_LIB := libnano_cust.a
|
||||
|
||||
CLEAN_OBJS += $(NANO_LIB_OBJS)
|
||||
|
||||
$(NANO_LIB_OBJS): %.o: %.c $(HEADERS)
|
||||
$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
|
||||
|
||||
$(NANO_LIB): $(NANO_LIB_OBJS)
|
||||
$(AR) rcs $@ $^
|
||||
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
#include <stdint.h>
|
||||
#include <errno.h>
|
||||
#include <unistd.h>
|
||||
#include "stub.h"
|
||||
#include <platform.h>
|
||||
|
||||
ssize_t _read(int fd, void* ptr, size_t len);
|
||||
|
||||
ssize_t _read(int fd, void* ptr, size_t len) {
|
||||
uint8_t * current = (uint8_t *)ptr;
|
||||
ssize_t result = 0;
|
||||
if (isatty(fd)) {
|
||||
for (current = (uint8_t *)ptr;
|
||||
(current < ((uint8_t *)ptr) + len) && (uart_get_rx_avail(uart) > 0);
|
||||
current ++) {
|
||||
*current = uart_read(uart);
|
||||
result++;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
return _stub(EBADF);
|
||||
}
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
#ifndef _LIBWRAP_STUB_H_
|
||||
#define _LIBWRAP_STUB_H_
|
||||
|
||||
static inline int _stub(int err) {
|
||||
return err?-1:-1;
|
||||
}
|
||||
|
||||
#endif /* _LIBWRAP_STUB_H_ */
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
#include <unistd.h>
|
||||
#include <sys/stat.h>
|
||||
|
||||
extern int _end;
|
||||
void* _sbrk(int incr);
|
||||
int _close(int file);
|
||||
int _fstat(int file, struct stat *st);
|
||||
int _isatty(int fd);
|
||||
int _lseek(int file, int ptr, int dir);
|
||||
|
||||
void _kill(int pid, int sig);
|
||||
int _getpid(void);
|
||||
void write_hex(int fd, unsigned long int hex);
|
||||
|
||||
void *_sbrk(int incr) {
|
||||
static unsigned char *heap = NULL;
|
||||
unsigned char *prev_heap;
|
||||
if (heap == NULL) {
|
||||
heap = (unsigned char *)&_end;
|
||||
}
|
||||
prev_heap = heap;
|
||||
heap += incr;
|
||||
return prev_heap;
|
||||
}
|
||||
|
||||
int _close(int file) {
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fstat(int file, struct stat *st) {
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int fd) {
|
||||
if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir) {
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void _exit(int status) {
|
||||
const char message[] = "\nProgam has exited with code:";
|
||||
write(STDERR_FILENO, message, sizeof(message) - 1);
|
||||
write_hex(STDERR_FILENO, status);
|
||||
write(STDERR_FILENO, "\n", 1);
|
||||
for (;;);
|
||||
}
|
||||
|
||||
void _kill(int pid, int sig) {
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
return;
|
||||
}
|
||||
|
||||
int _getpid(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
void write_hex(int fd, unsigned long int hex){
|
||||
uint8_t ii;
|
||||
uint8_t jj;
|
||||
char towrite;
|
||||
write(fd , "0x", 2);
|
||||
for (ii = sizeof(unsigned long int) * 2 ; ii > 0; ii--) {
|
||||
jj = ii - 1;
|
||||
uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
|
||||
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
|
||||
write(fd, &towrite, 1);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
#include <stdint.h>
|
||||
#include <errno.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
#include "stub.h"
|
||||
#include <platform.h>
|
||||
|
||||
ssize_t _write(int fd, const void* ptr, size_t len);
|
||||
|
||||
ssize_t _write(int fd, const void* ptr, size_t len) {
|
||||
const char * current = (const char *)ptr;
|
||||
if (isatty(fd)) {
|
||||
for (size_t jj = 0; jj < len; jj++) {
|
||||
while (uart_get_tx_free(uart)==0) ;
|
||||
uart_write(uart, current[jj]);
|
||||
if (current[jj] == '\n') {
|
||||
while (uart_get_tx_free(uart)==0) ;
|
||||
uart_write(uart, '\r');
|
||||
}
|
||||
}
|
||||
return len;
|
||||
}
|
||||
return _stub(EBADF);
|
||||
}
|
||||
Loading…
Reference in New Issue