updates timer and i2s register names
This commit is contained in:
parent
7a3360d072
commit
deba022043
@ -3,7 +3,7 @@
|
|||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Generated at 2024-09-10 14:29:50 UTC
|
* Generated at 2024-12-26 18:07:07 UTC
|
||||||
* by peakrdl_mnrs version 1.2.9
|
* by peakrdl_mnrs version 1.2.9
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -19,6 +19,7 @@ typedef struct {
|
|||||||
volatile uint32_t STATUS;
|
volatile uint32_t STATUS;
|
||||||
volatile uint32_t I2S_CLOCK_CTRL;
|
volatile uint32_t I2S_CLOCK_CTRL;
|
||||||
volatile uint32_t PDM_CLOCK_CTRL;
|
volatile uint32_t PDM_CLOCK_CTRL;
|
||||||
|
volatile uint32_t PDM_FILTER_CTRL;
|
||||||
volatile uint32_t IE;
|
volatile uint32_t IE;
|
||||||
volatile uint32_t IP;
|
volatile uint32_t IP;
|
||||||
}i2s_t;
|
}i2s_t;
|
||||||
@ -79,6 +80,10 @@ typedef struct {
|
|||||||
#define I2S_PDM_CLOCK_CTRL_MASK 0x3ff
|
#define I2S_PDM_CLOCK_CTRL_MASK 0x3ff
|
||||||
#define I2S_PDM_CLOCK_CTRL(V) ((V & I2S_PDM_CLOCK_CTRL_MASK) << I2S_PDM_CLOCK_CTRL_OFFS)
|
#define I2S_PDM_CLOCK_CTRL(V) ((V & I2S_PDM_CLOCK_CTRL_MASK) << I2S_PDM_CLOCK_CTRL_OFFS)
|
||||||
|
|
||||||
|
#define I2S_PDM_FILTER_CTRL_OFFS 0
|
||||||
|
#define I2S_PDM_FILTER_CTRL_MASK 0x3ff
|
||||||
|
#define I2S_PDM_FILTER_CTRL(V) ((V & I2S_PDM_FILTER_CTRL_MASK) << I2S_PDM_FILTER_CTRL_OFFS)
|
||||||
|
|
||||||
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL_OFFS 0
|
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL_OFFS 0
|
||||||
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL_MASK 0x1
|
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL_MASK 0x1
|
||||||
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL(V) ((V & I2S_IE_EN_LEFT_SAMPLE_AVAIL_MASK) << I2S_IE_EN_LEFT_SAMPLE_AVAIL_OFFS)
|
#define I2S_IE_EN_LEFT_SAMPLE_AVAIL(V) ((V & I2S_IE_EN_LEFT_SAMPLE_AVAIL_MASK) << I2S_IE_EN_LEFT_SAMPLE_AVAIL_OFFS)
|
||||||
@ -194,6 +199,20 @@ inline void set_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg, uint16_t value){
|
|||||||
reg->PDM_CLOCK_CTRL = (reg->PDM_CLOCK_CTRL & ~(0x3ffU << 0)) | (value << 0);
|
reg->PDM_CLOCK_CTRL = (reg->PDM_CLOCK_CTRL & ~(0x3ffU << 0)) | (value << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//I2S_PDM_FILTER_CTRL
|
||||||
|
inline uint32_t get_i2s_pdm_filter_ctrl(volatile i2s_t* reg){
|
||||||
|
return reg->PDM_FILTER_CTRL;
|
||||||
|
}
|
||||||
|
inline void set_i2s_pdm_filter_ctrl(volatile i2s_t* reg, uint32_t value){
|
||||||
|
reg->PDM_FILTER_CTRL = value;
|
||||||
|
}
|
||||||
|
inline uint32_t get_i2s_pdm_filter_ctrl_decimationFactor(volatile i2s_t* reg){
|
||||||
|
return (reg->PDM_FILTER_CTRL >> 0) & 0x3ff;
|
||||||
|
}
|
||||||
|
inline void set_i2s_pdm_filter_ctrl_decimationFactor(volatile i2s_t* reg, uint16_t value){
|
||||||
|
reg->PDM_FILTER_CTRL = (reg->PDM_FILTER_CTRL & ~(0x3ffU << 0)) | (value << 0);
|
||||||
|
}
|
||||||
|
|
||||||
//I2S_IE
|
//I2S_IE
|
||||||
inline uint32_t get_i2s_ie(volatile i2s_t* reg){
|
inline uint32_t get_i2s_ie(volatile i2s_t* reg){
|
||||||
return reg->IE;
|
return reg->IE;
|
||||||
|
@ -3,8 +3,8 @@
|
|||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Generated at 2024-08-02 08:46:07 UTC
|
* Generated at 2024-12-26 18:07:07 UTC
|
||||||
* by peakrdl_mnrs version 1.2.7
|
* by peakrdl_mnrs version 1.2.9
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _BSP_TIMERCOUNTER_H
|
#ifndef _BSP_TIMERCOUNTER_H
|
||||||
@ -16,10 +16,10 @@ typedef struct {
|
|||||||
volatile uint32_t PRESCALER;
|
volatile uint32_t PRESCALER;
|
||||||
volatile uint32_t T0_CTRL;
|
volatile uint32_t T0_CTRL;
|
||||||
volatile uint32_t T0_OVERFLOW;
|
volatile uint32_t T0_OVERFLOW;
|
||||||
volatile uint32_t T0_VALUE;
|
volatile uint32_t T0_COUNTER;
|
||||||
volatile uint32_t T1_CTRL;
|
volatile uint32_t T1_CTRL;
|
||||||
volatile uint32_t T1_OVERFLOW;
|
volatile uint32_t T1_OVERFLOW;
|
||||||
volatile uint32_t T1_VALUE;
|
volatile uint32_t T1_COUNTER;
|
||||||
}timercounter_t;
|
}timercounter_t;
|
||||||
|
|
||||||
#define TIMERCOUNTER_PRESCALER_OFFS 0
|
#define TIMERCOUNTER_PRESCALER_OFFS 0
|
||||||
@ -38,9 +38,9 @@ typedef struct {
|
|||||||
#define TIMERCOUNTER_T0_OVERFLOW_MASK 0xffffffff
|
#define TIMERCOUNTER_T0_OVERFLOW_MASK 0xffffffff
|
||||||
#define TIMERCOUNTER_T0_OVERFLOW(V) ((V & TIMERCOUNTER_T0_OVERFLOW_MASK) << TIMERCOUNTER_T0_OVERFLOW_OFFS)
|
#define TIMERCOUNTER_T0_OVERFLOW(V) ((V & TIMERCOUNTER_T0_OVERFLOW_MASK) << TIMERCOUNTER_T0_OVERFLOW_OFFS)
|
||||||
|
|
||||||
#define TIMERCOUNTER_T0_VALUE_OFFS 0
|
#define TIMERCOUNTER_T0_COUNTER_OFFS 0
|
||||||
#define TIMERCOUNTER_T0_VALUE_MASK 0xffffffff
|
#define TIMERCOUNTER_T0_COUNTER_MASK 0xffffffff
|
||||||
#define TIMERCOUNTER_T0_VALUE(V) ((V & TIMERCOUNTER_T0_VALUE_MASK) << TIMERCOUNTER_T0_VALUE_OFFS)
|
#define TIMERCOUNTER_T0_COUNTER(V) ((V & TIMERCOUNTER_T0_COUNTER_MASK) << TIMERCOUNTER_T0_COUNTER_OFFS)
|
||||||
|
|
||||||
#define TIMERCOUNTER_T1_CTRL_ENABLE_OFFS 0
|
#define TIMERCOUNTER_T1_CTRL_ENABLE_OFFS 0
|
||||||
#define TIMERCOUNTER_T1_CTRL_ENABLE_MASK 0x7
|
#define TIMERCOUNTER_T1_CTRL_ENABLE_MASK 0x7
|
||||||
@ -54,9 +54,9 @@ typedef struct {
|
|||||||
#define TIMERCOUNTER_T1_OVERFLOW_MASK 0xffffffff
|
#define TIMERCOUNTER_T1_OVERFLOW_MASK 0xffffffff
|
||||||
#define TIMERCOUNTER_T1_OVERFLOW(V) ((V & TIMERCOUNTER_T1_OVERFLOW_MASK) << TIMERCOUNTER_T1_OVERFLOW_OFFS)
|
#define TIMERCOUNTER_T1_OVERFLOW(V) ((V & TIMERCOUNTER_T1_OVERFLOW_MASK) << TIMERCOUNTER_T1_OVERFLOW_OFFS)
|
||||||
|
|
||||||
#define TIMERCOUNTER_T1_VALUE_OFFS 0
|
#define TIMERCOUNTER_T1_COUNTER_OFFS 0
|
||||||
#define TIMERCOUNTER_T1_VALUE_MASK 0xffffffff
|
#define TIMERCOUNTER_T1_COUNTER_MASK 0xffffffff
|
||||||
#define TIMERCOUNTER_T1_VALUE(V) ((V & TIMERCOUNTER_T1_VALUE_MASK) << TIMERCOUNTER_T1_VALUE_OFFS)
|
#define TIMERCOUNTER_T1_COUNTER(V) ((V & TIMERCOUNTER_T1_COUNTER_MASK) << TIMERCOUNTER_T1_COUNTER_OFFS)
|
||||||
|
|
||||||
//TIMERCOUNTER_PRESCALER
|
//TIMERCOUNTER_PRESCALER
|
||||||
inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
|
inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
|
||||||
@ -100,9 +100,9 @@ inline void set_timercounter_t0_overflow(volatile timercounter_t* reg, uint32_t
|
|||||||
reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
//TIMERCOUNTER_T0_VALUE
|
//TIMERCOUNTER_T0_COUNTER
|
||||||
inline uint32_t get_timercounter_t0_value(volatile timercounter_t* reg){
|
inline uint32_t get_timercounter_t0_counter(volatile timercounter_t* reg){
|
||||||
return (reg->T0_VALUE >> 0) & 0xffffffff;
|
return (reg->T0_COUNTER >> 0) & 0xffffffff;
|
||||||
}
|
}
|
||||||
|
|
||||||
//TIMERCOUNTER_T1_CTRL
|
//TIMERCOUNTER_T1_CTRL
|
||||||
@ -133,9 +133,9 @@ inline void set_timercounter_t1_overflow(volatile timercounter_t* reg, uint32_t
|
|||||||
reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
//TIMERCOUNTER_T1_VALUE
|
//TIMERCOUNTER_T1_COUNTER
|
||||||
inline uint32_t get_timercounter_t1_value(volatile timercounter_t* reg){
|
inline uint32_t get_timercounter_t1_counter(volatile timercounter_t* reg){
|
||||||
return (reg->T1_VALUE >> 0) & 0xffffffff;
|
return (reg->T1_COUNTER >> 0) & 0xffffffff;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _BSP_TIMERCOUNTER_H */
|
#endif /* _BSP_TIMERCOUNTER_H */
|
Loading…
x
Reference in New Issue
Block a user