Firmware/MNRS-BM-BSP
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Update compute cluster addresses

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This commit is contained in:
Johannes Wirth 2025-04-08 11:36:50 +02:00
parent c88caf9906
commit aca6bc8a20
1 changed files with 24 additions and 24 deletions
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48
include/ehrenberg/devices/fki_cluster_info.h
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@ -33,12 +33,12 @@ static uint64_t fki_addr_sram3(uint8_t cluster);
#define ADDR_Compute0_ccc_peMapping 0x80006000
#define ADDR_Compute0_aes_adapter 0x80007000
#define ADDR_Compute0_cntrl_cva5 0x80008000
#define ADDR_Compute0_cntrl_tgc 0x80009000
#define ADDR_Compute0_ut_adapter 0x8000a000
#define ADDR_Compute0_sram0 0x8000b000
#define ADDR_Compute0_sram1 0x8008b000
#define ADDR_Compute0_sram2 0x800cb000
#define ADDR_Compute0_sram3 0x8010b000
#define ADDR_Compute0_cntrl_tgc 0x8000c000
#define ADDR_Compute0_ut_adapter 0x80010000
#define ADDR_Compute0_sram0 0x80011000
#define ADDR_Compute0_sram1 0x80091000
#define ADDR_Compute0_sram2 0x800d1000
#define ADDR_Compute0_sram3 0x80111000
#define Compute1 3
#define Compute1_ccc 3,0
#define Compute1_stream2axi 3,1
@ -51,12 +51,12 @@ static uint64_t fki_addr_sram3(uint8_t cluster);
#define ADDR_Compute1_ccc_peMapping 0x90006000
#define ADDR_Compute1_aes_adapter 0x90007000
#define ADDR_Compute1_cntrl_cva5 0x90008000
#define ADDR_Compute1_cntrl_tgc 0x90009000
#define ADDR_Compute1_ut_adapter 0x9000a000
#define ADDR_Compute1_sram0 0x9000b000
#define ADDR_Compute1_sram1 0x9008b000
#define ADDR_Compute1_sram2 0x900cb000
#define ADDR_Compute1_sram3 0x9010b000
#define ADDR_Compute1_cntrl_tgc 0x9000c000
#define ADDR_Compute1_ut_adapter 0x90010000
#define ADDR_Compute1_sram0 0x90011000
#define ADDR_Compute1_sram1 0x90091000
#define ADDR_Compute1_sram2 0x900d1000
#define ADDR_Compute1_sram3 0x90111000
static uint8_t fki_ccc(uint8_t cluster) {
switch(cluster) {
@ -145,10 +145,10 @@ static uint64_t fki_addr_ccc_peMapping(uint8_t cluster) {
static uint64_t fki_addr_sram1(uint8_t cluster) {
switch(cluster) {
case 3: {
return 0x9008b000;
return 0x90091000;
}
case 2: {
return 0x8008b000;
return 0x80091000;
}
default: {
return -1;
@ -173,10 +173,10 @@ static uint64_t fki_addr_ccc_configMem(uint8_t cluster) {
static uint64_t fki_addr_sram2(uint8_t cluster) {
switch(cluster) {
case 2: {
return 0x800cb000;
return 0x800d1000;
}
case 3: {
return 0x900cb000;
return 0x900d1000;
}
default: {
return -1;
@ -201,10 +201,10 @@ static uint64_t fki_addr_cntrl_cva5(uint8_t cluster) {
static uint64_t fki_addr_cntrl_tgc(uint8_t cluster) {
switch(cluster) {
case 2: {
return 0x80009000;
return 0x8000c000;
}
case 3: {
return 0x90009000;
return 0x9000c000;
}
default: {
return -1;
@ -257,10 +257,10 @@ static uint64_t fki_addr_aes_adapter(uint8_t cluster) {
static uint64_t fki_addr_ut_adapter(uint8_t cluster) {
switch(cluster) {
case 3: {
return 0x9000a000;
return 0x90010000;
}
case 2: {
return 0x8000a000;
return 0x80010000;
}
default: {
return -1;
@ -271,10 +271,10 @@ static uint64_t fki_addr_ut_adapter(uint8_t cluster) {
static uint64_t fki_addr_sram0(uint8_t cluster) {
switch(cluster) {
case 2: {
return 0x8000b000;
return 0x80011000;
}
case 3: {
return 0x9000b000;
return 0x90011000;
}
default: {
return -1;
@ -285,10 +285,10 @@ static uint64_t fki_addr_sram0(uint8_t cluster) {
static uint64_t fki_addr_sram3(uint8_t cluster) {
switch(cluster) {
case 2: {
return 0x8010b000;
return 0x80111000;
}
case 3: {
return 0x9010b000;
return 0x90111000;
}
default: {
return -1;