raven FW with data and interrupt transfer (based on bldc project)

这个提交包含在:
2020-09-16 10:28:54 +02:00
父节点 4c790f8810
当前提交 9157a42042
修改 99 个文件,包含 4254 行新增3162 行删除

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@@ -0,0 +1,30 @@
// See LICENSE for license details.
#ifndef _SIFIVE_CLIC_H
#define _SIFIVE_CLIC_H
#define CLIC_HART0 0x00800000
#define CLIC_MSIP 0x0000
#define CLIC_MSIP_size 0x4
#define CLIC_MTIMECMP 0x4000
#define CLIC_MTIMECMP_size 0x8
#define CLIC_MTIME 0xBFF8
#define CLIC_MTIME_size 0x8
#define CLIC_INTIP 0x000
#define CLIC_INTIE 0x400
#define CLIC_INTCFG 0x800
#define CLIC_CFG 0xc00
// These interrupt IDs are consistent across old and new mtvec modes
#define SSIPID 1
#define MSIPID 3
#define STIPID 5
#define MTIPID 7
#define SEIPID 9
#define MEIPID 11
#define CSIPID 12
#define LOCALINTIDBASE 16
#endif /* _SIFIVE_CLIC_H */

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@@ -30,8 +30,8 @@
/* Fields */
#define SPI_SCK_POL 0x1
#define SPI_SCK_PHA 0x2
#define SPI_SCK_PHA 0x1
#define SPI_SCK_POL 0x2
#define SPI_FMT_PROTO(x) ((x) & 0x3)
#define SPI_FMT_ENDIAN(x) (((x) & 0x1) << 2)