fpga_spn: add check if input-/ref-data fits into memory
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							| @@ -68,6 +68,17 @@ int main() { | ||||
|  | ||||
|  | ||||
|  | ||||
|     uint32_t step = 100000; | ||||
|     uint32_t iterations = 10; | ||||
|  | ||||
|  | ||||
|  | ||||
|     int in_addr   = 0x30000000; // place input samples in the SPI memory | ||||
|     int out_addr  = 0x3C000000; | ||||
|     int out_addr2 = 0x3E000000; | ||||
|  | ||||
|  | ||||
|  | ||||
|     spn::mode_reg() = 1; | ||||
|     spn::start_reg() = 1; | ||||
|     wait_for_spn_interrupt(); | ||||
| @@ -91,29 +102,39 @@ int main() { | ||||
|  | ||||
|     printf("Result Bytes: %d\n", result_bytes); | ||||
|  | ||||
|     uint32_t step = 50000; | ||||
|     uint32_t iterations = 2; | ||||
|     uint32_t in_bytes = step * sample_bytes; | ||||
|     uint32_t out_bytes = step * result_bytes; | ||||
|  | ||||
|     uint32_t total_in = in_bytes * iterations; | ||||
|  | ||||
|     if (total_in > (out_addr - in_addr)) { | ||||
|         printf("ERROR: input data requires %d bytes, only %d bytes available\n", total_in, out_addr - in_addr); | ||||
|         return 1; | ||||
|     } | ||||
|     if (out_bytes > (out_addr2 - out_addr)) { | ||||
|         printf("ERROR: output data requires %d bytes, only %d bytes available\n", out_bytes, out_addr2 - out_addr); | ||||
|         return 1; | ||||
|     } | ||||
|  | ||||
|      | ||||
|     uint32_t in_beats = (step * sample_bytes) / axi_bytes; | ||||
|     uint32_t in_beats = in_bytes / axi_bytes; | ||||
|     if (in_beats * axi_bytes < step * sample_bytes) in_beats++; | ||||
|     uint32_t out_beats = (step * result_bytes) / axi_bytes; | ||||
|     uint32_t out_beats = out_bytes / axi_bytes; | ||||
|     if (out_beats * axi_bytes < step * result_bytes) out_beats++; | ||||
|  | ||||
| 	int in_addr  = 0x20010000; // place input samples in the SPI memory | ||||
|     int out_addr = 0x20210000; | ||||
|     uint32_t current_in_addr = in_addr; | ||||
|     int fpga_address_in = fpga_alloc(step * sample_bytes + 64); | ||||
|     int fpga_address_out = fpga_alloc(step * result_bytes + 64); | ||||
|  | ||||
|     // inject SPN input data | ||||
|     spn_checker::input_addr_reg() = in_addr; | ||||
|     spn_checker::input_addr_reg() = current_in_addr; | ||||
|     spn_checker::num_input_samples_reg() = sample_bytes * step * iterations; | ||||
|     spn_checker::start_data_trans_reg() = 1; | ||||
|     spn_checker::output_addr_reg() = out_addr; | ||||
|  | ||||
|     //run_xspn(in_addr, out_addr); | ||||
|     for (int k = 0; k < iterations*step; k+=step) { | ||||
|         fpga_dma(1, fpga_address_in, in_addr, step * sample_bytes); | ||||
|         fpga_dma(1, fpga_address_in, current_in_addr, step * sample_bytes); | ||||
|         run_xspn(fpga_address_in, fpga_address_out, step, in_beats, out_beats); | ||||
|         wait_for_spn_interrupt(); | ||||
|         spn::interrupt_reg() = 1; | ||||
| @@ -123,7 +144,7 @@ int main() { | ||||
|         spn_checker::length_reg() = step; | ||||
|         spn_checker::start_result_check_reg() = 1; | ||||
|  | ||||
| 		in_addr += step * sample_bytes; // 5 bytes in each sample | ||||
| 		current_in_addr += step * sample_bytes; // 5 bytes in each sample | ||||
| 	} | ||||
|  | ||||
|     fpga_free(fpga_address_in); | ||||
|   | ||||
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	 Johannes Wirth
					Johannes Wirth