Firmware/MNRS-BM-BSP
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makes all inline functions static to make building w/o optimization possible

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This commit is contained in:
Eyck-Alexander Jentzsch
2025-03-28 23:05:08 +01:00
parent c3d9e5fa6f
commit 38246a05ce
12 changed files with 342 additions and 342 deletions
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30
include/minres/devices/gen/gpio.h
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@@ -56,63 +56,63 @@ typedef struct {
#define GPIO_BOOT_SEL(V) ((V & GPIO_BOOT_SEL_MASK) << GPIO_BOOT_SEL_OFFS)
//GPIO_VALUE
inline uint32_t get_gpio_value(volatile gpio_t* reg){
static inline uint32_t get_gpio_value(volatile gpio_t* reg){
return (reg->VALUE >> 0) & 0xffffffff;
}
//GPIO_WRITE
inline uint32_t get_gpio_write(volatile gpio_t* reg){
static inline uint32_t get_gpio_write(volatile gpio_t* reg){
return (reg->WRITE >> 0) & 0xffffffff;
}
inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_WRITEENABLE
inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
static inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
return (reg->WRITEENABLE >> 0) & 0xffffffff;
}
inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IE
inline uint32_t get_gpio_ie(volatile gpio_t* reg){
static inline uint32_t get_gpio_ie(volatile gpio_t* reg){
return (reg->IE >> 0) & 0xffffffff;
}
inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
reg->IE = (reg->IE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IP
inline uint32_t get_gpio_ip(volatile gpio_t* reg){
static inline uint32_t get_gpio_ip(volatile gpio_t* reg){
return (reg->IP >> 0) & 0xffffffff;
}
inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
reg->IP = (reg->IP & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IRQ_TRIGGER
inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
static inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
return (reg->IRQ_TRIGGER >> 0) & 0xffffffff;
}
inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
reg->IRQ_TRIGGER = (reg->IRQ_TRIGGER & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IRQ_TYPE
inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
static inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
return (reg->IRQ_TYPE >> 0) & 0xffffffff;
}
inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
reg->IRQ_TYPE = (reg->IRQ_TYPE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_BOOT_SEL
inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
static inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
return reg->BOOT_SEL;
}
inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
static inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
return (reg->BOOT_SEL >> 0) & 0x7;
}