updates ehrenberg devices and BSP

This commit is contained in:
Eyck Jentzsch 2024-06-10 10:13:07 +02:00
parent c94eb7c61a
commit 231366cc94
13 changed files with 200 additions and 20 deletions

5
env/common-gcc.mk vendored
View File

@ -4,7 +4,7 @@ _MK_COMMON := # defined
TL_TARGET?=all TL_TARGET?=all
.PHONY: $(TL_TARGET) .PHONY: $(TL_TARGET)
$(TL_TARGET): $(TARGET) $(TL_TARGET): $(TARGET).elf
ENV_DIR:=$(dir $(lastword $(MAKEFILE_LIST))) ENV_DIR:=$(dir $(lastword $(MAKEFILE_LIST)))
BSP_BASE=$(ENV_DIR)/.. BSP_BASE=$(ENV_DIR)/..
@ -63,8 +63,7 @@ OBJDUMP := $(TOOL_DIR)$(TRIPLET)-objdump
OBJCOPY := $(TOOL_DIR)$(TRIPLET)-objcopy OBJCOPY := $(TOOL_DIR)$(TRIPLET)-objcopy
ifndef NO_DEFAULT_LINK ifndef NO_DEFAULT_LINK
$(TARGET): $(LINK_OBJS) $(LINK_DEPS) $(TARGET).elf: $(LINK_OBJS) $(LINK_DEPS)
echo LINK_OBJS: $(LINK_OBJS)
$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP_LDFLAGS) $(LIBWRAP) $(LD_SCRIPT) -o $@ $(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP_LDFLAGS) $(LIBWRAP) $(LD_SCRIPT) -o $@
$(OBJDUMP) -d -S $@ > $(TARGET).dis $(OBJDUMP) -d -S $@ > $(TARGET).dis
endif endif

170
env/ehrenberg/rom.lds vendored Normal file
View File

@ -0,0 +1,170 @@
OUTPUT_ARCH( "riscv" )
ENTRY( _start )
MEMORY
{
rom (rxai!w) : ORIGIN = 0xF0080000, LENGTH = 1k
ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 32k
}
PHDRS
{
rom PT_LOAD;
ram_init PT_LOAD;
ram PT_NULL;
}
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
.init ORIGIN(rom) :
{
KEEP (*(SORT_NONE(.init)))
} >rom AT>rom :rom
.text :
{
*(.text.unlikely .text.unlikely.*)
*(.text.startup .text.startup.*)
*(.text .text.*)
*(.gnu.linkonce.t.*)
} >rom AT>rom :rom
.fini :
{
KEEP (*(SORT_NONE(.fini)))
} >rom AT>rom :rom
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata :
{
*(.rdata)
*(.rodata .rodata.*)
*(.gnu.linkonce.r.*)
} >rom AT>rom :rom
. = ALIGN(4);
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >rom AT>rom :rom
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >rom AT>rom :rom
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >rom AT>rom :rom
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >rom AT>rom :rom
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >rom AT>rom :rom
.lalign :
{
. = ALIGN(4);
PROVIDE( _data_lma = . );
} >rom AT>rom :rom
.dalign :
{
. = ALIGN(4);
PROVIDE( _data = . );
} >ram AT>rom :ram_init
.data :
{
*(.data .data.*)
*(.gnu.linkonce.d.*)
} >ram AT>rom :ram_init
.srodata :
{
PROVIDE( __global_pointer$ = . + 0x800 );
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
} >ram AT>rom :ram_init
.sdata :
{
*(.sdata .sdata.*)
*(.gnu.linkonce.s.*)
} >ram AT>rom :ram_init
. = ALIGN(4);
PROVIDE( _edata = . );
PROVIDE( edata = . );
PROVIDE( _fbss = . );
PROVIDE( __bss_start = . );
.bss :
{
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
} >ram AT>ram :ram
. = ALIGN(8);
PROVIDE( _end = . );
PROVIDE( end = . );
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
{
PROVIDE( _heap_end = . );
. = __stack_size;
PROVIDE( _sp = . );
} >ram AT>ram :ram
PROVIDE( tohost = 0xfffffff0 );
PROVIDE( fromhost = 0xfffffff8 );
}

4
env/start.S vendored
View File

@ -37,11 +37,11 @@ _start:
2: 2:
/* Call global constructors */ /* Call global constructors */
//#ifdef HAVE_INIT_FINI #ifndef HAVE_NO_INIT_FINI
la a0, __libc_fini_array la a0, __libc_fini_array
call atexit call atexit
call __libc_init_array call __libc_init_array
//#endif #endif
#ifndef __riscv_float_abi_soft #ifndef __riscv_float_abi_soft
/* Enable FPU */ /* Enable FPU */
li t0, MSTATUS_FS li t0, MSTATUS_FS

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-05-30 18:25:57 UTC * Generated at 2024-06-08 13:20:02 UTC
* by peakrdl_mnrs version 1.2.5 * by peakrdl_mnrs version 1.2.5
*/ */
@ -32,6 +32,10 @@ typedef struct __attribute((__packed__)) {
#define UART_RX_TX_REG_TX_FREE_MASK 0x1 #define UART_RX_TX_REG_TX_FREE_MASK 0x1
#define UART_RX_TX_REG_TX_FREE(V) ((V & UART_RX_TX_REG_TX_FREE_MASK) << UART_RX_TX_REG_TX_FREE_OFFS) #define UART_RX_TX_REG_TX_FREE(V) ((V & UART_RX_TX_REG_TX_FREE_MASK) << UART_RX_TX_REG_TX_FREE_OFFS)
#define UART_RX_TX_REG_TX_EMPTY_OFFS 16
#define UART_RX_TX_REG_TX_EMPTY_MASK 0x1
#define UART_RX_TX_REG_TX_EMPTY(V) ((V & UART_RX_TX_REG_TX_EMPTY_MASK) << UART_RX_TX_REG_TX_EMPTY_OFFS)
#define UART_INT_CTRL_REG_WRITE_INTR_ENABLE_OFFS 0 #define UART_INT_CTRL_REG_WRITE_INTR_ENABLE_OFFS 0
#define UART_INT_CTRL_REG_WRITE_INTR_ENABLE_MASK 0x1 #define UART_INT_CTRL_REG_WRITE_INTR_ENABLE_MASK 0x1
#define UART_INT_CTRL_REG_WRITE_INTR_ENABLE(V) ((V & UART_INT_CTRL_REG_WRITE_INTR_ENABLE_MASK) << UART_INT_CTRL_REG_WRITE_INTR_ENABLE_OFFS) #define UART_INT_CTRL_REG_WRITE_INTR_ENABLE(V) ((V & UART_INT_CTRL_REG_WRITE_INTR_ENABLE_MASK) << UART_INT_CTRL_REG_WRITE_INTR_ENABLE_OFFS)
@ -115,6 +119,9 @@ inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile uart_t* reg){
inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){ inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){
return (reg->RX_TX_REG >> 15) & 0x1; return (reg->RX_TX_REG >> 15) & 0x1;
} }
inline uint32_t get_uart_rx_tx_reg_tx_empty(volatile uart_t* reg){
return (reg->RX_TX_REG >> 16) & 0x1;
}
//UART_INT_CTRL_REG //UART_INT_CTRL_REG
inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){ inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){

View File

@ -4,7 +4,7 @@
#include <stdint.h> #include <stdint.h>
#include "gen/gpio.h" #include "gen/gpio.h"
inline void gpio_init(gpio_t* reg) { inline void gpio_init(volatile gpio_t* reg) {
set_gpio_write(reg, 0); set_gpio_write(reg, 0);
set_gpio_writeEnable(reg, 0); set_gpio_writeEnable(reg, 0);
} }

View File

@ -5,11 +5,15 @@
#include "gen/uart.h" #include "gen/uart.h"
static inline uint32_t uart_get_tx_free(volatile uart_t* reg){ static inline uint32_t uart_get_tx_free(volatile uart_t* reg){
return (reg->STATUS_REG >> 16) & 0xFF; return get_uart_rx_tx_reg_tx_free(reg);
}
static inline uint32_t uart_get_tx_empty(volatile uart_t* reg){
return get_uart_rx_tx_reg_tx_empty(reg);
} }
static inline uint32_t uart_get_rx_avail(volatile uart_t* reg){ static inline uint32_t uart_get_rx_avail(volatile uart_t* reg){
return reg->STATUS_REG >> 24; return get_uart_rx_tx_reg_rx_avail(reg);
} }
static inline void uart_write(volatile uart_t* reg, uint8_t data){ static inline void uart_write(volatile uart_t* reg, uint8_t data){