adapts to changed field layout in config registers of the camera module

This commit is contained in:
Florian Kriebel 2025-03-03 11:05:04 +01:00
parent e372f59715
commit 19e7a3e85e

View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2025-02-26 17:04:33 UTC * Generated at 2025-02-28 17:25:03 UTC
* by peakrdl_mnrs version 1.2.9 * by peakrdl_mnrs version 1.2.9
*/ */
@ -15,7 +15,7 @@
typedef struct { typedef struct {
volatile uint32_t PIXEL; volatile uint32_t PIXEL;
volatile uint32_t CONFIG; volatile uint32_t CONFIG;
volatile uint32_t CONFIG1; volatile uint32_t CONFIG2;
volatile uint32_t DATA_SIZE; volatile uint32_t DATA_SIZE;
volatile uint32_t START; volatile uint32_t START;
volatile uint32_t STATUS; volatile uint32_t STATUS;
@ -28,69 +28,69 @@ typedef struct {
#define CAMERA_PIXEL_MASK 0xffffffff #define CAMERA_PIXEL_MASK 0xffffffff
#define CAMERA_PIXEL(V) ((V & CAMERA_PIXEL_MASK) << CAMERA_PIXEL_OFFS) #define CAMERA_PIXEL(V) ((V & CAMERA_PIXEL_MASK) << CAMERA_PIXEL_OFFS)
#define CAMERA_CONFIG_ROWS_IN_RESET_OFFS 0 #define CAMERA_CONFIG_OUTPUT_CURR_OFFS 0
#define CAMERA_CONFIG_ROWS_IN_RESET_MASK 0xff
#define CAMERA_CONFIG_ROWS_IN_RESET(V) ((V & CAMERA_CONFIG_ROWS_IN_RESET_MASK) << CAMERA_CONFIG_ROWS_IN_RESET_OFFS)
#define CAMERA_CONFIG_VRST_PIX_OFFS 8
#define CAMERA_CONFIG_VRST_PIX_MASK 0x3
#define CAMERA_CONFIG_VRST_PIX(V) ((V & CAMERA_CONFIG_VRST_PIX_MASK) << CAMERA_CONFIG_VRST_PIX_OFFS)
#define CAMERA_CONFIG_RAMP_GAIN_OFFS 10
#define CAMERA_CONFIG_RAMP_GAIN_MASK 0x3
#define CAMERA_CONFIG_RAMP_GAIN(V) ((V & CAMERA_CONFIG_RAMP_GAIN_MASK) << CAMERA_CONFIG_RAMP_GAIN_OFFS)
#define CAMERA_CONFIG_OFFSET_RAMP_OFFS 12
#define CAMERA_CONFIG_OFFSET_RAMP_MASK 0x3
#define CAMERA_CONFIG_OFFSET_RAMP(V) ((V & CAMERA_CONFIG_OFFSET_RAMP_MASK) << CAMERA_CONFIG_OFFSET_RAMP_OFFS)
#define CAMERA_CONFIG_OUTPUT_CURR_OFFS 14
#define CAMERA_CONFIG_OUTPUT_CURR_MASK 0x3 #define CAMERA_CONFIG_OUTPUT_CURR_MASK 0x3
#define CAMERA_CONFIG_OUTPUT_CURR(V) ((V & CAMERA_CONFIG_OUTPUT_CURR_MASK) << CAMERA_CONFIG_OUTPUT_CURR_OFFS) #define CAMERA_CONFIG_OUTPUT_CURR(V) ((V & CAMERA_CONFIG_OUTPUT_CURR_MASK) << CAMERA_CONFIG_OUTPUT_CURR_OFFS)
#define CAMERA_CONFIG_ROWS_DELAY_OFFS 16 #define CAMERA_CONFIG_OFFSET_RAMP_OFFS 2
#define CAMERA_CONFIG_ROWS_DELAY_MASK 0x1f #define CAMERA_CONFIG_OFFSET_RAMP_MASK 0x3
#define CAMERA_CONFIG_ROWS_DELAY(V) ((V & CAMERA_CONFIG_ROWS_DELAY_MASK) << CAMERA_CONFIG_ROWS_DELAY_OFFS) #define CAMERA_CONFIG_OFFSET_RAMP(V) ((V & CAMERA_CONFIG_OFFSET_RAMP_MASK) << CAMERA_CONFIG_OFFSET_RAMP_OFFS)
#define CAMERA_CONFIG_BIAS_CURR_INCREASE_OFFS 21 #define CAMERA_CONFIG_RAMP_GAIN_OFFS 4
#define CAMERA_CONFIG_BIAS_CURR_INCREASE_MASK 0x1 #define CAMERA_CONFIG_RAMP_GAIN_MASK 0x3
#define CAMERA_CONFIG_BIAS_CURR_INCREASE(V) ((V & CAMERA_CONFIG_BIAS_CURR_INCREASE_MASK) << CAMERA_CONFIG_BIAS_CURR_INCREASE_OFFS) #define CAMERA_CONFIG_RAMP_GAIN(V) ((V & CAMERA_CONFIG_RAMP_GAIN_MASK) << CAMERA_CONFIG_RAMP_GAIN_OFFS)
#define CAMERA_CONFIG_CDS_GAIN_OFFS 22 #define CAMERA_CONFIG_VRST_PIX_OFFS 6
#define CAMERA_CONFIG_CDS_GAIN_MASK 0x1 #define CAMERA_CONFIG_VRST_PIX_MASK 0x3
#define CAMERA_CONFIG_CDS_GAIN(V) ((V & CAMERA_CONFIG_CDS_GAIN_MASK) << CAMERA_CONFIG_CDS_GAIN_OFFS) #define CAMERA_CONFIG_VRST_PIX(V) ((V & CAMERA_CONFIG_VRST_PIX_MASK) << CAMERA_CONFIG_VRST_PIX_OFFS)
#define CAMERA_CONFIG_OUTPUT_MODE_OFFS 23 #define CAMERA_CONFIG_ROWS_IN_RESET_OFFS 8
#define CAMERA_CONFIG_OUTPUT_MODE_MASK 0x1 #define CAMERA_CONFIG_ROWS_IN_RESET_MASK 0xff
#define CAMERA_CONFIG_OUTPUT_MODE(V) ((V & CAMERA_CONFIG_OUTPUT_MODE_MASK) << CAMERA_CONFIG_OUTPUT_MODE_OFFS) #define CAMERA_CONFIG_ROWS_IN_RESET(V) ((V & CAMERA_CONFIG_ROWS_IN_RESET_MASK) << CAMERA_CONFIG_ROWS_IN_RESET_OFFS)
#define CAMERA_CONFIG_MCLK_MODE_OFFS 24 #define CAMERA_CONFIG_HIGH_SPEED_OFFS 16
#define CAMERA_CONFIG_MCLK_MODE_MASK 0x3
#define CAMERA_CONFIG_MCLK_MODE(V) ((V & CAMERA_CONFIG_MCLK_MODE_MASK) << CAMERA_CONFIG_MCLK_MODE_OFFS)
#define CAMERA_CONFIG_VREF_OFFS 26
#define CAMERA_CONFIG_VREF_MASK 0x3
#define CAMERA_CONFIG_VREF(V) ((V & CAMERA_CONFIG_VREF_MASK) << CAMERA_CONFIG_VREF_OFFS)
#define CAMERA_CONFIG_CVC_CURR_OFFS 28
#define CAMERA_CONFIG_CVC_CURR_MASK 0x3
#define CAMERA_CONFIG_CVC_CURR(V) ((V & CAMERA_CONFIG_CVC_CURR_MASK) << CAMERA_CONFIG_CVC_CURR_OFFS)
#define CAMERA_CONFIG_IDLE_MODE_OFFS 30
#define CAMERA_CONFIG_IDLE_MODE_MASK 0x1
#define CAMERA_CONFIG_IDLE_MODE(V) ((V & CAMERA_CONFIG_IDLE_MODE_MASK) << CAMERA_CONFIG_IDLE_MODE_OFFS)
#define CAMERA_CONFIG_HIGH_SPEED_OFFS 31
#define CAMERA_CONFIG_HIGH_SPEED_MASK 0x1 #define CAMERA_CONFIG_HIGH_SPEED_MASK 0x1
#define CAMERA_CONFIG_HIGH_SPEED(V) ((V & CAMERA_CONFIG_HIGH_SPEED_MASK) << CAMERA_CONFIG_HIGH_SPEED_OFFS) #define CAMERA_CONFIG_HIGH_SPEED(V) ((V & CAMERA_CONFIG_HIGH_SPEED_MASK) << CAMERA_CONFIG_HIGH_SPEED_OFFS)
#define CAMERA_CONFIG1_AUTO_IDLE_OFFS 0 #define CAMERA_CONFIG_IDLE_MODE_OFFS 17
#define CAMERA_CONFIG1_AUTO_IDLE_MASK 0x1 #define CAMERA_CONFIG_IDLE_MODE_MASK 0x1
#define CAMERA_CONFIG1_AUTO_IDLE(V) ((V & CAMERA_CONFIG1_AUTO_IDLE_MASK) << CAMERA_CONFIG1_AUTO_IDLE_OFFS) #define CAMERA_CONFIG_IDLE_MODE(V) ((V & CAMERA_CONFIG_IDLE_MODE_MASK) << CAMERA_CONFIG_IDLE_MODE_OFFS)
#define CAMERA_CONFIG1_AUTO_DISCARD_FRAME_OFFS 1 #define CAMERA_CONFIG_CVC_CURR_OFFS 18
#define CAMERA_CONFIG1_AUTO_DISCARD_FRAME_MASK 0x1 #define CAMERA_CONFIG_CVC_CURR_MASK 0x3
#define CAMERA_CONFIG1_AUTO_DISCARD_FRAME(V) ((V & CAMERA_CONFIG1_AUTO_DISCARD_FRAME_MASK) << CAMERA_CONFIG1_AUTO_DISCARD_FRAME_OFFS) #define CAMERA_CONFIG_CVC_CURR(V) ((V & CAMERA_CONFIG_CVC_CURR_MASK) << CAMERA_CONFIG_CVC_CURR_OFFS)
#define CAMERA_CONFIG_VREF_OFFS 20
#define CAMERA_CONFIG_VREF_MASK 0x3
#define CAMERA_CONFIG_VREF(V) ((V & CAMERA_CONFIG_VREF_MASK) << CAMERA_CONFIG_VREF_OFFS)
#define CAMERA_CONFIG_MCLK_MODE_OFFS 22
#define CAMERA_CONFIG_MCLK_MODE_MASK 0x3
#define CAMERA_CONFIG_MCLK_MODE(V) ((V & CAMERA_CONFIG_MCLK_MODE_MASK) << CAMERA_CONFIG_MCLK_MODE_OFFS)
#define CAMERA_CONFIG_OUTPUT_MODE_OFFS 24
#define CAMERA_CONFIG_OUTPUT_MODE_MASK 0x1
#define CAMERA_CONFIG_OUTPUT_MODE(V) ((V & CAMERA_CONFIG_OUTPUT_MODE_MASK) << CAMERA_CONFIG_OUTPUT_MODE_OFFS)
#define CAMERA_CONFIG_CDS_GAIN_OFFS 25
#define CAMERA_CONFIG_CDS_GAIN_MASK 0x1
#define CAMERA_CONFIG_CDS_GAIN(V) ((V & CAMERA_CONFIG_CDS_GAIN_MASK) << CAMERA_CONFIG_CDS_GAIN_OFFS)
#define CAMERA_CONFIG_BIAS_CURR_INCREASE_OFFS 26
#define CAMERA_CONFIG_BIAS_CURR_INCREASE_MASK 0x1
#define CAMERA_CONFIG_BIAS_CURR_INCREASE(V) ((V & CAMERA_CONFIG_BIAS_CURR_INCREASE_MASK) << CAMERA_CONFIG_BIAS_CURR_INCREASE_OFFS)
#define CAMERA_CONFIG_ROWS_DELAY_OFFS 27
#define CAMERA_CONFIG_ROWS_DELAY_MASK 0x1f
#define CAMERA_CONFIG_ROWS_DELAY(V) ((V & CAMERA_CONFIG_ROWS_DELAY_MASK) << CAMERA_CONFIG_ROWS_DELAY_OFFS)
#define CAMERA_CONFIG2_AUTO_IDLE_OFFS 0
#define CAMERA_CONFIG2_AUTO_IDLE_MASK 0x1
#define CAMERA_CONFIG2_AUTO_IDLE(V) ((V & CAMERA_CONFIG2_AUTO_IDLE_MASK) << CAMERA_CONFIG2_AUTO_IDLE_OFFS)
#define CAMERA_CONFIG2_AUTO_DISCARD_FRAME_OFFS 1
#define CAMERA_CONFIG2_AUTO_DISCARD_FRAME_MASK 0x1
#define CAMERA_CONFIG2_AUTO_DISCARD_FRAME(V) ((V & CAMERA_CONFIG2_AUTO_DISCARD_FRAME_MASK) << CAMERA_CONFIG2_AUTO_DISCARD_FRAME_OFFS)
#define CAMERA_DATA_SIZE_OFFS 0 #define CAMERA_DATA_SIZE_OFFS 0
#define CAMERA_DATA_SIZE_MASK 0x3 #define CAMERA_DATA_SIZE_MASK 0x3
@ -139,109 +139,109 @@ inline uint32_t get_camera_config(volatile camera_t* reg){
inline void set_camera_config(volatile camera_t* reg, uint32_t value){ inline void set_camera_config(volatile camera_t* reg, uint32_t value){
reg->CONFIG = value; reg->CONFIG = value;
} }
inline uint32_t get_camera_config_rows_in_reset(volatile camera_t* reg){
return (reg->CONFIG >> 0) & 0xff;
}
inline void set_camera_config_rows_in_reset(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0xffU << 0)) | (value << 0);
}
inline uint32_t get_camera_config_vrst_pix(volatile camera_t* reg){
return (reg->CONFIG >> 8) & 0x3;
}
inline void set_camera_config_vrst_pix(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 8)) | (value << 8);
}
inline uint32_t get_camera_config_ramp_gain(volatile camera_t* reg){
return (reg->CONFIG >> 10) & 0x3;
}
inline void set_camera_config_ramp_gain(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 10)) | (value << 10);
}
inline uint32_t get_camera_config_offset_ramp(volatile camera_t* reg){
return (reg->CONFIG >> 12) & 0x3;
}
inline void set_camera_config_offset_ramp(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 12)) | (value << 12);
}
inline uint32_t get_camera_config_output_curr(volatile camera_t* reg){ inline uint32_t get_camera_config_output_curr(volatile camera_t* reg){
return (reg->CONFIG >> 14) & 0x3; return (reg->CONFIG >> 0) & 0x3;
} }
inline void set_camera_config_output_curr(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_output_curr(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 14)) | (value << 14); reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0);
} }
inline uint32_t get_camera_config_rows_delay(volatile camera_t* reg){ inline uint32_t get_camera_config_offset_ramp(volatile camera_t* reg){
return (reg->CONFIG >> 16) & 0x1f; return (reg->CONFIG >> 2) & 0x3;
} }
inline void set_camera_config_rows_delay(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_offset_ramp(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1fU << 16)) | (value << 16); reg->CONFIG = (reg->CONFIG & ~(0x3U << 2)) | (value << 2);
} }
inline uint32_t get_camera_config_bias_curr_increase(volatile camera_t* reg){ inline uint32_t get_camera_config_ramp_gain(volatile camera_t* reg){
return (reg->CONFIG >> 21) & 0x1; return (reg->CONFIG >> 4) & 0x3;
} }
inline void set_camera_config_bias_curr_increase(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_ramp_gain(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 21)) | (value << 21); reg->CONFIG = (reg->CONFIG & ~(0x3U << 4)) | (value << 4);
} }
inline uint32_t get_camera_config_cds_gain(volatile camera_t* reg){ inline uint32_t get_camera_config_vrst_pix(volatile camera_t* reg){
return (reg->CONFIG >> 22) & 0x1; return (reg->CONFIG >> 6) & 0x3;
} }
inline void set_camera_config_cds_gain(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_vrst_pix(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 22)) | (value << 22); reg->CONFIG = (reg->CONFIG & ~(0x3U << 6)) | (value << 6);
} }
inline uint32_t get_camera_config_output_mode(volatile camera_t* reg){ inline uint32_t get_camera_config_rows_in_reset(volatile camera_t* reg){
return (reg->CONFIG >> 23) & 0x1; return (reg->CONFIG >> 8) & 0xff;
} }
inline void set_camera_config_output_mode(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_rows_in_reset(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 23)) | (value << 23); reg->CONFIG = (reg->CONFIG & ~(0xffU << 8)) | (value << 8);
}
inline uint32_t get_camera_config_mclk_mode(volatile camera_t* reg){
return (reg->CONFIG >> 24) & 0x3;
}
inline void set_camera_config_mclk_mode(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 24)) | (value << 24);
}
inline uint32_t get_camera_config_vref(volatile camera_t* reg){
return (reg->CONFIG >> 26) & 0x3;
}
inline void set_camera_config_vref(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 26)) | (value << 26);
}
inline uint32_t get_camera_config_cvc_curr(volatile camera_t* reg){
return (reg->CONFIG >> 28) & 0x3;
}
inline void set_camera_config_cvc_curr(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 28)) | (value << 28);
}
inline uint32_t get_camera_config_idle_mode(volatile camera_t* reg){
return (reg->CONFIG >> 30) & 0x1;
}
inline void set_camera_config_idle_mode(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 30)) | (value << 30);
} }
inline uint32_t get_camera_config_high_speed(volatile camera_t* reg){ inline uint32_t get_camera_config_high_speed(volatile camera_t* reg){
return (reg->CONFIG >> 31) & 0x1; return (reg->CONFIG >> 16) & 0x1;
} }
inline void set_camera_config_high_speed(volatile camera_t* reg, uint8_t value){ inline void set_camera_config_high_speed(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 31)) | (value << 31); reg->CONFIG = (reg->CONFIG & ~(0x1U << 16)) | (value << 16);
}
inline uint32_t get_camera_config_idle_mode(volatile camera_t* reg){
return (reg->CONFIG >> 17) & 0x1;
}
inline void set_camera_config_idle_mode(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 17)) | (value << 17);
}
inline uint32_t get_camera_config_cvc_curr(volatile camera_t* reg){
return (reg->CONFIG >> 18) & 0x3;
}
inline void set_camera_config_cvc_curr(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 18)) | (value << 18);
}
inline uint32_t get_camera_config_vref(volatile camera_t* reg){
return (reg->CONFIG >> 20) & 0x3;
}
inline void set_camera_config_vref(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 20)) | (value << 20);
}
inline uint32_t get_camera_config_mclk_mode(volatile camera_t* reg){
return (reg->CONFIG >> 22) & 0x3;
}
inline void set_camera_config_mclk_mode(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 22)) | (value << 22);
}
inline uint32_t get_camera_config_output_mode(volatile camera_t* reg){
return (reg->CONFIG >> 24) & 0x1;
}
inline void set_camera_config_output_mode(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 24)) | (value << 24);
}
inline uint32_t get_camera_config_cds_gain(volatile camera_t* reg){
return (reg->CONFIG >> 25) & 0x1;
}
inline void set_camera_config_cds_gain(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 25)) | (value << 25);
}
inline uint32_t get_camera_config_bias_curr_increase(volatile camera_t* reg){
return (reg->CONFIG >> 26) & 0x1;
}
inline void set_camera_config_bias_curr_increase(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1U << 26)) | (value << 26);
}
inline uint32_t get_camera_config_rows_delay(volatile camera_t* reg){
return (reg->CONFIG >> 27) & 0x1f;
}
inline void set_camera_config_rows_delay(volatile camera_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x1fU << 27)) | (value << 27);
} }
//CAMERA_CONFIG1 //CAMERA_CONFIG2
inline uint32_t get_camera_config1(volatile camera_t* reg){ inline uint32_t get_camera_config2(volatile camera_t* reg){
return reg->CONFIG1; return reg->CONFIG2;
} }
inline void set_camera_config1(volatile camera_t* reg, uint32_t value){ inline void set_camera_config2(volatile camera_t* reg, uint32_t value){
reg->CONFIG1 = value; reg->CONFIG2 = value;
} }
inline uint32_t get_camera_config1_auto_idle(volatile camera_t* reg){ inline uint32_t get_camera_config2_auto_idle(volatile camera_t* reg){
return (reg->CONFIG1 >> 0) & 0x1; return (reg->CONFIG2 >> 0) & 0x1;
} }
inline void set_camera_config1_auto_idle(volatile camera_t* reg, uint8_t value){ inline void set_camera_config2_auto_idle(volatile camera_t* reg, uint8_t value){
reg->CONFIG1 = (reg->CONFIG1 & ~(0x1U << 0)) | (value << 0); reg->CONFIG2 = (reg->CONFIG2 & ~(0x1U << 0)) | (value << 0);
} }
inline uint32_t get_camera_config1_auto_discard_frame(volatile camera_t* reg){ inline uint32_t get_camera_config2_auto_discard_frame(volatile camera_t* reg){
return (reg->CONFIG1 >> 1) & 0x1; return (reg->CONFIG2 >> 1) & 0x1;
} }
inline void set_camera_config1_auto_discard_frame(volatile camera_t* reg, uint8_t value){ inline void set_camera_config2_auto_discard_frame(volatile camera_t* reg, uint8_t value){
reg->CONFIG1 = (reg->CONFIG1 & ~(0x1U << 1)) | (value << 1); reg->CONFIG2 = (reg->CONFIG2 & ~(0x1U << 1)) | (value << 1);
} }
//CAMERA_DATA_SIZE //CAMERA_DATA_SIZE