MNRS-BM-BSP/include/ehrenberg/devices/gen/simpledma.h

/*
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Generated at 2024-05-30 18:25:57 UTC 
* by peakrdl_mnrs version 1.2.5
*/

#ifndef _BSP_SIMPLEDMA_H
#define _BSP_SIMPLEDMA_H

#include <stdint.h>

typedef struct __attribute((__packed__)) {
    volatile uint32_t CONTROL;
    volatile uint32_t STATUS;
    volatile uint32_t EVENT_SEL;
    volatile uint32_t IE;
    volatile uint32_t IP;
    volatile uint32_t TRANSFER;
    volatile uint32_t SRC_START_ADDR;
    volatile uint32_t SRC_STRIDE;
    volatile uint32_t DST_START_ADDR;
    volatile uint32_t DST_STRIDE;
}simpledma_t;

#define SIMPLEDMA_CONTROL_OFFS 0
#define SIMPLEDMA_CONTROL_MASK 0x1
#define SIMPLEDMA_CONTROL(V) ((V & SIMPLEDMA_CONTROL_MASK) << SIMPLEDMA_CONTROL_OFFS)

#define SIMPLEDMA_STATUS_OFFS 0
#define SIMPLEDMA_STATUS_MASK 0x1
#define SIMPLEDMA_STATUS(V) ((V & SIMPLEDMA_STATUS_MASK) << SIMPLEDMA_STATUS_OFFS)

#define SIMPLEDMA_EVENT_SEL_OFFS 0
#define SIMPLEDMA_EVENT_SEL_MASK 0x3
#define SIMPLEDMA_EVENT_SEL(V) ((V & SIMPLEDMA_EVENT_SEL_MASK) << SIMPLEDMA_EVENT_SEL_OFFS)

#define SIMPLEDMA_IE_EN_SEG_TRANSFER_DONE_OFFS 0
#define SIMPLEDMA_IE_EN_SEG_TRANSFER_DONE_MASK 0x1
#define SIMPLEDMA_IE_EN_SEG_TRANSFER_DONE(V) ((V & SIMPLEDMA_IE_EN_SEG_TRANSFER_DONE_MASK) << SIMPLEDMA_IE_EN_SEG_TRANSFER_DONE_OFFS)

#define SIMPLEDMA_IE_EN_TRANSFER_DONE_OFFS 1
#define SIMPLEDMA_IE_EN_TRANSFER_DONE_MASK 0x1
#define SIMPLEDMA_IE_EN_TRANSFER_DONE(V) ((V & SIMPLEDMA_IE_EN_TRANSFER_DONE_MASK) << SIMPLEDMA_IE_EN_TRANSFER_DONE_OFFS)

#define SIMPLEDMA_IP_SEG_TRANSFER_DONE_OFFS 0
#define SIMPLEDMA_IP_SEG_TRANSFER_DONE_MASK 0x1
#define SIMPLEDMA_IP_SEG_TRANSFER_DONE(V) ((V & SIMPLEDMA_IP_SEG_TRANSFER_DONE_MASK) << SIMPLEDMA_IP_SEG_TRANSFER_DONE_OFFS)

#define SIMPLEDMA_IP_TRANSFER_DONE_OFFS 1
#define SIMPLEDMA_IP_TRANSFER_DONE_MASK 0x1
#define SIMPLEDMA_IP_TRANSFER_DONE(V) ((V & SIMPLEDMA_IP_TRANSFER_DONE_MASK) << SIMPLEDMA_IP_TRANSFER_DONE_OFFS)

#define SIMPLEDMA_TRANSFER_LENGTH_OFFS 0
#define SIMPLEDMA_TRANSFER_LENGTH_MASK 0x3ff
#define SIMPLEDMA_TRANSFER_LENGTH(V) ((V & SIMPLEDMA_TRANSFER_LENGTH_MASK) << SIMPLEDMA_TRANSFER_LENGTH_OFFS)

#define SIMPLEDMA_TRANSFER_COUNT_OFFS 12
#define SIMPLEDMA_TRANSFER_COUNT_MASK 0xfffff
#define SIMPLEDMA_TRANSFER_COUNT(V) ((V & SIMPLEDMA_TRANSFER_COUNT_MASK) << SIMPLEDMA_TRANSFER_COUNT_OFFS)

#define SIMPLEDMA_SRC_START_ADDR_OFFS 0
#define SIMPLEDMA_SRC_START_ADDR_MASK 0xffffffff
#define SIMPLEDMA_SRC_START_ADDR(V) ((V & SIMPLEDMA_SRC_START_ADDR_MASK) << SIMPLEDMA_SRC_START_ADDR_OFFS)

#define SIMPLEDMA_SRC_STRIDE_OFFS 0
#define SIMPLEDMA_SRC_STRIDE_MASK 0xffffffff
#define SIMPLEDMA_SRC_STRIDE(V) ((V & SIMPLEDMA_SRC_STRIDE_MASK) << SIMPLEDMA_SRC_STRIDE_OFFS)

#define SIMPLEDMA_DST_START_ADDR_OFFS 0
#define SIMPLEDMA_DST_START_ADDR_MASK 0xffffffff
#define SIMPLEDMA_DST_START_ADDR(V) ((V & SIMPLEDMA_DST_START_ADDR_MASK) << SIMPLEDMA_DST_START_ADDR_OFFS)

#define SIMPLEDMA_DST_STRIDE_OFFS 0
#define SIMPLEDMA_DST_STRIDE_MASK 0xffffffff
#define SIMPLEDMA_DST_STRIDE(V) ((V & SIMPLEDMA_DST_STRIDE_MASK) << SIMPLEDMA_DST_STRIDE_OFFS)

//SIMPLEDMA_CONTROL
inline uint32_t get_simpledma_control(volatile simpledma_t* reg){
    return (reg->CONTROL >> 0) & 0x1;
}
inline void set_simpledma_control(volatile simpledma_t* reg, uint8_t value){
    reg->CONTROL = (reg->CONTROL & ~(0x1U << 0)) | (value << 0);
}

//SIMPLEDMA_STATUS
inline uint32_t get_simpledma_status(volatile simpledma_t* reg){
    return (reg->STATUS >> 0) & 0x1;
}

//SIMPLEDMA_EVENT_SEL
inline uint32_t get_simpledma_event_sel(volatile simpledma_t* reg){
    return (reg->EVENT_SEL >> 0) & 0x3;
}
inline void set_simpledma_event_sel(volatile simpledma_t* reg, uint8_t value){
    reg->EVENT_SEL = (reg->EVENT_SEL & ~(0x3U << 0)) | (value << 0);
}

//SIMPLEDMA_IE
inline uint32_t get_simpledma_ie(volatile simpledma_t* reg){
     return reg->IE;
}
inline void set_simpledma_ie(volatile simpledma_t* reg, uint32_t value){
     reg->IE = value;
}
inline uint32_t get_simpledma_ie_en_seg_transfer_done(volatile simpledma_t* reg){
    return (reg->IE >> 0) & 0x1;
}
inline void set_simpledma_ie_en_seg_transfer_done(volatile simpledma_t* reg, uint8_t value){
    reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_simpledma_ie_en_transfer_done(volatile simpledma_t* reg){
    return (reg->IE >> 1) & 0x1;
}
inline void set_simpledma_ie_en_transfer_done(volatile simpledma_t* reg, uint8_t value){
    reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
}

//SIMPLEDMA_IP
inline uint32_t get_simpledma_ip(volatile simpledma_t* reg){
     return reg->IP;
}
inline void set_simpledma_ip(volatile simpledma_t* reg, uint32_t value){
     reg->IP = value;
}
inline uint32_t get_simpledma_ip_seg_transfer_done(volatile simpledma_t* reg){
    return (reg->IP >> 0) & 0x1;
}
inline uint32_t get_simpledma_ip_transfer_done(volatile simpledma_t* reg){
    return (reg->IP >> 1) & 0x1;
}

//SIMPLEDMA_TRANSFER
inline uint32_t get_simpledma_transfer(volatile simpledma_t* reg){
     return reg->TRANSFER;
}
inline void set_simpledma_transfer(volatile simpledma_t* reg, uint32_t value){
     reg->TRANSFER = value;
}
inline uint32_t get_simpledma_transfer_length(volatile simpledma_t* reg){
    return (reg->TRANSFER >> 0) & 0x3ff;
}
inline void set_simpledma_transfer_length(volatile simpledma_t* reg, uint16_t value){
    reg->TRANSFER = (reg->TRANSFER & ~(0x3ffU << 0)) | (value << 0);
}
inline uint32_t get_simpledma_transfer_count(volatile simpledma_t* reg){
    return (reg->TRANSFER >> 12) & 0xfffff;
}
inline void set_simpledma_transfer_count(volatile simpledma_t* reg, uint32_t value){
    reg->TRANSFER = (reg->TRANSFER & ~(0xfffffU << 12)) | (value << 12);
}

//SIMPLEDMA_SRC_START_ADDR
inline uint32_t get_simpledma_src_start_addr(volatile simpledma_t* reg){
    return (reg->SRC_START_ADDR >> 0) & 0xffffffff;
}
inline void set_simpledma_src_start_addr(volatile simpledma_t* reg, uint32_t value){
    reg->SRC_START_ADDR = (reg->SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}

//SIMPLEDMA_SRC_STRIDE
inline uint32_t get_simpledma_src_stride(volatile simpledma_t* reg){
    return (reg->SRC_STRIDE >> 0) & 0xffffffff;
}
inline void set_simpledma_src_stride(volatile simpledma_t* reg, uint32_t value){
    reg->SRC_STRIDE = (reg->SRC_STRIDE & ~(0xffffffffU << 0)) | (value << 0);
}

//SIMPLEDMA_DST_START_ADDR
inline uint32_t get_simpledma_dst_start_addr(volatile simpledma_t* reg){
    return (reg->DST_START_ADDR >> 0) & 0xffffffff;
}
inline void set_simpledma_dst_start_addr(volatile simpledma_t* reg, uint32_t value){
    reg->DST_START_ADDR = (reg->DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}

//SIMPLEDMA_DST_STRIDE
inline uint32_t get_simpledma_dst_stride(volatile simpledma_t* reg){
    return (reg->DST_STRIDE >> 0) & 0xffffffff;
}
inline void set_simpledma_dst_stride(volatile simpledma_t* reg, uint32_t value){
    reg->DST_STRIDE = (reg->DST_STRIDE & ~(0xffffffffU << 0)) | (value << 0);
}

#endif /* _BSP_SIMPLEDMA_H */