MNRS-BM-BSP/include/ehrenberg/devices/gen/Apb3Gpio.h

/*
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Generated at 2024-03-28 11:47:58 UTC 
* by peakrdl_mnrs version 1.2.4
*/

#ifndef _BSP_APB3GPIO_H
#define _BSP_APB3GPIO_H

#include <stdint.h>

typedef struct __attribute((__packed__)) {
    volatile uint32_t VALUE;
    volatile uint32_t WRITE;
    volatile uint32_t WRITEENABLE;
}apb3gpio_t;

#define GPIO_VALUE_OFFS 0
#define GPIO_VALUE_MASK 0xffffffff
#define GPIO_VALUE(V) ((V & GPIO_VALUE_MASK) << GPIO_VALUE_OFFS)

#define GPIO_WRITE_OFFS 0
#define GPIO_WRITE_MASK 0xffffffff
#define GPIO_WRITE(V) ((V & GPIO_WRITE_MASK) << GPIO_WRITE_OFFS)

#define GPIO_WRITEENABLE_OFFS 0
#define GPIO_WRITEENABLE_MASK 0xffffffff
#define GPIO_WRITEENABLE(V) ((V & GPIO_WRITEENABLE_MASK) << GPIO_WRITEENABLE_OFFS)

//GPIO_VALUE
inline uint32_t get_gpio_value(volatile apb3gpio_t* reg){
    return (reg->VALUE >> 0) & 0xffffffff;
}

//GPIO_WRITE
inline uint32_t get_gpio_write(volatile apb3gpio_t* reg){
    return (reg->WRITE >> 0) & 0xffffffff;
}
inline void set_gpio_write(volatile apb3gpio_t* reg, uint32_t value){
    reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0);
}

//GPIO_WRITEENABLE
inline uint32_t get_gpio_writeEnable(volatile apb3gpio_t* reg){
    return (reg->WRITEENABLE >> 0) & 0xffffffff;
}
inline void set_gpio_writeEnable(volatile apb3gpio_t* reg, uint32_t value){
    reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0);
}

#endif /* _BSP_APB3GPIO_H */