MNRS-BM-BSP/include/ehrenberg/devices/gen/Apb3Uart.h

/*
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Generated at 2024-02-19 14:24:37 UTC 
* by peakrdl_mnrs version 1.2.2
*/

#ifndef _BSP_APB3UART_H
#define _BSP_APB3UART_H

#include <stdint.h>

typedef struct __attribute((__packed__)) {
    volatile uint32_t RX_TX_REG;
    volatile uint32_t INT_CTRL_REG;
    volatile uint32_t CLK_DIVIDER_REG;
    volatile uint32_t FRAME_CONFIG_REG;
    volatile uint32_t STATUS_REG;
}apb3uart_t;

inline uint32_t get_uart_rx_tx_reg_data(volatile apb3uart_t *reg){
    return (reg->RX_TX_REG >> 0) & 0xff;
}
inline void set_uart_rx_tx_reg_data(volatile apb3uart_t *reg, uint8_t value){
    reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0);
}
inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile apb3uart_t *reg){
    return (reg->RX_TX_REG >> 14) & 0x1;
}
inline uint32_t get_uart_rx_tx_reg_tx_free(volatile apb3uart_t *reg){
    return (reg->RX_TX_REG >> 15) & 0x1;
}
inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg){
    return (reg->INT_CTRL_REG >> 0) & 0x1;
}
inline void set_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg, uint8_t value){
    reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg){
    return (reg->INT_CTRL_REG >> 1) & 0x1;
}
inline void set_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg, uint8_t value){
    reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1);
}
inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile apb3uart_t *reg){
    return (reg->INT_CTRL_REG >> 8) & 0x1;
}
inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile apb3uart_t *reg){
    return (reg->INT_CTRL_REG >> 9) & 0x1;
}
inline uint32_t get_uart_clk_divider_reg(volatile apb3uart_t *reg){
    return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff;
}
inline void set_uart_clk_divider_reg(volatile apb3uart_t *reg, uint32_t value){
    reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0);
}
inline uint32_t get_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg){
    return (reg->FRAME_CONFIG_REG >> 0) & 0x7;
}
inline void set_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg, uint8_t value){
    reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0);
}
inline uint32_t get_uart_frame_config_reg_parity(volatile apb3uart_t *reg){
    return (reg->FRAME_CONFIG_REG >> 3) & 0x3;
}
inline void set_uart_frame_config_reg_parity(volatile apb3uart_t *reg, uint8_t value){
    reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3);
}
inline uint32_t get_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg){
    return (reg->FRAME_CONFIG_REG >> 5) & 0x1;
}
inline void set_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg, uint8_t value){
    reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5);
}
inline uint32_t get_uart_status_reg_read_error(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 0) & 0x1;
}
inline uint32_t get_uart_status_reg_stall(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 1) & 0x1;
}
inline uint32_t get_uart_status_reg_break(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 8) & 0x1;
}
inline uint32_t get_uart_status_reg_break_detected(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 9) & 0x1;
}
inline void set_uart_status_reg_break_detected(volatile apb3uart_t *reg, uint8_t value){
    reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9);
}
inline uint32_t get_uart_status_reg_set_break(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 10) & 0x1;
}
inline void set_uart_status_reg_set_break(volatile apb3uart_t *reg, uint8_t value){
    reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10);
}
inline uint32_t get_uart_status_reg_clear_break(volatile apb3uart_t *reg){
    return (reg->STATUS_REG >> 11) & 0x1;
}
inline void set_uart_status_reg_clear_break(volatile apb3uart_t *reg, uint8_t value){
    reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11);
}
#endif /* _BSP_APB3UART_H */