MNRS-BM-BSP/include/ehrenberg/devices/gen/Apb3IrqCtrl.h

/*
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Generated at 2024-03-28 11:47:58 UTC 
* by peakrdl_mnrs version 1.2.4
*/

#ifndef _BSP_APB3IRQCTRL_H
#define _BSP_APB3IRQCTRL_H

#include <stdint.h>

typedef struct __attribute((__packed__)) {
    volatile uint32_t PENDINGSREG;
    volatile uint32_t MASKSREG;
}apb3irqctrl_t;

#define IRQ_PENDINGSREG_OFFS 0
#define IRQ_PENDINGSREG_MASK 0xf
#define IRQ_PENDINGSREG(V) ((V & IRQ_PENDINGSREG_MASK) << IRQ_PENDINGSREG_OFFS)

#define IRQ_MASKSREG_OFFS 0
#define IRQ_MASKSREG_MASK 0xf
#define IRQ_MASKSREG(V) ((V & IRQ_MASKSREG_MASK) << IRQ_MASKSREG_OFFS)

//IRQ_PENDINGSREG
inline uint32_t get_irq_pendingsReg(volatile apb3irqctrl_t* reg){
    return (reg->PENDINGSREG >> 0) & 0xf;
}
inline void set_irq_pendingsReg(volatile apb3irqctrl_t* reg, uint8_t value){
    reg->PENDINGSREG = (reg->PENDINGSREG & ~(0xfU << 0)) | (value << 0);
}

//IRQ_MASKSREG
inline uint32_t get_irq_masksReg(volatile apb3irqctrl_t* reg){
    return (reg->MASKSREG >> 0) & 0xf;
}
inline void set_irq_masksReg(volatile apb3irqctrl_t* reg, uint8_t value){
    reg->MASKSREG = (reg->MASKSREG & ~(0xfU << 0)) | (value << 0);
}

#endif /* _BSP_APB3IRQCTRL_H */