54 lines
1.2 KiB
ArmAsm
54 lines
1.2 KiB
ArmAsm
// See LICENSE for license details
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#ifndef ENTRY_S
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#define ENTRY_S
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#include "encoding.h"
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#include "bits.h"
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msg:
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.string "enter trap_entry of entry_threadx!\n"
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.section .text.entry
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.align 2
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.global trap_entry
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.extern _tx_thread_context_save
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.extern _tx_thread_context_restore
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trap_entry:
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#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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addi sp, sp, -65*REGBYTES // Allocate space for all registers - with floating point enabled
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#else
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addi sp, sp, -32*REGBYTES // Allocate space for all registers - without floating point enabled
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#endif
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STORE x1, 28*REGBYTES(sp) // Store RA, 28*REGBYTES(because call will override ra [ra is a calle register in riscv])
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#la a0, msg # a0 = pointer to string
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#jal ra, puts # call puts(msg)
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call _tx_thread_context_save
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# la a0, msg # a0 = pointer to string
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# jal ra, puts # call puts(msg)
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csrr a0, mcause
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csrr a1, mepc
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mv a2, sp // which sp is needed? sp of interrupted context or the sp of _tx_thread_context_save???
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addi sp, sp, -8
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sd ra, 0(sp)
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call handle_trap
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ld ra, 0(sp)
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addi sp, sp, 8
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call _tx_thread_context_restore
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//.weak handle_trap
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//handle_trap:
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//1:
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// j 1b
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#endif
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