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feature/fpga-alloc-free

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• a96cb14dcf Added doxygen comments and refactored a few functions eyck 2018-10-21 22:48:57 +02:00
• 188bd2b5dd Changed delay calculation for open loop commutation eyck 2018-10-21 22:29:45 +02:00
• 458c75c5e4 some renaming eyck 2018-10-21 00:14:14 +02:00
• 9f9088a110 Changed naming of constants and formatting eyck 2018-10-16 18:51:48 +02:00
• d6db5f7e04 Fixed rxwm setting as it defines the maximum number of received bytes *before* the interrupt eyck 2018-10-05 12:23:39 +02:00
• 2a45030414 Added binary for easy jump start eyck 2018-09-26 09:09:23 +02:00
• 2ebe9541d5 Working version eyck 2018-09-26 08:07:48 +02:00
• a4bfa4e679 cleanup of makefiles eyck 2018-09-25 20:32:56 +02:00
• 038c199c0a cleanup and rename of files eyck 2018-09-25 19:17:28 +02:00
• 3512206d77 Added hello world project eyck 2018-09-25 18:31:29 +02:00
• 215767a724 Sync commit eyck 2018-09-14 14:03:20 +02:00
• 250fa831d0 Initial version of riscv-bldc-forced-communication eyck 2018-08-08 20:59:10 +02:00
• 42b87091a4 Initial commit DVCon2018 2018-06-23 10:17:35 +00:00