2018-09-25 18:31:29 +02:00
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// See LICENSE for license details.
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2018-09-26 08:07:48 +02:00
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#include <sifive/smp.h>
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/* This is defined in sifive/platform.h, but that can't be included from
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* assembly. */
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#define CLINT_CTRL_ADDR 0x02000000
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2018-09-25 18:31:29 +02:00
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.section .init
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.globl _start
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.type _start,@function
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_start:
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2018-09-26 08:07:48 +02:00
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.cfi_startproc
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.cfi_undefined ra
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.option push
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.option norelax
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la gp, __global_pointer$
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.option pop
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2018-09-25 18:31:29 +02:00
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la sp, _sp
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2018-09-26 08:07:48 +02:00
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#if defined(ENABLE_SMP)
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smp_pause(t0, t1)
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#endif
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2018-09-25 18:31:29 +02:00
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/* Load data section */
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la a0, _data_lma
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la a1, _data
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la a2, _edata
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bgeu a1, a2, 2f
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1:
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lw t0, (a0)
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sw t0, (a1)
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addi a0, a0, 4
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addi a1, a1, 4
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bltu a1, a2, 1b
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2:
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/* Clear bss section */
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la a0, __bss_start
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la a1, _end
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bgeu a0, a1, 2f
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1:
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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2:
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/* Call global constructors */
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la a0, __libc_fini_array
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call atexit
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call __libc_init_array
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#ifndef __riscv_float_abi_soft
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/* Enable FPU */
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li t0, MSTATUS_FS
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csrs mstatus, t0
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csrr t1, mstatus
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and t1, t1, t0
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beqz t1, 1f
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fssr x0
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1:
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#endif
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2018-09-26 08:07:48 +02:00
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#if defined(ENABLE_SMP)
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smp_resume(t0, t1)
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csrr a0, mhartid
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bnez a0, 2f
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#endif
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auipc ra, 0
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addi sp, sp, -16
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#if __riscv_xlen == 32
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sw ra, 8(sp)
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#else
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sd ra, 8(sp)
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#endif
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2021-04-09 11:19:05 +02:00
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call _init
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2018-09-25 18:31:29 +02:00
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/* argc = argv = 0 */
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li a0, 0
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li a1, 0
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call main
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tail exit
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2018-09-26 08:07:48 +02:00
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1:
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j 1b
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#if defined(ENABLE_SMP)
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2:
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la t0, trap_entry
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csrw mtvec, t0
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csrr a0, mhartid
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la t1, _sp
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slli t0, a0, 10
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sub sp, t1, t0
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auipc ra, 0
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addi sp, sp, -16
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#if __riscv_xlen == 32
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sw ra, 8(sp)
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#else
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sd ra, 8(sp)
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#endif
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call secondary_main
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tail exit
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1:
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j 1b
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#endif
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.cfi_endproc
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