fix elf loader and pmp check for debug accesses
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e934049dd4
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@ -388,6 +388,7 @@ template <typename BASE> std::pair<uint64_t, bool> riscv_hart_m_p<BASE>::load_fi
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if (sizeof(reg_t) == 4) throw std::runtime_error("wrong elf class in file");
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if (reader.get_type() != ET_EXEC) throw std::runtime_error("wrong elf type in file");
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if (reader.get_machine() != EM_RISCV) throw std::runtime_error("wrong elf machine in file");
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auto entry = reader.get_entry();
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for (const auto pseg : reader.segments) {
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const auto fsize = pseg->get_file_size(); // 0x42c/0x0
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const auto seg_data = pseg->get_data();
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@ -400,14 +401,35 @@ template <typename BASE> std::pair<uint64_t, bool> riscv_hart_m_p<BASE>::load_fi
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<< pseg->get_physical_address();
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}
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}
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for (const auto sec : reader.sections) {
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if (sec->get_name() == ".tohost") {
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for(const auto sec : reader.sections) {
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if(sec->get_name() == ".symtab") {
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if ( SHT_SYMTAB == sec->get_type() ||
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SHT_DYNSYM == sec->get_type() ) {
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ELFIO::symbol_section_accessor symbols( reader, sec );
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auto sym_no = symbols.get_symbols_num();
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std::string name;
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ELFIO::Elf64_Addr value = 0;
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ELFIO::Elf_Xword size = 0;
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unsigned char bind = 0;
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unsigned char type = 0;
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ELFIO::Elf_Half section = 0;
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unsigned char other = 0;
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for ( auto i = 0U; i < sym_no; ++i ) {
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symbols.get_symbol( i, name, value, size, bind, type, section, other );
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if(name=="tohost") {
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tohost = value;
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} else if(name=="fromhost") {
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fromhost = value;
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}
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}
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}
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} else if (sec->get_name() == ".tohost") {
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tohost = sec->get_address();
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fromhost = tohost + 0x40;
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}
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}
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return std::make_pair(reader.get_entry(), true);
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}
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return std::make_pair(entry, true);
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}
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throw std::runtime_error("memory load file is not a valid elf file");
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}
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@ -531,6 +531,7 @@ template <typename BASE> std::pair<uint64_t, bool> riscv_hart_msu_vp<BASE>::load
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if (sizeof(reg_t) == 4) throw std::runtime_error("wrong elf class in file");
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if (reader.get_type() != ET_EXEC) throw std::runtime_error("wrong elf type in file");
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if (reader.get_machine() != EM_RISCV) throw std::runtime_error("wrong elf machine in file");
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auto entry = reader.get_entry();
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for (const auto pseg : reader.segments) {
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const auto fsize = pseg->get_file_size(); // 0x42c/0x0
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const auto seg_data = pseg->get_data();
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@ -543,14 +544,35 @@ template <typename BASE> std::pair<uint64_t, bool> riscv_hart_msu_vp<BASE>::load
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<< pseg->get_physical_address();
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}
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}
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for (const auto sec : reader.sections) {
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if (sec->get_name() == ".tohost") {
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for(const auto sec : reader.sections) {
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if(sec->get_name() == ".symtab") {
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if ( SHT_SYMTAB == sec->get_type() ||
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SHT_DYNSYM == sec->get_type() ) {
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ELFIO::symbol_section_accessor symbols( reader, sec );
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auto sym_no = symbols.get_symbols_num();
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std::string name;
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ELFIO::Elf64_Addr value = 0;
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ELFIO::Elf_Xword size = 0;
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unsigned char bind = 0;
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unsigned char type = 0;
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ELFIO::Elf_Half section = 0;
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unsigned char other = 0;
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for ( auto i = 0U; i < sym_no; ++i ) {
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symbols.get_symbol( i, name, value, size, bind, type, section, other );
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if(name=="tohost") {
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tohost = value;
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} else if(name=="fromhost") {
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fromhost = value;
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}
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}
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}
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} else if (sec->get_name() == ".tohost") {
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tohost = sec->get_address();
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fromhost = tohost + 0x40;
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}
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}
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return std::make_pair(reader.get_entry(), true);
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}
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return std::make_pair(entry, true);
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}
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throw std::runtime_error("memory load file is not a valid elf file");
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}
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@ -1296,9 +1318,6 @@ template <typename BASE> uint64_t riscv_hart_msu_vp<BASE>::enter_trap(uint64_t f
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// bits in mtvec
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this->reg.NEXT_PC = ivec & ~0x3UL;
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if ((ivec & 0x1) == 1 && trap_id != 0) this->reg.NEXT_PC += 4 * cause;
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// reset trap state
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this->reg.PRIV = new_priv;
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this->reg.trap_state = 0;
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std::array<char, 32> buffer;
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sprintf(buffer.data(), "0x%016lx", addr);
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if((flags&0xffffffff) != 0xffffffff)
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@ -1306,6 +1325,9 @@ template <typename BASE> uint64_t riscv_hart_msu_vp<BASE>::enter_trap(uint64_t f
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<< (trap_id ? irq_str[cause] : trap_str[cause]) << "' (" << cause << ")"
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<< " at address " << buffer.data() << " occurred, changing privilege level from "
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<< lvl[cur_priv] << " to " << lvl[new_priv];
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// reset trap state
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this->reg.PRIV = new_priv;
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this->reg.trap_state = 0;
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update_vm_info();
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return this->reg.NEXT_PC;
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}
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@ -484,6 +484,7 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
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if (sizeof(reg_t) == 4) throw std::runtime_error("wrong elf class in file");
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if (reader.get_type() != ET_EXEC) throw std::runtime_error("wrong elf type in file");
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if (reader.get_machine() != EM_RISCV) throw std::runtime_error("wrong elf machine in file");
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auto entry = reader.get_entry();
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for (const auto pseg : reader.segments) {
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const auto fsize = pseg->get_file_size(); // 0x42c/0x0
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const auto seg_data = pseg->get_data();
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@ -496,14 +497,35 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
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<< pseg->get_physical_address();
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}
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}
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for (const auto sec : reader.sections) {
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if (sec->get_name() == ".tohost") {
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for(const auto sec : reader.sections) {
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if(sec->get_name() == ".symtab") {
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if ( SHT_SYMTAB == sec->get_type() ||
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SHT_DYNSYM == sec->get_type() ) {
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ELFIO::symbol_section_accessor symbols( reader, sec );
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auto sym_no = symbols.get_symbols_num();
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std::string name;
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ELFIO::Elf64_Addr value = 0;
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ELFIO::Elf_Xword size = 0;
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unsigned char bind = 0;
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unsigned char type = 0;
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ELFIO::Elf_Half section = 0;
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unsigned char other = 0;
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for ( auto i = 0U; i < sym_no; ++i ) {
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symbols.get_symbol( i, name, value, size, bind, type, section, other );
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if(name=="tohost") {
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tohost = value;
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} else if(name=="fromhost") {
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fromhost = value;
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}
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}
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}
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} else if (sec->get_name() == ".tohost") {
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tohost = sec->get_address();
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fromhost = tohost + 0x40;
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}
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}
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return std::make_pair(reader.get_entry(), true);
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}
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return std::make_pair(entry, true);
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}
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throw std::runtime_error("memory load file is not a valid elf file");
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}
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@ -525,8 +547,9 @@ template <typename BASE, features_e FEAT> bool riscv_hart_mu_p<BASE, FEAT>::pmp_
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reg_t tor = csr[pmpaddr0+i] << PMP_SHIFT;
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uint8_t cfg = csr[pmpcfg0+(i/4)]>>(i%4);
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if (cfg & PMP_A) {
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bool is_tor = (cfg & PMP_A) == PMP_TOR;
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bool is_na4 = (cfg & PMP_A) == PMP_NA4;
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auto pmp_a = (cfg & PMP_A) >> 3;
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bool is_tor = pmp_a == PMP_TOR;
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bool is_na4 = pmp_a == PMP_NA4;
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reg_t mask = (csr[pmpaddr0+i] << 1) | (!is_na4);
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mask = ~(mask & ~(mask + 1)) << PMP_SHIFT;
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@ -574,7 +597,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::read(const address_type type, const acc
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switch (space) {
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case traits<BASE>::MEM: {
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if(FEAT & FEAT_PMP){
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if(!pmp_check(access, addr, length)) {
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if(!pmp_check(access, addr, length) && (access&access_type::DEBUG) != access_type::DEBUG) {
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fault_data = addr;
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if (access && iss::access_type::DEBUG) throw trap_access(0, addr);
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this->reg.trap_state = (1 << 31) | (1 << 16); // issue trap 1
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@ -669,7 +692,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::write(const address_type type, const ac
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switch (space) {
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case traits<BASE>::MEM: {
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if(FEAT & FEAT_PMP){
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if(!pmp_check(access, addr, length)) {
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if(!pmp_check(access, addr, length) && (access&access_type::DEBUG) != access_type::DEBUG) {
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fault_data = addr;
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if (access && iss::access_type::DEBUG) throw trap_access(0, addr);
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this->reg.trap_state = (1 << 31) | (1 << 16); // issue trap 1
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@ -683,7 +706,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::write(const address_type type, const ac
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return iss::Err;
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}
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try {
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if(length>1 && (addr&(length-1))){
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if(length>1 && (addr&(length-1)) && (access&access_type::DEBUG) != access_type::DEBUG){
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this->reg.trap_state = 1<<31 | 6<<16;
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fault_data=addr;
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return iss::Err;
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@ -1217,9 +1240,6 @@ template <typename BASE, features_e FEAT> uint64_t riscv_hart_mu_p<BASE, FEAT>::
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// bits in mtvec
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this->reg.NEXT_PC = ivec & ~0x3UL;
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if ((ivec & 0x1) == 1 && trap_id != 0) this->reg.NEXT_PC += 4 * cause;
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// reset trap state
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this->reg.PRIV = new_priv;
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this->reg.trap_state = 0;
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std::array<char, 32> buffer;
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sprintf(buffer.data(), "0x%016lx", addr);
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if((flags&0xffffffff) != 0xffffffff)
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@ -1227,6 +1247,9 @@ template <typename BASE, features_e FEAT> uint64_t riscv_hart_mu_p<BASE, FEAT>::
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<< (trap_id ? irq_str[cause] : trap_str[cause]) << "' (" << cause << ")"
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<< " at address " << buffer.data() << " occurred, changing privilege level from "
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<< lvl[this->reg.PRIV] << " to " << lvl[new_priv];
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// reset trap state
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this->reg.PRIV = new_priv;
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this->reg.trap_state = 0;
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return this->reg.NEXT_PC;
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}
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10
src/main.cpp
10
src/main.cpp
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@ -47,7 +47,7 @@ using tgc_b_plat_type = iss::arch::riscv_hart_m_p<iss::arch::tgc_b>;
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#ifdef CORE_TGC_D
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#include "iss/arch/riscv_hart_mu_p.h"
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#include "iss/arch/tgc_d.h"
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using tgc_d_plat_type = iss::arch::riscv_hart_mu_p<iss::arch::tgc_d, iss::arch::FEAT_PMP>;
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using tgc_d_plat_type = iss::arch::riscv_hart_mu_p<iss::arch::tgc_d, (iss::arch::features_e)(iss::arch::FEAT_PMP | iss::arch::FEAT_CLIC | iss::arch::FEAT_EXT_N)>;
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#endif
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#ifdef WITH_LLVM
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#include <iss/llvm/jit_helper.h>
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@ -78,7 +78,7 @@ int main(int argc, char *argv[]) {
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("mem,m", po::value<std::string>(), "the memory input file")
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("plugin,p", po::value<std::vector<std::string>>(), "plugin to activate")
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("backend", po::value<std::string>()->default_value("interp"), "the memory input file")
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("isa", po::value<std::string>()->default_value("tgf_c"), "isa to use for simulation");
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("isa", po::value<std::string>()->default_value("tgc_c"), "isa to use for simulation");
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// clang-format on
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auto parsed = po::command_line_parser(argc, argv).options(desc).allow_unregistered().run();
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try {
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@ -123,18 +123,18 @@ int main(int argc, char *argv[]) {
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iss::vm_ptr vm{nullptr};
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iss::cpu_ptr cpu{nullptr};
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std::string isa_opt(clim["isa"].as<std::string>());
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if (isa_opt == "tgf_c") {
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if (isa_opt == "tgc_c") {
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std::tie(cpu, vm) =
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iss::create_cpu<tgc_c_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
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} else
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#ifdef CORE_TGC_B
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if (isa_opt == "tgf_b") {
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if (isa_opt == "tgc_b") {
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std::tie(cpu, vm) =
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iss::create_cpu<tgc_b_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
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} else
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#endif
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#ifdef CORE_TGC_D
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if (isa_opt == "tgf_d") {
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if (isa_opt == "tgc_d") {
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std::tie(cpu, vm) =
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iss::create_cpu<tgc_d_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
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} else
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