50 lines
1.6 KiB
Plaintext
50 lines
1.6 KiB
Plaintext
InsructionSet RISCVBase {
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constants {
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XLEN,
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fence:=0,
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fencei:=1,
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fencevmal:=2,
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fencevmau:=3
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}
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address_spaces {
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MEM[8], CSR[XLEN], FENCE[XLEN], RES[8]
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}
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registers {
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[31:0] X[XLEN],
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PC[XLEN](is_pc),
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alias ZERO[XLEN] is X[0],
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alias RA[XLEN] is X[1],
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alias SP[XLEN] is X[2],
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alias GP[XLEN] is X[3],
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alias TP[XLEN] is X[4],
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alias T0[XLEN] is X[5],
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alias T1[XLEN] is X[6],
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alias T2[XLEN] is X[7],
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alias S0[XLEN] is X[8],
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alias S1[XLEN] is X[9],
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alias A0[XLEN] is X[10],
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alias A1[XLEN] is X[11],
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alias A2[XLEN] is X[12],
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alias A3[XLEN] is X[13],
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alias A4[XLEN] is X[14],
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alias A5[XLEN] is X[15],
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alias A6[XLEN] is X[16],
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alias A7[XLEN] is X[17],
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alias S2[XLEN] is X[18],
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alias S3[XLEN] is X[19],
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alias S4[XLEN] is X[20],
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alias S5[XLEN] is X[21],
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alias S6[XLEN] is X[22],
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alias S7[XLEN] is X[23],
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alias S8[XLEN] is X[24],
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alias S9[XLEN] is X[25],
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alias S10[XLEN] is X[26],
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alias S11[XLEN] is X[27],
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alias T3[XLEN] is X[28],
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alias T4[XLEN] is X[29],
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alias T5[XLEN] is X[30],
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alias T6[XLEN] is X[31]
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}
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} |