38 lines
846 B
Plaintext
38 lines
846 B
Plaintext
import "RV32IBase.core_desc"
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import "RV32M.core_desc"
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import "RV32A.core_desc"
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import "RV32C.core_desc"
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//import "RV64IBase.core_desc"
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//import "RV64M.core_desc"
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//import "RV64A.core_desc"
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Core MinRV_IMA provides RV32IBase,RV32M,RV32A, RV32CI {
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template:"vm_riscv.in.cpp";
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constants {
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XLEN:=32;
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XLEN2:=64;
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XLEN_BIT_MASK:=0x1f;
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PCLEN:=32;
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fence:=0;
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fencei:=1;
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fencevmal:=2;
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fencevmau:=3;
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// XL ZYXWVUTSRQPONMLKJIHGFEDCBA
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MISA_VAL:=0b01000000000101000001000100000001;
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PGSIZE := 4096; //1 << 12;
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PGMASK := 4095; //PGSIZE-1
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}
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}
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/*
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Core RV64IMA provides RV64IBase, RV64M, RV64A {
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template:"vm_riscv.in.cpp";
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constants {
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XLEN:=64;
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XLEN_BIT_MASK:=0x3f;
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PCLEN:=64;
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fence:=0;
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fencei:=1;
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}
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}
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*/ |