104 lines
4.2 KiB
C++
104 lines
4.2 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2017, MINRES Technologies GmbH
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its contributors
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// may be used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// Contributors:
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// eyck@minres.com - initial API and implementation
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////////////////////////////////////////////////////////////////////////////////
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#include <cli_options.h>
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#include <iss/iss.h>
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#include <iostream>
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#include <iss/arch/minrv_ima.h>
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#ifndef WITHOUT_LLVM
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#include <iss/jit/MCJIThelper.h>
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#endif
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#ifdef WITH_SYSTEMC
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#include <sysc/kernel/sc_externs.h>
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#endif
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#include <boost/lexical_cast.hpp>
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namespace po= boost::program_options;
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INITIALIZE_EASYLOGGINGPP
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int main(int argc, char *argv[]) {
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try{
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/** Define and parse the program options
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*/
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po::variables_map vm;
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if(parse_cli_options(vm, argc, argv)) return ERROR_IN_COMMAND_LINE;
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configure_default_logger(vm);
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// configure the connection logger
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configure_debugger_logger();
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// application code comes here //
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iss::init_jit(argc, argv);
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if(vm.count("systemc")){
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//#ifdef WITH_SYSTEMC
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// return sc_core::sc_elab_and_sim(argc, argv);
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//#else
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std::cerr<<"SystemC simulation is currently not supported, please rebuild with -DWITH_SYSTEMC"<<std::endl;
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//#endif
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} else {
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bool dump=vm.count("dump-ir");
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// instantiate the simulator
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std::unique_ptr<iss::vm_if> cpu = vm.count("gdb-port")?
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iss::create<iss::arch::minrv_ima>("rv32ima", vm["gdb-port"].as<unsigned>(), dump):
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iss::create<iss::arch::minrv_ima>("rv32ima", dump);
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if(vm.count("elf")){
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for(std::string input: vm["elf"].as<std::vector<std::string> >())
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cpu->get_arch()->load_file(input);
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} else if(vm.count("mem")){
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cpu->get_arch()->load_file(vm["mem"].as<std::string>() , iss::arch::traits<iss::arch::minrv_ima>::MEM);
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} //else
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// LOG(FATAL)<<"At least one (flash-)input file (ELF or IHEX) needs to be specified";
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configure_disass_logger(vm);
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if(vm.count("disass")){
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cpu->setDisassEnabled(true);
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}
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if(vm.count("reset")){
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auto str = vm["reset"].as<std::string>();
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auto start_address = str.find("0x")==0? std::stoull(str, 0, 16):std::stoull(str, 0, 10);
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cpu->reset(start_address);
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} else {
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cpu->reset();
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}
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return cpu->start(vm["cycles"].as<int64_t>());
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}
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} catch(std::exception& e){
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LOG(ERROR) << "Unhandled Exception reached the top of main: "
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<< e.what() << ", application will now exit" << std::endl;
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return ERROR_UNHANDLED_EXCEPTION;
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}
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}
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