114 lines
3.7 KiB
C++
114 lines
3.7 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2017, MINRES Technologies GmbH
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its contributors
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// may be used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// Contributors:
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// eyck@minres.com - initial implementation
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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#include "sysc/SiFive/uart.h"
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#include "sysc/sc_comm_singleton.h"
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#include "scc/report.h"
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#include "scc/utilities.h"
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#include "sysc/SiFive/gen/uart_regs.h"
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using namespace std;
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namespace sysc {
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namespace {
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using namespace seasocks;
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}
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uart::uart(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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, tlm_target<>(clk)
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, NAMED(clk_i)
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, NAMED(rst_i)
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, NAMEDD(uart_regs, regs)
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, NAMED(write_to_ws, false) {
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regs->registerResources(*this);
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SC_METHOD(clock_cb);
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sensitive << clk_i;
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SC_METHOD(reset_cb);
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sensitive << rst_i;
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dont_initialize();
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regs->txdata.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data) -> bool {
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if (!this->regs->in_reset()) {
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reg.put(data);
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this->transmit_data();
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}
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return true;
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});
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}
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uart::~uart() {}
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void uart::before_end_of_elaboration() {
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if(write_to_ws.get_value()) {
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LOG(TRACE)<<"Adding WS handler for "<<(std::string{"/ws/"}+name());
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handler=std::make_shared<WsHandler>();
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sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"}+name()).c_str(), handler);
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}
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}
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void uart::clock_cb() {
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this->clk = clk_i.read();
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}
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void uart::reset_cb() {
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if (rst_i.read())
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regs->reset_start();
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else
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regs->reset_stop();
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}
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void uart::transmit_data() {
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if(regs->r_txdata.data != '\r') queue.push_back(regs->r_txdata.data);
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if (queue.size() >> 0 && (regs->r_txdata.data == '\n' || regs->r_txdata.data == 0)) {
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std::string msg(queue.begin(), queue.end()-1);
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LOG(INFO) << this->name() << " transmit: '" << msg << "'";
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sc_core::sc_time now = sc_core::sc_time_stamp();
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if(handler)
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sc_comm_singleton::inst().execute([this, msg, now](){
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std::stringstream os;
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os << "{\"time\":\"" << now << "\",\"message\":\""<<msg<<"\"}";
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this->handler->send(os.str());
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});
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queue.clear();
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}
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}
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} /* namespace sysc */
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