Compare commits
	
		
			5 Commits
		
	
	
		
			feature/ev
			...
			53de21eef9
		
	
	| Author | SHA1 | Date | |
|---|---|---|---|
| 53de21eef9 | |||
| d443c89c87 | |||
| 9a2df32d57 | |||
| be0f783af8 | |||
| 1089800682 | 
| @@ -109,15 +109,6 @@ if(TARGET yaml-cpp::yaml-cpp) | |||||||
|     target_link_libraries(${PROJECT_NAME} PUBLIC yaml-cpp::yaml-cpp) |     target_link_libraries(${PROJECT_NAME} PUBLIC yaml-cpp::yaml-cpp) | ||||||
| endif() | endif() | ||||||
|  |  | ||||||
| # if(WITH_LLVM) |  | ||||||
| #     target_compile_definitions(${PROJECT_NAME} PUBLIC ${LLVM_DEFINITIONS}) |  | ||||||
| #     target_include_directories(${PROJECT_NAME} PUBLIC ${LLVM_INCLUDE_DIRS}) |  | ||||||
|  |  | ||||||
| #     if(BUILD_SHARED_LIBS) |  | ||||||
| #         target_link_libraries(${PROJECT_NAME} PUBLIC ${LLVM_LIBRARIES}) |  | ||||||
| #     endif() |  | ||||||
| # endif() |  | ||||||
|  |  | ||||||
| set_target_properties(${PROJECT_NAME} PROPERTIES | set_target_properties(${PROJECT_NAME} PROPERTIES | ||||||
|     VERSION ${PROJECT_VERSION} |     VERSION ${PROJECT_VERSION} | ||||||
|     FRAMEWORK FALSE |     FRAMEWORK FALSE | ||||||
|   | |||||||
| @@ -96,7 +96,7 @@ protected: | |||||||
|     using this_class = vm_impl<ARCH>; |     using this_class = vm_impl<ARCH>; | ||||||
|     using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); |     using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); | ||||||
|  |  | ||||||
|     continuation_e gen_single_inst_behavior(virt_addr_t&, unsigned int &, jit_holder&) override; |     continuation_e gen_single_inst_behavior(virt_addr_t&, jit_holder&) override; | ||||||
|     enum globals_e {TVAL = 0, GLOBALS_SIZE}; |     enum globals_e {TVAL = 0, GLOBALS_SIZE}; | ||||||
|     void gen_block_prologue(jit_holder& jh) override; |     void gen_block_prologue(jit_holder& jh) override; | ||||||
|     void gen_block_epilogue(jit_holder& jh) override; |     void gen_block_epilogue(jit_holder& jh) override; | ||||||
| @@ -221,7 +221,7 @@ vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) | |||||||
|     }()) {} |     }()) {} | ||||||
|  |  | ||||||
| template <typename ARCH> | template <typename ARCH> | ||||||
| continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { | continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, jit_holder& jh) { | ||||||
|     enum {TRAP_ID=1<<16}; |     enum {TRAP_ID=1<<16}; | ||||||
|     code_word_t instr = 0; |     code_word_t instr = 0; | ||||||
|     phys_addr_t paddr(pc); |     phys_addr_t paddr(pc); | ||||||
| @@ -233,7 +233,6 @@ continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned | |||||||
|         return ILLEGAL_FETCH; |         return ILLEGAL_FETCH; | ||||||
|     if (instr == 0x0000006f || (instr&0xffff)==0xa001) |     if (instr == 0x0000006f || (instr&0xffff)==0xa001) | ||||||
|         return JUMP_TO_SELF; |         return JUMP_TO_SELF; | ||||||
|     ++inst_cnt; |  | ||||||
|     uint32_t inst_index = instr_decoder.decode_instr(instr); |     uint32_t inst_index = instr_decoder.decode_instr(instr); | ||||||
|     compile_func f = nullptr; |     compile_func f = nullptr; | ||||||
|     if(inst_index < instr_descr.size()) |     if(inst_index < instr_descr.size()) | ||||||
|   | |||||||
| @@ -199,9 +199,6 @@ template <typename CODE_WORD> void debug_fn(CODE_WORD insn) { | |||||||
|     volatile CODE_WORD x = insn; |     volatile CODE_WORD x = insn; | ||||||
|     insn = 2 * x; |     insn = 2 * x; | ||||||
| } | } | ||||||
|  |  | ||||||
| template <typename ARCH> vm_impl<ARCH>::vm_impl() { this(new ARCH()); } |  | ||||||
|  |  | ||||||
| // according to | // according to | ||||||
| // https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation | // https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation | ||||||
| #ifdef __GCC__ | #ifdef __GCC__ | ||||||
|   | |||||||
| @@ -101,7 +101,7 @@ protected: | |||||||
|         return super::gen_cond_assign(cond, this->gen_ext(trueVal, size), this->gen_ext(falseVal, size)); |         return super::gen_cond_assign(cond, this->gen_ext(trueVal, size), this->gen_ext(falseVal, size)); | ||||||
|     } |     } | ||||||
|  |  | ||||||
|     std::tuple<continuation_e, BasicBlock *> gen_single_inst_behavior(virt_addr_t &, unsigned int &, BasicBlock *) override; |     std::tuple<continuation_e, BasicBlock *> gen_single_inst_behavior(virt_addr_t &, BasicBlock *) override; | ||||||
|  |  | ||||||
|     void gen_leave_behavior(BasicBlock *leave_blk) override; |     void gen_leave_behavior(BasicBlock *leave_blk) override; | ||||||
|     void gen_raise_trap(uint16_t trap_id, uint16_t cause); |     void gen_raise_trap(uint16_t trap_id, uint16_t cause); | ||||||
| @@ -244,7 +244,7 @@ vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) | |||||||
|  |  | ||||||
| template <typename ARCH> | template <typename ARCH> | ||||||
| std::tuple<continuation_e, BasicBlock *> | std::tuple<continuation_e, BasicBlock *> | ||||||
| vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, BasicBlock *this_block) { | vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, BasicBlock *this_block) { | ||||||
|     // we fetch at max 4 byte, alignment is 2 |     // we fetch at max 4 byte, alignment is 2 | ||||||
|     enum {TRAP_ID=1<<16}; |     enum {TRAP_ID=1<<16}; | ||||||
|     code_word_t instr = 0; |     code_word_t instr = 0; | ||||||
| @@ -256,9 +256,10 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, | |||||||
|     auto res = this->core.read(paddr, 4, data); |     auto res = this->core.read(paddr, 4, data); | ||||||
|     if (res != iss::Ok)  |     if (res != iss::Ok)  | ||||||
|         return std::make_tuple(ILLEGAL_FETCH, nullptr); |         return std::make_tuple(ILLEGAL_FETCH, nullptr); | ||||||
|     if (instr == 0x0000006f || (instr&0xffff)==0xa001) |     if (instr == 0x0000006f || (instr&0xffff)==0xa001){ | ||||||
|  |         this->builder.CreateBr(this->leave_blk); | ||||||
|         return std::make_tuple(JUMP_TO_SELF, nullptr); |         return std::make_tuple(JUMP_TO_SELF, nullptr); | ||||||
|     ++inst_cnt; |         } | ||||||
|     uint32_t inst_index = instr_decoder.decode_instr(instr); |     uint32_t inst_index = instr_decoder.decode_instr(instr); | ||||||
|     compile_func f = nullptr; |     compile_func f = nullptr; | ||||||
|     if(inst_index < instr_descr.size()) |     if(inst_index < instr_descr.size()) | ||||||
| @@ -340,6 +341,10 @@ void vm_impl<ARCH>::gen_instr_epilogue(BasicBlock *bb) { | |||||||
|     auto* icount_val = this->builder.CreateAdd( |     auto* icount_val = this->builder.CreateAdd( | ||||||
|         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::ICOUNT), get_reg_ptr(arch::traits<ARCH>::ICOUNT)), this->gen_const(64U, 1)); |         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::ICOUNT), get_reg_ptr(arch::traits<ARCH>::ICOUNT)), this->gen_const(64U, 1)); | ||||||
|     this->builder.CreateStore(icount_val, get_reg_ptr(arch::traits<ARCH>::ICOUNT), false); |     this->builder.CreateStore(icount_val, get_reg_ptr(arch::traits<ARCH>::ICOUNT), false); | ||||||
|  |     //increment cyclecount | ||||||
|  |     auto* cycle_val = this->builder.CreateAdd( | ||||||
|  |         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::CYCLE), get_reg_ptr(arch::traits<ARCH>::CYCLE)), this->gen_const(64U, 1)); | ||||||
|  |     this->builder.CreateStore(cycle_val, get_reg_ptr(arch::traits<ARCH>::CYCLE), false); | ||||||
| } | } | ||||||
|  |  | ||||||
| } // namespace ${coreDef.name.toLowerCase()} | } // namespace ${coreDef.name.toLowerCase()} | ||||||
|   | |||||||
| @@ -176,6 +176,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ ${instr.length/8}; |         pc=pc+ ${instr.length/8}; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         <%instr.behavior.eachLine{%>${it} |         <%instr.behavior.eachLine{%>${it} | ||||||
| @@ -272,13 +273,12 @@ template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) { | |||||||
|     tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32)); |     tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32)); | ||||||
|     tu("return *next_pc;"); |     tu("return *next_pc;"); | ||||||
| } | } | ||||||
| <% |  | ||||||
|  |  | ||||||
| template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){ | template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){ | ||||||
|     std::ostringstream os; |     std::ostringstream os; | ||||||
|     os << add_reg_ptr("trap_state", arch::traits<ARCH>::TRAP_STATE); |     os << tu.add_reg_ptr("trap_state", arch::traits<ARCH>::TRAP_STATE, this->regs_base_ptr); | ||||||
|     os << add_reg_ptr("pending_trap", arch::traits<ARCH>::PENDING_TRAP); |     os << tu.add_reg_ptr("pending_trap", arch::traits<ARCH>::PENDING_TRAP, this->regs_base_ptr); | ||||||
| if(fcsr != null) {%> |     os << tu.add_reg_ptr("cycle", arch::traits<ARCH>::CYCLE, this->regs_base_ptr); | ||||||
|  | <%if(fcsr != null) {%> | ||||||
|     os << "uint32_t (*fget_flags)()=" << (uintptr_t)&fget_flags << ";\\n"; |     os << "uint32_t (*fget_flags)()=" << (uintptr_t)&fget_flags << ";\\n"; | ||||||
|     os << "uint32_t (*fadd_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fadd_s << ";\\n"; |     os << "uint32_t (*fadd_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fadd_s << ";\\n"; | ||||||
|     os << "uint32_t (*fsub_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fsub_s << ";\\n"; |     os << "uint32_t (*fsub_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fsub_s << ";\\n"; | ||||||
| @@ -309,7 +309,6 @@ if(fcsr != null) {%> | |||||||
|     tu.add_prologue(os.str()); |     tu.add_prologue(os.str()); | ||||||
| } | } | ||||||
|  |  | ||||||
|  |  | ||||||
| } // namespace ${coreDef.name.toLowerCase()} | } // namespace ${coreDef.name.toLowerCase()} | ||||||
|  |  | ||||||
| template <> | template <> | ||||||
|   | |||||||
										
											
												File diff suppressed because one or more lines are too long
											
										
									
								
							| @@ -94,7 +94,7 @@ protected: | |||||||
|     using this_class = vm_impl<ARCH>; |     using this_class = vm_impl<ARCH>; | ||||||
|     using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); |     using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); | ||||||
|  |  | ||||||
|     continuation_e gen_single_inst_behavior(virt_addr_t&, unsigned int &, jit_holder&) override; |     continuation_e gen_single_inst_behavior(virt_addr_t&, jit_holder&) override; | ||||||
|     enum globals_e {TVAL = 0, GLOBALS_SIZE}; |     enum globals_e {TVAL = 0, GLOBALS_SIZE}; | ||||||
|     void gen_block_prologue(jit_holder& jh) override; |     void gen_block_prologue(jit_holder& jh) override; | ||||||
|     void gen_block_epilogue(jit_holder& jh) override; |     void gen_block_epilogue(jit_holder& jh) override; | ||||||
| @@ -4780,7 +4780,7 @@ vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) | |||||||
|     }()) {} |     }()) {} | ||||||
|  |  | ||||||
| template <typename ARCH> | template <typename ARCH> | ||||||
| continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { | continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, jit_holder& jh) { | ||||||
|     enum {TRAP_ID=1<<16}; |     enum {TRAP_ID=1<<16}; | ||||||
|     code_word_t instr = 0; |     code_word_t instr = 0; | ||||||
|     phys_addr_t paddr(pc); |     phys_addr_t paddr(pc); | ||||||
| @@ -4792,7 +4792,6 @@ continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned | |||||||
|         return ILLEGAL_FETCH; |         return ILLEGAL_FETCH; | ||||||
|     if (instr == 0x0000006f || (instr&0xffff)==0xa001) |     if (instr == 0x0000006f || (instr&0xffff)==0xa001) | ||||||
|         return JUMP_TO_SELF; |         return JUMP_TO_SELF; | ||||||
|     ++inst_cnt; |  | ||||||
|     uint32_t inst_index = instr_decoder.decode_instr(instr); |     uint32_t inst_index = instr_decoder.decode_instr(instr); | ||||||
|     compile_func f = nullptr; |     compile_func f = nullptr; | ||||||
|     if(inst_index < instr_descr.size()) |     if(inst_index < instr_descr.size()) | ||||||
|   | |||||||
| @@ -706,9 +706,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); |                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); | ||||||
|                                         int8_t res_27 = super::template read_mem<int8_t>(traits::MEM, load_address); |                                         int8_t res_1 = super::template read_mem<int8_t>(traits::MEM, load_address); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         int8_t res = (int8_t)res_27; |                                         int8_t res = (int8_t)res_1; | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             *(X+rd) = (uint32_t)res; |                                             *(X+rd) = (uint32_t)res; | ||||||
|                                         } |                                         } | ||||||
| @@ -737,9 +737,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); |                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); | ||||||
|                                         int16_t res_28 = super::template read_mem<int16_t>(traits::MEM, load_address); |                                         int16_t res_2 = super::template read_mem<int16_t>(traits::MEM, load_address); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         int16_t res = (int16_t)res_28; |                                         int16_t res = (int16_t)res_2; | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             *(X+rd) = (uint32_t)res; |                                             *(X+rd) = (uint32_t)res; | ||||||
|                                         } |                                         } | ||||||
| @@ -768,9 +768,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); |                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); | ||||||
|                                         int32_t res_29 = super::template read_mem<int32_t>(traits::MEM, load_address); |                                         int32_t res_3 = super::template read_mem<int32_t>(traits::MEM, load_address); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         int32_t res = (int32_t)res_29; |                                         int32_t res = (int32_t)res_3; | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             *(X+rd) = (uint32_t)res; |                                             *(X+rd) = (uint32_t)res; | ||||||
|                                         } |                                         } | ||||||
| @@ -799,9 +799,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); |                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); | ||||||
|                                         uint8_t res_30 = super::template read_mem<uint8_t>(traits::MEM, load_address); |                                         uint8_t res_4 = super::template read_mem<uint8_t>(traits::MEM, load_address); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint8_t res = res_30; |                                         uint8_t res = res_4; | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             *(X+rd) = (uint32_t)res; |                                             *(X+rd) = (uint32_t)res; | ||||||
|                                         } |                                         } | ||||||
| @@ -830,9 +830,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); |                                         uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); | ||||||
|                                         uint16_t res_31 = super::template read_mem<uint16_t>(traits::MEM, load_address); |                                         uint16_t res_5 = super::template read_mem<uint16_t>(traits::MEM, load_address); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint16_t res = res_31; |                                         uint16_t res = res_5; | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             *(X+rd) = (uint32_t)res; |                                             *(X+rd) = (uint32_t)res; | ||||||
|                                         } |                                         } | ||||||
| @@ -1538,9 +1538,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t xrs1 = *(X+rs1); |                                         uint32_t xrs1 = *(X+rs1); | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
|                                             uint32_t res_32 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                             uint32_t res_6 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                             uint32_t xrd = res_32; |                                             uint32_t xrd = res_6; | ||||||
|                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrs1); |                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrs1); | ||||||
|                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                             *(X+rd) = xrd; |                                             *(X+rd) = xrd; | ||||||
| @@ -1573,9 +1573,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); |                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); | ||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t res_33 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                         uint32_t res_7 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint32_t xrd = res_33; |                                         uint32_t xrd = res_7; | ||||||
|                                         uint32_t xrs1 = *(X+rs1); |                                         uint32_t xrs1 = *(X+rs1); | ||||||
|                                         if(rs1 != 0) { |                                         if(rs1 != 0) { | ||||||
|                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd | xrs1); |                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd | xrs1); | ||||||
| @@ -1608,9 +1608,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); |                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); | ||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t res_34 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                         uint32_t res_8 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint32_t xrd = res_34; |                                         uint32_t xrd = res_8; | ||||||
|                                         uint32_t xrs1 = *(X+rs1); |                                         uint32_t xrs1 = *(X+rs1); | ||||||
|                                         if(rs1 != 0) { |                                         if(rs1 != 0) { | ||||||
|                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ xrs1); |                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ xrs1); | ||||||
| @@ -1643,9 +1643,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); |                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); | ||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t res_35 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                         uint32_t res_9 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint32_t xrd = res_35; |                                         uint32_t xrd = res_9; | ||||||
|                                         super::template write_mem<uint32_t>(traits::CSR, csr, (uint32_t)zimm); |                                         super::template write_mem<uint32_t>(traits::CSR, csr, (uint32_t)zimm); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         if(rd != 0) { |                                         if(rd != 0) { | ||||||
| @@ -1675,9 +1675,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); |                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); | ||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t res_36 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                         uint32_t res_10 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint32_t xrd = res_36; |                                         uint32_t xrd = res_10; | ||||||
|                                         if(zimm != 0) { |                                         if(zimm != 0) { | ||||||
|                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd | (uint32_t)zimm); |                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd | (uint32_t)zimm); | ||||||
|                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
| @@ -1709,9 +1709,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); |                                         raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION); | ||||||
|                                     } |                                     } | ||||||
|                                     else { |                                     else { | ||||||
|                                         uint32_t res_37 = super::template read_mem<uint32_t>(traits::CSR, csr); |                                         uint32_t res_11 = super::template read_mem<uint32_t>(traits::CSR, csr); | ||||||
|                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                                         uint32_t xrd = res_37; |                                         uint32_t xrd = res_11; | ||||||
|                                         if(zimm != 0) { |                                         if(zimm != 0) { | ||||||
|                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); |                                             super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); | ||||||
|                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
| @@ -2046,9 +2046,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                     // execute instruction |                     // execute instruction | ||||||
|                     { |                     { | ||||||
|                         uint32_t offs = (uint32_t)((uint64_t)(*(X+rs1 + 8) ) + (uint64_t)(uimm )); |                         uint32_t offs = (uint32_t)((uint64_t)(*(X+rs1 + 8) ) + (uint64_t)(uimm )); | ||||||
|                         int32_t res_38 = super::template read_mem<int32_t>(traits::MEM, offs); |                         int32_t res_12 = super::template read_mem<int32_t>(traits::MEM, offs); | ||||||
|                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                         if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                         *(X+rd + 8) = (uint32_t)(int32_t)res_38; |                         *(X+rd + 8) = (uint32_t)(int32_t)res_12; | ||||||
|                     } |                     } | ||||||
|                     break; |                     break; | ||||||
|                 }// @suppress("No break at end of case") |                 }// @suppress("No break at end of case") | ||||||
| @@ -2472,9 +2472,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co | |||||||
|                         } |                         } | ||||||
|                         else { |                         else { | ||||||
|                             uint32_t offs = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(uimm )); |                             uint32_t offs = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(uimm )); | ||||||
|                             int32_t res_39 = super::template read_mem<int32_t>(traits::MEM, offs); |                             int32_t res_13 = super::template read_mem<int32_t>(traits::MEM, offs); | ||||||
|                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); |                             if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); | ||||||
|                             *(X+rd) = (uint32_t)(int32_t)res_39; |                             *(X+rd) = (uint32_t)(int32_t)res_13; | ||||||
|                         } |                         } | ||||||
|                     } |                     } | ||||||
|                     break; |                     break; | ||||||
|   | |||||||
| @@ -97,7 +97,7 @@ protected: | |||||||
|         return super::gen_cond_assign(cond, this->gen_ext(trueVal, size), this->gen_ext(falseVal, size)); |         return super::gen_cond_assign(cond, this->gen_ext(trueVal, size), this->gen_ext(falseVal, size)); | ||||||
|     } |     } | ||||||
|  |  | ||||||
|     std::tuple<continuation_e, BasicBlock *> gen_single_inst_behavior(virt_addr_t &, unsigned int &, BasicBlock *) override; |     std::tuple<continuation_e, BasicBlock *> gen_single_inst_behavior(virt_addr_t &, BasicBlock *) override; | ||||||
|  |  | ||||||
|     void gen_leave_behavior(BasicBlock *leave_blk) override; |     void gen_leave_behavior(BasicBlock *leave_blk) override; | ||||||
|     void gen_raise_trap(uint16_t trap_id, uint16_t cause); |     void gen_raise_trap(uint16_t trap_id, uint16_t cause); | ||||||
| @@ -4937,7 +4937,7 @@ vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) | |||||||
|  |  | ||||||
| template <typename ARCH> | template <typename ARCH> | ||||||
| std::tuple<continuation_e, BasicBlock *> | std::tuple<continuation_e, BasicBlock *> | ||||||
| vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, BasicBlock *this_block) { | vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, BasicBlock *this_block) { | ||||||
|     // we fetch at max 4 byte, alignment is 2 |     // we fetch at max 4 byte, alignment is 2 | ||||||
|     enum {TRAP_ID=1<<16}; |     enum {TRAP_ID=1<<16}; | ||||||
|     code_word_t instr = 0; |     code_word_t instr = 0; | ||||||
| @@ -4949,9 +4949,10 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, | |||||||
|     auto res = this->core.read(paddr, 4, data); |     auto res = this->core.read(paddr, 4, data); | ||||||
|     if (res != iss::Ok)  |     if (res != iss::Ok)  | ||||||
|         return std::make_tuple(ILLEGAL_FETCH, nullptr); |         return std::make_tuple(ILLEGAL_FETCH, nullptr); | ||||||
|     if (instr == 0x0000006f || (instr&0xffff)==0xa001) |     if (instr == 0x0000006f || (instr&0xffff)==0xa001){ | ||||||
|  |         this->builder.CreateBr(this->leave_blk); | ||||||
|         return std::make_tuple(JUMP_TO_SELF, nullptr); |         return std::make_tuple(JUMP_TO_SELF, nullptr); | ||||||
|     ++inst_cnt; |         } | ||||||
|     uint32_t inst_index = instr_decoder.decode_instr(instr); |     uint32_t inst_index = instr_decoder.decode_instr(instr); | ||||||
|     compile_func f = nullptr; |     compile_func f = nullptr; | ||||||
|     if(inst_index < instr_descr.size()) |     if(inst_index < instr_descr.size()) | ||||||
| @@ -5033,6 +5034,10 @@ void vm_impl<ARCH>::gen_instr_epilogue(BasicBlock *bb) { | |||||||
|     auto* icount_val = this->builder.CreateAdd( |     auto* icount_val = this->builder.CreateAdd( | ||||||
|         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::ICOUNT), get_reg_ptr(arch::traits<ARCH>::ICOUNT)), this->gen_const(64U, 1)); |         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::ICOUNT), get_reg_ptr(arch::traits<ARCH>::ICOUNT)), this->gen_const(64U, 1)); | ||||||
|     this->builder.CreateStore(icount_val, get_reg_ptr(arch::traits<ARCH>::ICOUNT), false); |     this->builder.CreateStore(icount_val, get_reg_ptr(arch::traits<ARCH>::ICOUNT), false); | ||||||
|  |     //increment cyclecount | ||||||
|  |     auto* cycle_val = this->builder.CreateAdd( | ||||||
|  |         this->builder.CreateLoad(this->get_typeptr(arch::traits<ARCH>::CYCLE), get_reg_ptr(arch::traits<ARCH>::CYCLE)), this->gen_const(64U, 1)); | ||||||
|  |     this->builder.CreateStore(cycle_val, get_reg_ptr(arch::traits<ARCH>::CYCLE), false); | ||||||
| } | } | ||||||
|  |  | ||||||
| } // namespace tgc5c | } // namespace tgc5c | ||||||
|   | |||||||
| @@ -344,6 +344,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -379,6 +380,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -414,6 +416,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -460,6 +463,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -517,6 +521,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -566,6 +571,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -615,6 +621,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -664,6 +671,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -713,6 +721,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -762,6 +771,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -811,6 +821,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -851,6 +862,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -891,6 +903,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -931,6 +944,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -971,6 +985,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1011,6 +1026,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1048,6 +1064,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1085,6 +1102,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1122,6 +1140,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1160,6 +1179,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1198,6 +1218,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1236,6 +1257,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1274,6 +1296,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1312,6 +1335,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1350,6 +1374,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1388,6 +1413,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1426,6 +1452,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1464,6 +1491,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1502,6 +1530,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1540,6 +1569,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1580,6 +1610,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1618,6 +1649,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1656,6 +1688,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1694,6 +1727,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1734,6 +1768,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1774,6 +1809,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1812,6 +1848,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -1852,6 +1889,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fence), tu.constant((uint8_t)pred<<4|succ,8)); |         tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fence), tu.constant((uint8_t)pred<<4|succ,8)); | ||||||
| @@ -1877,6 +1915,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -1903,6 +1942,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -1929,6 +1969,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -1955,6 +1996,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.callf("wait", tu.constant(1,8)); |         tu.callf("wait", tu.constant(1,8)); | ||||||
| @@ -1984,6 +2026,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2025,6 +2068,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2068,6 +2112,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2111,6 +2156,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2149,6 +2195,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2191,6 +2238,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2233,6 +2281,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fencei), tu.constant(imm,16)); |         tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fencei), tu.constant(imm,16)); | ||||||
| @@ -2262,6 +2311,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2301,6 +2351,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2342,6 +2393,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2383,6 +2435,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2424,6 +2477,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2488,6 +2542,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2538,6 +2593,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2605,6 +2661,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 4; |         pc=pc+ 4; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2654,6 +2711,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(imm) { |         if(imm) { | ||||||
| @@ -2690,6 +2748,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         auto offs = tu.assignment(tu.ext((tu.add( |         auto offs = tu.assignment(tu.ext((tu.add( | ||||||
| @@ -2722,6 +2781,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         auto offs = tu.assignment(tu.ext((tu.add( |         auto offs = tu.assignment(tu.ext((tu.add( | ||||||
| @@ -2753,6 +2813,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2788,6 +2849,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         auto returnValue = CONT; |         auto returnValue = CONT; | ||||||
| @@ -2814,6 +2876,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -2846,6 +2909,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2881,6 +2945,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(imm==0||rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(imm==0||rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -2913,6 +2978,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(nzimm) { |         if(nzimm) { | ||||||
| @@ -2946,6 +3012,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION)); |         this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION)); | ||||||
| @@ -2974,6 +3041,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rs1+8 + traits::X0, tu.lshr( |         tu.store(rs1+8 + traits::X0, tu.lshr( | ||||||
| @@ -3004,6 +3072,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(shamt){ tu.store(rs1+8 + traits::X0, tu.ext((tu.ashr( |         if(shamt){ tu.store(rs1+8 + traits::X0, tu.ext((tu.ashr( | ||||||
| @@ -3041,6 +3110,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rs1+8 + traits::X0, tu.ext((tu.bitwise_and( |         tu.store(rs1+8 + traits::X0, tu.ext((tu.bitwise_and( | ||||||
| @@ -3071,6 +3141,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rd+8 + traits::X0, tu.ext((tu.sub( |         tu.store(rd+8 + traits::X0, tu.ext((tu.sub( | ||||||
| @@ -3101,6 +3172,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rd+8 + traits::X0, tu.bitwise_xor( |         tu.store(rd+8 + traits::X0, tu.bitwise_xor( | ||||||
| @@ -3131,6 +3203,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rd+8 + traits::X0, tu.bitwise_or( |         tu.store(rd+8 + traits::X0, tu.bitwise_or( | ||||||
| @@ -3161,6 +3234,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(rd+8 + traits::X0, tu.bitwise_and( |         tu.store(rd+8 + traits::X0, tu.bitwise_and( | ||||||
| @@ -3190,6 +3264,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -3221,6 +3296,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -3258,6 +3334,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -3295,6 +3372,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs1>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs1>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -3332,6 +3410,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)||rd==0) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)||rd==0) { | ||||||
| @@ -3368,6 +3447,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -3402,6 +3482,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -3437,6 +3518,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         this->gen_raise_trap(tu, 0, 2); |         this->gen_raise_trap(tu, 0, 2); | ||||||
| @@ -3465,6 +3547,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rd>=static_cast<uint32_t>(traits:: RFS)) { |         if(rd>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -3501,6 +3584,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); |         tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(NO_JUMP),32)); | ||||||
| @@ -3539,6 +3623,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         this->gen_raise_trap(tu, 0, 3); |         this->gen_raise_trap(tu, 0, 3); | ||||||
| @@ -3567,6 +3652,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         if(rs2>=static_cast<uint32_t>(traits:: RFS)) { |         if(rs2>=static_cast<uint32_t>(traits:: RFS)) { | ||||||
| @@ -3600,6 +3686,7 @@ private: | |||||||
|         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); |         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]); | ||||||
|         pc=pc+ 2; |         pc=pc+ 2; | ||||||
|         gen_set_pc(tu, pc, traits::NEXT_PC); |         gen_set_pc(tu, pc, traits::NEXT_PC); | ||||||
|  |         tu("(*cycle)++;"); | ||||||
|         tu.open_scope(); |         tu.open_scope(); | ||||||
|         this->gen_set_tval(tu, instr); |         this->gen_set_tval(tu, instr); | ||||||
|         this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION)); |         this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION)); | ||||||
| @@ -3697,13 +3784,15 @@ template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) { | |||||||
|     tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32)); |     tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32)); | ||||||
|     tu("return *next_pc;"); |     tu("return *next_pc;"); | ||||||
| } | } | ||||||
|  |  | ||||||
| template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){ | template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){ | ||||||
|     std::ostringstream os; |     std::ostringstream os; | ||||||
|     os << tu.add_reg_ptr("trap_state", arch::traits<ARCH>::TRAP_STATE, this->regs_base_ptr); |     os << tu.add_reg_ptr("trap_state", arch::traits<ARCH>::TRAP_STATE, this->regs_base_ptr); | ||||||
|     os << tu.add_reg_ptr("pending_trap", arch::traits<ARCH>::PENDING_TRAP, this->regs_base_ptr); |     os << tu.add_reg_ptr("pending_trap", arch::traits<ARCH>::PENDING_TRAP, this->regs_base_ptr); | ||||||
|  |     os << tu.add_reg_ptr("cycle", arch::traits<ARCH>::CYCLE, this->regs_base_ptr); | ||||||
|  |  | ||||||
|     tu.add_prologue(os.str()); |     tu.add_prologue(os.str()); | ||||||
| } | } | ||||||
|  |  | ||||||
| } // namespace tgc5c | } // namespace tgc5c | ||||||
|  |  | ||||||
| template <> | template <> | ||||||
|   | |||||||
		Reference in New Issue
	
	Block a user