update definitions of derived constants

gen_input/TGFS.core_desc

@@ -18,7 +18,6 @@ Core TGF_C provides RV32I, RV32M, RV32IC {
     constants {
         unsigned XLEN=32;
         unsigned PCLEN=32;
-        unsigned MUL_LEN=64;
         // definitions for the architecture wrapper
         //          XL    ZYXWVUTSRQPONMLKJIHGFEDCBA
         unsigned MISA_VAL=0b01000000000000000001000100000100;

incl/iss/arch/tgf_c.h

@@ -53,7 +53,7 @@ template <> struct traits<tgf_c> {
   	static constexpr std::array<const char*, 33> reg_aliases{
  		{"ZERO", "RA", "SP", "GP", "TP", "T0", "T1", "T2", "S0", "S1", "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "S2", "S3", "S4", "S5", "S6", "S7", "S8", "S9", "S10", "S11", "T3", "T4", "T5", "T6", "PC"}};
 
-    enum constants {XLEN=32, PCLEN=32, MUL_LEN=64, MISA_VAL=0b1000000000000000001000100000100, PGSIZE=0x1000, PGMASK=0xfff, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3};
+    enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b1000000000000000001000100000100, PGSIZE=0x1000, PGMASK=0xfff, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3, MUL_LEN=64};
 
     constexpr static unsigned FP_REGS_SIZE = 0;