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DBT-RISE-TGC
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base: DBT-RISE:b360fc2c756ef35d43ab013eca0ef495acb48cce
Branches Tags
DBT-RISE:main
DBT-RISE:develop
DBT-RISE:feature/iss_factory
DBT-RISE:feature/core_factory
DBT-RISE:Trace_enhancement
DBT-RISE:feature/reduced_output
DBT-RISE:msvc_compat
DBT-RISE:hotfix/latest_scc
DBT-RISE:feature/interpreter
..
compare: DBT-RISE:8ee3ac90f72176d0bbdfe10e43ab251f629c7d37
Branches Tags
DBT-RISE:develop
DBT-RISE:main
DBT-RISE:feature/iss_factory
DBT-RISE:feature/core_factory
DBT-RISE:Trace_enhancement
DBT-RISE:feature/reduced_output
DBT-RISE:msvc_compat
DBT-RISE:hotfix/latest_scc
DBT-RISE:feature/interpreter

No commits in common. "b360fc2c756ef35d43ab013eca0ef495acb48cce" and "8ee3ac90f72176d0bbdfe10e43ab251f629c7d37" have entirely different histories.
b360fc2c75 ... 8ee3ac90f7

5 changed files with 2336 additions and 2378 deletions
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34
TGC_C_instr.yaml
View File

@ -15,51 +15,59 @@ RV32I:
- JAL:
encoding: 0b00000000000000000000000001101111
mask: 0b00000000000000000000000001111111
attributes: [[name:no_cont]]
size: 32
branch: true
delay: 1
- JALR:
encoding: 0b00000000000000000000000001100111
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont]]
size: 32
branch: true
delay: 1
- BEQ:
encoding: 0b00000000000000000000000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- BNE:
encoding: 0b00000000000000000001000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- BLT:
encoding: 0b00000000000000000100000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- BGE:
encoding: 0b00000000000000000101000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- BLTU:
encoding: 0b00000000000000000110000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- BGEU:
encoding: 0b00000000000000000111000001100011
mask: 0b00000000000000000111000001111111
attributes: [[name:no_cont], [name:cond]]
size: 32
branch: true
delay: 1
delay: [1,1]
- LB:
encoding: 0b00000000000000000000000000000011
mask: 0b00000000000000000111000001111111
@ -231,12 +239,14 @@ RV32I:
- ECALL:
encoding: 0b00000000000000000000000001110011
mask: 0b11111111111111111111111111111111
attributes: [[name:no_cont]]
size: 32
branch: false
delay: 1
- EBREAK:
encoding: 0b00000000000100000000000001110011
mask: 0b11111111111111111111111111111111
attributes: [[name:no_cont]]
size: 32
branch: false
delay: 1
@ -381,6 +391,7 @@ RV32IC:
- CJAL:
encoding: 0b0010000000000001
mask: 0b1110000000000011
attributes: [[name:no_cont]]
size: 16
branch: true
delay: 1
@ -447,21 +458,24 @@ RV32IC:
- CJ:
encoding: 0b1010000000000001
mask: 0b1110000000000011
attributes: [[name:no_cont]]
size: 16
branch: true
delay: 1
- CBEQZ:
encoding: 0b1100000000000001
mask: 0b1110000000000011
attributes: [[name:no_cont], [name:cond]]
size: 16
branch: true
delay: 1
delay: [1,1]
- CBNEZ:
encoding: 0b1110000000000001
mask: 0b1110000000000011
attributes: [[name:no_cont], [name:cond]]
size: 16
branch: true
delay: 1
delay: [1,1]
- CSLLI:
encoding: 0b0000000000000010
mask: 0b1111000000000011
@ -483,6 +497,7 @@ RV32IC:
- CJR:
encoding: 0b1000000000000010
mask: 0b1111000001111111
attributes: [[name:no_cont]]
size: 16
branch: true
delay: 1
@ -495,12 +510,14 @@ RV32IC:
- CJALR:
encoding: 0b1001000000000010
mask: 0b1111000001111111
attributes: [[name:no_cont]]
size: 16
branch: true
delay: 1
- CEBREAK:
encoding: 0b1001000000000010
mask: 0b1111111111111111
attributes: [[name:no_cont]]
size: 16
branch: false
delay: 1
@ -513,6 +530,7 @@ RV32IC:
- DII:
encoding: 0b0000000000000000
mask: 0b1111111111111111
attributes: [[name:no_cont]]
size: 16
branch: false
delay: 1

30
gen_input/templates/interp/CORENAME.cpp.gtl
View File

@ -43,7 +43,6 @@ def nativeTypeSize(int size){
#include <sstream>
#include <boost/coroutine2/all.hpp>
#include <functional>
#include <exception>
#ifndef FMT_HEADER_ONLY
#define FMT_HEADER_ONLY
@ -60,10 +59,6 @@ using namespace iss::arch;
using namespace iss::debugger;
using namespace std::placeholders;
struct memory_access_exception : public std::exception{
memory_access_exception(){}
};
template <typename ARCH> class vm_impl : public iss::interp::vm_base<ARCH> {
public:
using traits = arch::traits<ARCH>;
@ -96,9 +91,30 @@ protected:
inline const char *name(size_t index){return index<traits::reg_aliases.size()?traits::reg_aliases[index]:"illegal";}
typename arch::traits<ARCH>::opcode_e decode_inst_id(code_word_t instr);
virt_addr_t execute_inst(finish_cond_e cond, virt_addr_t start, uint64_t icount_limit) override;
// some compile time constants
// enum { MASK16 = 0b1111110001100011, MASK32 = 0b11111111111100000111000001111111 };
enum { MASK16 = 0b1111111111111111, MASK32 = 0b11111111111100000111000001111111 };
enum { EXTR_MASK16 = MASK16 >> 2, EXTR_MASK32 = MASK32 >> 2 };
enum {
LUT_SIZE = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK32)),
LUT_SIZE_C = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK16))
};
std::array<compile_func, LUT_SIZE> lut;
std::array<compile_func, LUT_SIZE_C> lut_00, lut_01, lut_10;
std::array<compile_func, LUT_SIZE> lut_11;
struct instruction_pattern {
uint32_t value;
uint32_t mask;
typename arch::traits<ARCH>::opcode_e id;
};
std::array<std::vector<instruction_pattern>, 4> qlut;
inline void raise(uint16_t trap_id, uint16_t cause){
auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id;
@ -298,7 +314,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
// pre execution stuff
this->core.reg.last_branch = 0;
if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, static_cast<unsigned>(inst_id));
try{
switch(inst_id){<%instructions.eachWithIndex{instr, idx -> %>
case arch::traits<ARCH>::opcode_e::${instr.name}: {
<%instr.fields.eachLine{%>${it}
@ -314,14 +329,13 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
*NEXT_PC = *PC + ${instr.length/8};
// execute instruction<%instr.behavior.eachLine{%>
${it}<%}%>
break;
TRAP_${instr.name}:break;
}// @suppress("No break at end of case")<%}%>
default: {
*NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2);
raise(0, 2);
}
}
}catch(memory_access_exception& e){}
// post execution stuff
process_spawn_blocks();
if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast<unsigned>(inst_id));

5
gen_input/templates/tcc/CORENAME.cpp.gtl
View File

@ -167,9 +167,8 @@ private:
auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]);
pc=pc+ ${instr.length/8};
gen_set_pc(tu, pc, traits::NEXT_PC);
tu.open_scope();
<%instr.behavior.eachLine{%>${it}
<%}%>
tu.open_scope();<%instr.behavior.eachLine{%>
${it}<%}%>
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,${idx});
gen_trap_check(tu);

256
src/vm/interp/vm_tgc5c.cpp
View File

@ -39,7 +39,6 @@
#include <sstream>
#include <boost/coroutine2/all.hpp>
#include <functional>
#include <exception>
#ifndef FMT_HEADER_ONLY
#define FMT_HEADER_ONLY
@ -56,10 +55,6 @@ using namespace iss::arch;
using namespace iss::debugger;
using namespace std::placeholders;
struct memory_access_exception : public std::exception{
memory_access_exception(){}
};
template <typename ARCH> class vm_impl : public iss::interp::vm_base<ARCH> {
public:
using traits = arch::traits<ARCH>;
@ -92,9 +87,30 @@ protected:
inline const char *name(size_t index){return index<traits::reg_aliases.size()?traits::reg_aliases[index]:"illegal";}
typename arch::traits<ARCH>::opcode_e decode_inst_id(code_word_t instr);
virt_addr_t execute_inst(finish_cond_e cond, virt_addr_t start, uint64_t icount_limit) override;
// some compile time constants
// enum { MASK16 = 0b1111110001100011, MASK32 = 0b11111111111100000111000001111111 };
enum { MASK16 = 0b1111111111111111, MASK32 = 0b11111111111100000111000001111111 };
enum { EXTR_MASK16 = MASK16 >> 2, EXTR_MASK32 = MASK32 >> 2 };
enum {
LUT_SIZE = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK32)),
LUT_SIZE_C = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK16))
};
std::array<compile_func, LUT_SIZE> lut;
std::array<compile_func, LUT_SIZE_C> lut_00, lut_01, lut_10;
std::array<compile_func, LUT_SIZE> lut_11;
struct instruction_pattern {
uint32_t value;
uint32_t mask;
typename arch::traits<ARCH>::opcode_e id;
};
std::array<std::vector<instruction_pattern>, 4> qlut;
inline void raise(uint16_t trap_id, uint16_t cause){
auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id;
@ -378,7 +394,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
// pre execution stuff
this->core.reg.last_branch = 0;
if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, static_cast<unsigned>(inst_id));
try{
switch(inst_id){
case arch::traits<ARCH>::opcode_e::LUI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -404,7 +419,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_LUI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::AUIPC: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -430,7 +445,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_AUIPC:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::JAL: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -463,7 +478,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_JAL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::JALR: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -498,7 +513,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_JALR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BEQ: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -531,7 +546,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BEQ:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BNE: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -564,7 +579,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BNE:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BLT: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -597,7 +612,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BLT:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BGE: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -630,7 +645,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BGE:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BLTU: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -663,7 +678,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BLTU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::BGEU: {
uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12));
@ -696,7 +711,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_BGEU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::LB: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -720,14 +735,14 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
int8_t read_res = super::template read_mem<int8_t>(traits::MEM, load_address);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LB;
int8_t res = (int8_t)read_res;
if(rd != 0) {
*(X+rd) = (uint32_t)res;
}
}
}
break;
TRAP_LB:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::LH: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -751,14 +766,14 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
int16_t read_res = super::template read_mem<int16_t>(traits::MEM, load_address);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LH;
int16_t res = (int16_t)read_res;
if(rd != 0) {
*(X+rd) = (uint32_t)res;
}
}
}
break;
TRAP_LH:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::LW: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -782,14 +797,14 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
int32_t read_res = super::template read_mem<int32_t>(traits::MEM, load_address);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LW;
int32_t res = (int32_t)read_res;
if(rd != 0) {
*(X+rd) = (uint32_t)res;
}
}
}
break;
TRAP_LW:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::LBU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -813,14 +828,14 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
uint8_t read_res = super::template read_mem<uint8_t>(traits::MEM, load_address);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LBU;
uint8_t res = read_res;
if(rd != 0) {
*(X+rd) = (uint32_t)res;
}
}
}
break;
TRAP_LBU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::LHU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -844,14 +859,14 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
uint16_t read_res = super::template read_mem<uint16_t>(traits::MEM, load_address);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LHU;
uint16_t res = read_res;
if(rd != 0) {
*(X+rd) = (uint32_t)res;
}
}
}
break;
TRAP_LHU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SB: {
uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5));
@ -875,10 +890,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
super::template write_mem<uint8_t>(traits::MEM, store_address, (uint8_t)*(X+rs2));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SB;
}
}
break;
TRAP_SB:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SH: {
uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5));
@ -902,10 +917,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
super::template write_mem<uint16_t>(traits::MEM, store_address, (uint16_t)*(X+rs2));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SH;
}
}
break;
TRAP_SH:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SW: {
uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5));
@ -929,10 +944,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
super::template write_mem<uint32_t>(traits::MEM, store_address, (uint32_t)*(X+rs2));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SW;
}
}
break;
TRAP_SW:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::ADDI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -959,7 +974,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_ADDI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLTI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -986,7 +1001,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLTI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLTIU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1013,7 +1028,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLTIU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::XORI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1040,7 +1055,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_XORI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::ORI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1067,7 +1082,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_ORI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::ANDI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1094,7 +1109,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_ANDI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLLI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1121,7 +1136,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLLI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SRLI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1148,7 +1163,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SRLI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SRAI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1175,7 +1190,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SRAI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::ADD: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1202,7 +1217,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_ADD:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SUB: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1229,7 +1244,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SUB:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLL: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1256,7 +1271,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLT: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1283,7 +1298,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLT:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SLTU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1310,7 +1325,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SLTU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::XOR: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1337,7 +1352,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_XOR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SRL: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1364,7 +1379,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SRL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::SRA: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1391,7 +1406,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_SRA:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::OR: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1418,7 +1433,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_OR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::AND: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1445,7 +1460,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_AND:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::FENCE: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1465,9 +1480,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
// execute instruction
{
super::template write_mem<uint32_t>(traits::FENCE, traits::fence, (uint8_t)pred << 4 | succ);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_FENCE;
}
break;
TRAP_FENCE:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::ECALL: {
if(this->disass_enabled){
@ -1480,7 +1495,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 11);
}
break;
TRAP_ECALL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::EBREAK: {
if(this->disass_enabled){
@ -1493,7 +1508,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 3);
}
break;
TRAP_EBREAK:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::MRET: {
if(this->disass_enabled){
@ -1506,7 +1521,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
leave(3);
}
break;
TRAP_MRET:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::WFI: {
if(this->disass_enabled){
@ -1519,7 +1534,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
wait(1);
}
break;
TRAP_WFI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRW: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1544,19 +1559,19 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
uint32_t xrs1 = *(X+rs1);
if(rd != 0) {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRW;
uint32_t xrd = read_res;
super::template write_mem<uint32_t>(traits::CSR, csr, xrs1);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRW;
*(X+rd) = xrd;
}
else {
super::template write_mem<uint32_t>(traits::CSR, csr, xrs1);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRW;
}
}
}
break;
TRAP_CSRRW:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRS: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1579,19 +1594,19 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
else {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRS;
uint32_t xrd = read_res;
uint32_t xrs1 = *(X+rs1);
if(rs1 != 0) {
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | xrs1);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRS;
}
if(rd != 0) {
*(X+rd) = xrd;
}
}
}
break;
TRAP_CSRRS:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRC: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1614,19 +1629,19 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
else {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRC;
uint32_t xrd = read_res;
uint32_t xrs1 = *(X+rs1);
if(rs1 != 0) {
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ xrs1);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRC;
}
if(rd != 0) {
*(X+rd) = xrd;
}
}
}
break;
TRAP_CSRRC:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRWI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1649,16 +1664,16 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
else {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRWI;
uint32_t xrd = read_res;
super::template write_mem<uint32_t>(traits::CSR, csr, (uint32_t)zimm);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRWI;
if(rd != 0) {
*(X+rd) = xrd;
}
}
}
break;
TRAP_CSRRWI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRSI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1681,18 +1696,18 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
else {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRSI;
uint32_t xrd = read_res;
if(zimm != 0) {
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | (uint32_t)zimm);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRSI;
}
if(rd != 0) {
*(X+rd) = xrd;
}
}
}
break;
TRAP_CSRRSI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRRCI: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1715,18 +1730,18 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
else {
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRCI;
uint32_t xrd = read_res;
if(zimm != 0) {
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ ((uint32_t)zimm));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSRRCI;
}
if(rd != 0) {
*(X+rd) = xrd;
}
}
}
break;
TRAP_CSRRCI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::FENCE_I: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1744,9 +1759,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
// execute instruction
{
super::template write_mem<uint32_t>(traits::FENCE, traits::fencei, imm);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_FENCE_I;
}
break;
TRAP_FENCE_I:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::MUL: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1774,7 +1789,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_MUL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::MULH: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1802,7 +1817,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_MULH:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::MULHSU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1830,7 +1845,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_MULHSU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::MULHU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1858,7 +1873,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_MULHU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::DIV: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1898,7 +1913,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_DIV:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::DIVU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1932,7 +1947,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_DIVU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::REM: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -1974,7 +1989,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_REM:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::REMU: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -2008,7 +2023,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_REMU:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CADDI4SPN: {
uint8_t rd = ((bit_sub<2,3>(instr)));
@ -2032,7 +2047,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
raise(0, 2);
}
}
break;
TRAP_CADDI4SPN:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CLW: {
uint8_t rd = ((bit_sub<2,3>(instr)));
@ -2052,10 +2067,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
uint32_t offs = (uint32_t)(*(X+rs1 + 8) + uimm);
int32_t read_res = super::template read_mem<int32_t>(traits::MEM, offs);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CLW;
*(X+rd + 8) = (uint32_t)(int32_t)read_res;
}
break;
TRAP_CLW:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSW: {
uint8_t rs2 = ((bit_sub<2,3>(instr)));
@ -2075,9 +2090,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
uint32_t offs = (uint32_t)(*(X+rs1 + 8) + uimm);
super::template write_mem<uint32_t>(traits::MEM, offs, (uint32_t)*(X+rs2 + 8));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSW;
}
break;
TRAP_CSW:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CADDI: {
uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
@ -2103,7 +2118,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CADDI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CNOP: {
uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
@ -2116,7 +2131,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
// execute instruction
{
}
break;
TRAP_CNOP:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CJAL: {
uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11));
@ -2136,7 +2151,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
*NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm));
this->core.reg.last_branch = 1;
}
break;
TRAP_CJAL:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CLI: {
uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
@ -2162,7 +2177,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CLI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CLUI: {
uint32_t imm = ((bit_sub<2,5>(instr) << 12) | (bit_sub<12,1>(instr) << 17));
@ -2186,7 +2201,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
*(X+rd) = (uint32_t)((int32_t)sext<18>(imm));
}
}
break;
TRAP_CLUI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CADDI16SP: {
uint16_t nzimm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 7) | (bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 4) | (bit_sub<12,1>(instr) << 9));
@ -2209,7 +2224,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
raise(0, 2);
}
}
break;
TRAP_CADDI16SP:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::__reserved_clui: {
uint8_t rd = ((bit_sub<7,5>(instr)));
@ -2223,7 +2238,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 2);
}
break;
TRAP___reserved_clui:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRLI: {
uint8_t shamt = ((bit_sub<2,5>(instr)));
@ -2242,7 +2257,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rs1 + 8) = *(X+rs1 + 8) >> shamt;
}
break;
TRAP_CSRLI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSRAI: {
uint8_t shamt = ((bit_sub<2,5>(instr)));
@ -2268,7 +2283,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CSRAI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CANDI: {
uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
@ -2287,7 +2302,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rs1 + 8) = (uint32_t)(*(X+rs1 + 8) & (int8_t)sext<6>(imm));
}
break;
TRAP_CANDI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSUB: {
uint8_t rs2 = ((bit_sub<2,3>(instr)));
@ -2306,7 +2321,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rd + 8) = (uint32_t)(*(X+rd + 8) - *(X+rs2 + 8));
}
break;
TRAP_CSUB:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CXOR: {
uint8_t rs2 = ((bit_sub<2,3>(instr)));
@ -2325,7 +2340,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rd + 8) = *(X+rd + 8) ^ *(X+rs2 + 8);
}
break;
TRAP_CXOR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::COR: {
uint8_t rs2 = ((bit_sub<2,3>(instr)));
@ -2344,7 +2359,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rd + 8) = *(X+rd + 8) | *(X+rs2 + 8);
}
break;
TRAP_COR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CAND: {
uint8_t rs2 = ((bit_sub<2,3>(instr)));
@ -2363,7 +2378,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
*(X+rd + 8) = *(X+rd + 8) & *(X+rs2 + 8);
}
break;
TRAP_CAND:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CJ: {
uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11));
@ -2381,7 +2396,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
*NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm));
this->core.reg.last_branch = 1;
}
break;
TRAP_CJ:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CBEQZ: {
uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8));
@ -2403,7 +2418,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
this->core.reg.last_branch = 1;
}
}
break;
TRAP_CBEQZ:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CBNEZ: {
uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8));
@ -2425,7 +2440,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
this->core.reg.last_branch = 1;
}
}
break;
TRAP_CBNEZ:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSLLI: {
uint8_t nzuimm = ((bit_sub<2,5>(instr)));
@ -2451,7 +2466,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CSLLI:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CLWSP: {
uint8_t uimm = ((bit_sub<2,2>(instr) << 6) | (bit_sub<4,3>(instr) << 2) | (bit_sub<12,1>(instr) << 5));
@ -2474,11 +2489,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t offs = (uint32_t)(*(X+2) + uimm);
int32_t read_res = super::template read_mem<int32_t>(traits::MEM, offs);
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CLWSP;
*(X+rd) = (uint32_t)(int32_t)read_res;
}
}
break;
TRAP_CLWSP:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CMV: {
uint8_t rs2 = ((bit_sub<2,5>(instr)));
@ -2504,7 +2519,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CMV:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CJR: {
uint8_t rs1 = ((bit_sub<7,5>(instr)));
@ -2528,7 +2543,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
raise(0, 2);
}
}
break;
TRAP_CJR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::__reserved_cmv: {
if(this->disass_enabled){
@ -2541,7 +2556,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 2);
}
break;
TRAP___reserved_cmv:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CADD: {
uint8_t rs2 = ((bit_sub<2,5>(instr)));
@ -2567,7 +2582,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
}
}
}
break;
TRAP_CADD:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CJALR: {
uint8_t rs1 = ((bit_sub<7,5>(instr)));
@ -2593,7 +2608,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
this->core.reg.last_branch = 1;
}
}
break;
TRAP_CJALR:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CEBREAK: {
if(this->disass_enabled){
@ -2606,7 +2621,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 3);
}
break;
TRAP_CEBREAK:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::CSWSP: {
uint8_t rs2 = ((bit_sub<2,5>(instr)));
@ -2629,10 +2644,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
else {
uint32_t offs = (uint32_t)(*(X+2) + uimm);
super::template write_mem<uint32_t>(traits::MEM, offs, (uint32_t)*(X+rs2));
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSWSP;
}
}
break;
TRAP_CSWSP:break;
}// @suppress("No break at end of case")
case arch::traits<ARCH>::opcode_e::DII: {
if(this->disass_enabled){
@ -2645,14 +2660,13 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
{
raise(0, 2);
}
break;
TRAP_DII:break;
}// @suppress("No break at end of case")
default: {
*NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2);
raise(0, 2);
}
}
}catch(memory_access_exception& e){}
// post execution stuff
process_spawn_blocks();
if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast<unsigned>(inst_id));

87
src/vm/tcc/vm_tgc5c.cpp
View File

@ -353,7 +353,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,0);
gen_trap_check(tu);
@ -386,7 +385,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,1);
gen_trap_check(tu);
@ -426,7 +424,6 @@ private:
}
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,2);
gen_trap_check(tu);
@ -468,7 +465,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,3);
gen_trap_check(tu);
@ -508,7 +504,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,4);
gen_trap_check(tu);
@ -548,7 +543,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,5);
gen_trap_check(tu);
@ -588,7 +582,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,6);
gen_trap_check(tu);
@ -628,7 +621,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,7);
gen_trap_check(tu);
@ -668,7 +660,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,8);
gen_trap_check(tu);
@ -708,7 +699,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,9);
gen_trap_check(tu);
@ -744,7 +734,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,10);
gen_trap_check(tu);
@ -780,7 +769,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,11);
gen_trap_check(tu);
@ -816,7 +804,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,12);
gen_trap_check(tu);
@ -852,7 +839,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,13);
gen_trap_check(tu);
@ -888,7 +874,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,14);
gen_trap_check(tu);
@ -921,7 +906,6 @@ private:
tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),8,true));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,15);
gen_trap_check(tu);
@ -954,7 +938,6 @@ private:
tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),16,true));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,16);
gen_trap_check(tu);
@ -987,7 +970,6 @@ private:
tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),32,true));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,17);
gen_trap_check(tu);
@ -1021,7 +1003,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,18);
gen_trap_check(tu);
@ -1055,7 +1036,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,19);
gen_trap_check(tu);
@ -1089,7 +1069,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,20);
gen_trap_check(tu);
@ -1123,7 +1102,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,21);
gen_trap_check(tu);
@ -1157,7 +1135,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,22);
gen_trap_check(tu);
@ -1191,7 +1168,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,23);
gen_trap_check(tu);
@ -1225,7 +1201,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,24);
gen_trap_check(tu);
@ -1259,7 +1234,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,25);
gen_trap_check(tu);
@ -1293,7 +1267,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,26);
gen_trap_check(tu);
@ -1327,7 +1300,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,27);
gen_trap_check(tu);
@ -1361,7 +1333,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,28);
gen_trap_check(tu);
@ -1395,7 +1366,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,29);
gen_trap_check(tu);
@ -1429,7 +1399,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,30);
gen_trap_check(tu);
@ -1463,7 +1432,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,31);
gen_trap_check(tu);
@ -1497,7 +1465,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,32);
gen_trap_check(tu);
@ -1531,7 +1498,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,33);
gen_trap_check(tu);
@ -1565,7 +1531,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,34);
gen_trap_check(tu);
@ -1599,7 +1564,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,35);
gen_trap_check(tu);
@ -1633,7 +1597,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,36);
gen_trap_check(tu);
@ -1662,7 +1625,6 @@ private:
tu.open_scope();
tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fence), tu.constant((uint8_t)pred<< 4|succ,8));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,37);
gen_trap_check(tu);
@ -1683,7 +1645,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 11);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,38);
gen_trap_check(tu);
@ -1704,7 +1665,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 3);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,39);
gen_trap_check(tu);
@ -1725,7 +1685,6 @@ private:
tu.open_scope();
this->gen_leave_trap(tu, 3);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,40);
gen_trap_check(tu);
@ -1746,7 +1705,6 @@ private:
tu.open_scope();
this->gen_wait(tu, 1);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,41);
gen_trap_check(tu);
@ -1785,7 +1743,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,42);
gen_trap_check(tu);
@ -1824,7 +1781,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,43);
gen_trap_check(tu);
@ -1863,7 +1819,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,44);
gen_trap_check(tu);
@ -1899,7 +1854,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,45);
gen_trap_check(tu);
@ -1937,7 +1891,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,46);
gen_trap_check(tu);
@ -1975,7 +1928,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,47);
gen_trap_check(tu);
@ -2002,7 +1954,6 @@ private:
tu.open_scope();
tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fencei), tu.constant(imm,16));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,48);
gen_trap_check(tu);
@ -2037,7 +1988,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,49);
gen_trap_check(tu);
@ -2072,7 +2022,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,50);
gen_trap_check(tu);
@ -2107,7 +2056,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,51);
gen_trap_check(tu);
@ -2142,7 +2090,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,52);
gen_trap_check(tu);
@ -2186,7 +2133,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,53);
gen_trap_check(tu);
@ -2226,7 +2172,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,54);
gen_trap_check(tu);
@ -2273,7 +2218,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,55);
gen_trap_check(tu);
@ -2313,7 +2257,6 @@ private:
tu.close_scope();
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,56);
gen_trap_check(tu);
@ -2344,7 +2287,6 @@ private:
this->gen_raise_trap(tu, 0, 2);
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,57);
gen_trap_check(tu);
@ -2372,7 +2314,6 @@ private:
auto offs = tu.assignment(tu.ext((tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
tu.store(rd+ 8 + traits::X0,tu.ext(tu.ext(tu.read_mem(traits::MEM, offs, 32),32,false),32,true));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,58);
gen_trap_check(tu);
@ -2400,7 +2341,6 @@ private:
auto offs = tu.assignment(tu.ext((tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
tu.write_mem(traits::MEM, offs, tu.ext(tu.load(rs2+ 8+ traits::X0, 0),32,true));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,59);
gen_trap_check(tu);
@ -2433,7 +2373,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,60);
gen_trap_check(tu);
@ -2454,7 +2393,6 @@ private:
gen_set_pc(tu, pc, traits::NEXT_PC);
tu.open_scope();
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,61);
gen_trap_check(tu);
@ -2482,7 +2420,6 @@ private:
tu.store(traits::NEXT_PC, PC_val_v);
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,62);
gen_trap_check(tu);
@ -2515,7 +2452,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,63);
gen_trap_check(tu);
@ -2546,7 +2482,6 @@ private:
tu.store(rd + traits::X0,tu.constant((uint32_t)((int32_t)sext<18>(imm)),32));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,64);
gen_trap_check(tu);
@ -2576,7 +2511,6 @@ private:
this->gen_raise_trap(tu, 0, 2);
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,65);
gen_trap_check(tu);
@ -2598,7 +2532,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 2);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,66);
gen_trap_check(tu);
@ -2624,7 +2557,6 @@ private:
tu.open_scope();
tu.store(rs1+ 8 + traits::X0,tu.lshr(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(shamt,8)));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,67);
gen_trap_check(tu);
@ -2655,7 +2587,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,68);
gen_trap_check(tu);
@ -2681,7 +2612,6 @@ private:
tu.open_scope();
tu.store(rs1+ 8 + traits::X0,tu.ext((tu.bitwise_and(tu.load(rs1+ 8+ traits::X0, 0),tu.constant((int8_t)sext<6>(imm),8))),32,true));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,69);
gen_trap_check(tu);
@ -2707,7 +2637,6 @@ private:
tu.open_scope();
tu.store(rd+ 8 + traits::X0,tu.ext((tu.sub(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0))),32,true));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,70);
gen_trap_check(tu);
@ -2733,7 +2662,6 @@ private:
tu.open_scope();
tu.store(rd+ 8 + traits::X0,tu.bitwise_xor(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0)));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,71);
gen_trap_check(tu);
@ -2759,7 +2687,6 @@ private:
tu.open_scope();
tu.store(rd+ 8 + traits::X0,tu.bitwise_or(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0)));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,72);
gen_trap_check(tu);
@ -2785,7 +2712,6 @@ private:
tu.open_scope();
tu.store(rd+ 8 + traits::X0,tu.bitwise_and(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0)));
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,73);
gen_trap_check(tu);
@ -2812,7 +2738,6 @@ private:
tu.store(traits::NEXT_PC, PC_val_v);
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,74);
gen_trap_check(tu);
@ -2842,7 +2767,6 @@ private:
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
tu.close_scope();
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,75);
gen_trap_check(tu);
@ -2872,7 +2796,6 @@ private:
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
tu.close_scope();
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,76);
gen_trap_check(tu);
@ -2905,7 +2828,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,77);
gen_trap_check(tu);
@ -2937,7 +2859,6 @@ private:
tu.store(rd + traits::X0,tu.ext(tu.ext(tu.read_mem(traits::MEM, offs, 32),32,false),32,true));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,78);
gen_trap_check(tu);
@ -2970,7 +2891,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,79);
gen_trap_check(tu);
@ -3002,7 +2922,6 @@ private:
this->gen_raise_trap(tu, 0, 2);
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,80);
gen_trap_check(tu);
@ -3023,7 +2942,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 2);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,81);
gen_trap_check(tu);
@ -3056,7 +2974,6 @@ private:
}
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,82);
gen_trap_check(tu);
@ -3090,7 +3007,6 @@ private:
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
}
auto returnValue = std::make_tuple(BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,83);
gen_trap_check(tu);
@ -3111,7 +3027,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 3);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,84);
gen_trap_check(tu);
@ -3143,7 +3058,6 @@ private:
tu.write_mem(traits::MEM, offs, tu.ext(tu.load(rs2+ traits::X0, 0),32,true));
}
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,85);
gen_trap_check(tu);
@ -3164,7 +3078,6 @@ private:
tu.open_scope();
this->gen_raise_trap(tu, 0, 2);
auto returnValue = std::make_tuple(CONT);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC,86);
gen_trap_check(tu);