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@ -30,7 +30,7 @@
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*
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*******************************************************************************/
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#include "../fp_functions.h"
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#include <vm/fp_functions.h>
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#include <iss/arch/tgc_c.h>
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#include <iss/arch/riscv_hart_m_p.h>
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#include <iss/debugger/gdb_session.h>
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@ -390,7 +390,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "lui"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -412,7 +411,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm:#08x}", fmt::arg("mnemonic", "auipc"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -434,7 +432,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm:#0x}", fmt::arg("mnemonic", "jal"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -464,7 +461,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {rs1}, {imm:#0x}", fmt::arg("mnemonic", "jalr"),
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fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -495,7 +491,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "beq"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -524,7 +519,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bne"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -553,7 +547,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "blt"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -582,7 +575,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bge"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -611,7 +603,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bltu"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -640,7 +631,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bgeu"),
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fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -669,15 +659,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lb"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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*NEXT_PC = *PC + 4;
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// execute instruction
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{
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int8_t res = (int8_t)super::template read_mem<uint8_t>(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm));
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uint8_t read_res = super::template read_mem<uint8_t>(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm));
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if(this->core.trap_state) goto TRAP_LB;
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int8_t res = (int8_t)read_res;
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if((rd % traits::RFS) != 0) {
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*(X+rd % traits::RFS) = res;
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}
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@ -694,7 +684,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lh"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -702,8 +691,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm);
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int16_t res = (int16_t)super::template read_mem<uint16_t>(traits::MEM, load_address);
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uint16_t read_res = super::template read_mem<uint16_t>(traits::MEM, load_address);
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if(this->core.trap_state) goto TRAP_LH;
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int16_t res = (int16_t)read_res;
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if((rd % traits::RFS) != 0) {
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*(X+rd % traits::RFS) = res;
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}
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@ -720,7 +710,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lw"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -728,8 +717,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm);
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int32_t res = (int32_t)super::template read_mem<uint32_t>(traits::MEM, load_address);
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uint32_t read_res = super::template read_mem<uint32_t>(traits::MEM, load_address);
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if(this->core.trap_state) goto TRAP_LW;
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int32_t res = (int32_t)read_res;
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if((rd % traits::RFS) != 0) {
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*(X+rd % traits::RFS) = (uint32_t)res;
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}
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@ -746,15 +736,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lbu"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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*NEXT_PC = *PC + 4;
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// execute instruction
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{
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uint8_t res = (uint8_t)super::template read_mem<uint8_t>(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm));
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uint8_t read_res = super::template read_mem<uint8_t>(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm));
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if(this->core.trap_state) goto TRAP_LBU;
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uint8_t res = (uint8_t)read_res;
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if((rd % traits::RFS) != 0) {
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*(X+rd % traits::RFS) = res;
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}
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@ -771,7 +761,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lhu"),
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fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -779,8 +768,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm);
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uint16_t res = (uint16_t)super::template read_mem<uint16_t>(traits::MEM, load_address);
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uint16_t read_res = super::template read_mem<uint16_t>(traits::MEM, load_address);
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if(this->core.trap_state) goto TRAP_LHU;
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uint16_t res = (uint16_t)read_res;
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if((rd % traits::RFS) != 0) {
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*(X+rd % traits::RFS) = res;
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}
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@ -797,7 +787,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sb"),
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fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -819,7 +808,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sh"),
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fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -842,7 +830,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sw"),
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fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1)));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -865,7 +852,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "addi"),
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fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -888,7 +874,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "slti"),
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fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -911,7 +896,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "sltiu"),
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fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -934,7 +918,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "xori"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -957,7 +940,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "ori"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -980,7 +962,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "andi"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1003,7 +984,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "slli"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1031,7 +1011,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "srli"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1059,7 +1038,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "srai"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1087,7 +1065,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "add"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1110,7 +1087,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sub"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1133,7 +1109,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sll"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1156,7 +1131,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "slt"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1179,7 +1153,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sltu"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1202,7 +1175,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "xor"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1225,7 +1197,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "srl"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1248,7 +1219,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sra"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1271,7 +1241,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "or"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1294,7 +1263,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "and"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1319,7 +1287,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {pred}, {succ} ({fm} , {rs1}, {rd})", fmt::arg("mnemonic", "fence"),
|
|
|
|
|
fmt::arg("pred", pred), fmt::arg("succ", succ), fmt::arg("fm", fm), fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1334,7 +1301,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "ecall");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1348,7 +1314,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "ebreak");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1362,7 +1327,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "uret");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1376,7 +1340,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "sret");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1390,7 +1353,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "mret");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1404,7 +1366,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "wfi");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1418,7 +1379,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "dret");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* PRIV = reinterpret_cast<uint8_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PRIV]);
|
|
|
|
@ -1449,7 +1409,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrw"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1458,8 +1417,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrs1 = *(X+rs1 % traits::RFS);
|
|
|
|
|
if((rd % traits::RFS) != 0) {
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRW;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, xrs1);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRW;
|
|
|
|
|
*(X+rd % traits::RFS) = xrd;
|
|
|
|
@ -1481,15 +1441,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrs"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRS;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
uint32_t xrs1 = *(X+rs1 % traits::RFS);
|
|
|
|
|
if(rs1 != 0) {
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | xrs1);
|
|
|
|
@ -1511,15 +1471,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrc"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRC;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
uint32_t xrs1 = *(X+rs1 % traits::RFS);
|
|
|
|
|
if(rs1 != 0) {
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ xrs1);
|
|
|
|
@ -1541,15 +1501,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrwi"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRWI;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, (uint32_t)zimm);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRWI;
|
|
|
|
|
if((rd % traits::RFS) != 0) {
|
|
|
|
@ -1568,15 +1528,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrsi"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRSI;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
if(zimm != 0) {
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | (uint32_t)zimm);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRSI;
|
|
|
|
@ -1597,15 +1557,15 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrci"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t xrd = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::CSR, csr);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRCI;
|
|
|
|
|
uint32_t xrd = read_res;
|
|
|
|
|
if(zimm != 0) {
|
|
|
|
|
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ ((uint32_t)zimm));
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CSRRCI;
|
|
|
|
@ -1626,7 +1586,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"),
|
|
|
|
|
fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 4;
|
|
|
|
@ -1647,7 +1606,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mul"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1671,7 +1629,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulh"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1695,7 +1652,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulhsu"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1719,7 +1675,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulhu"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1743,7 +1698,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "div"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1777,7 +1731,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "divu"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1805,7 +1758,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "rem"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1839,7 +1791,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "remu"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1866,7 +1817,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "caddi4spn"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1892,7 +1842,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "clw"),
|
|
|
|
|
fmt::arg("rd", name(8+rd)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1900,8 +1849,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
// execute instruction
|
|
|
|
|
{
|
|
|
|
|
uint32_t load_address = *(X+rs1 + 8) + uimm;
|
|
|
|
|
*(X+rd + 8) = (int32_t)super::template read_mem<uint32_t>(traits::MEM, load_address);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::MEM, load_address);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CLW;
|
|
|
|
|
*(X+rd + 8) = (int32_t)read_res;
|
|
|
|
|
}
|
|
|
|
|
TRAP_CLW:break;
|
|
|
|
|
}// @suppress("No break at end of case")
|
|
|
|
@ -1915,7 +1865,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs2}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "csw"),
|
|
|
|
|
fmt::arg("rs2", name(8+rs2)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1937,7 +1886,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "caddi"),
|
|
|
|
|
fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1953,7 +1901,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "cnop");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 2;
|
|
|
|
@ -1970,7 +1917,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "cjal"),
|
|
|
|
|
fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -1992,7 +1938,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "cli"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2014,7 +1959,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "clui"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2038,7 +1982,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {nzimm:#05x}", fmt::arg("mnemonic", "caddi16sp"),
|
|
|
|
|
fmt::arg("nzimm", nzimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -2059,7 +2002,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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if(this->disass_enabled){
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/* generate console output when executing the command */
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this->core.disass_output(pc.val, "__reserved_clui");
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}
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// used registers// calculate next pc value
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*NEXT_PC = *PC + 2;
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@ -2078,7 +2020,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "csrli"),
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fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -2099,7 +2040,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "csrai"),
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fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
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auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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@ -2128,7 +2068,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "candi"),
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fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
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this->core.disass_output(pc.val, mnemonic);
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}
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// used registers
|
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|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
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|
@ -2149,7 +2088,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "csub"),
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|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
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|
this->core.disass_output(pc.val, mnemonic);
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|
}
|
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|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
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|
@ -2170,7 +2108,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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|
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "cxor"),
|
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|
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
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|
this->core.disass_output(pc.val, mnemonic);
|
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|
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|
|
}
|
|
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|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2191,7 +2128,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
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|
|
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "cor"),
|
|
|
|
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2212,7 +2148,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "cand"),
|
|
|
|
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2232,7 +2167,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "cj"),
|
|
|
|
|
fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 2;
|
|
|
|
@ -2252,7 +2186,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "cbeqz"),
|
|
|
|
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2275,7 +2208,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "cbnez"),
|
|
|
|
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2298,7 +2230,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}, {nzuimm}", fmt::arg("mnemonic", "cslli"),
|
|
|
|
|
fmt::arg("rs1", name(rs1)), fmt::arg("nzuimm", nzuimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2320,7 +2251,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, sp, {uimm:#05x}", fmt::arg("mnemonic", "clwsp"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("uimm", uimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2329,8 +2259,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
{
|
|
|
|
|
if(rd) {
|
|
|
|
|
uint32_t offs = *(X+2) + uimm;
|
|
|
|
|
*(X+rd % traits::RFS) = (int32_t)super::template read_mem<uint32_t>(traits::MEM, offs);
|
|
|
|
|
uint32_t read_res = super::template read_mem<uint32_t>(traits::MEM, offs);
|
|
|
|
|
if(this->core.trap_state) goto TRAP_CLWSP;
|
|
|
|
|
*(X+rd % traits::RFS) = (int32_t)read_res;
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
raise(0, 2);
|
|
|
|
@ -2347,7 +2278,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "cmv"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2368,7 +2298,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "cjr"),
|
|
|
|
|
fmt::arg("rs1", name(rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2389,7 +2318,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "__reserved_cmv");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 2;
|
|
|
|
@ -2408,7 +2336,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "cadd"),
|
|
|
|
|
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2429,7 +2356,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "cjalr"),
|
|
|
|
|
fmt::arg("rs1", name(rs1)));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2447,7 +2373,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "cebreak");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 2;
|
|
|
|
@ -2466,7 +2391,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
"{mnemonic:10} {rs2}, {uimm:#05x}(sp)", fmt::arg("mnemonic", "cswsp"),
|
|
|
|
|
fmt::arg("rs2", name(rs2)), fmt::arg("uimm", uimm));
|
|
|
|
|
this->core.disass_output(pc.val, mnemonic);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers
|
|
|
|
|
auto* X = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::X0]);// calculate next pc value
|
|
|
|
@ -2483,7 +2407,6 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|
|
|
|
if(this->disass_enabled){
|
|
|
|
|
/* generate console output when executing the command */
|
|
|
|
|
this->core.disass_output(pc.val, "dii");
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
// used registers// calculate next pc value
|
|
|
|
|
*NEXT_PC = *PC + 2;
|
|
|
|
|