changes [m|u]cause rd/wr handling

gen_input/templates/tcc/CORENAME.cpp.gtl

@@ -207,7 +207,7 @@ private:
             ${it}<%}%>
         }
         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]);
-        pc=pc+ ${instr.length/8};
+        pc=pc+4;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();<%instr.behavior.eachLine{%>
         ${it}<%}%>

src/iss/arch/riscv_hart_m_p.h

@@ -419,7 +419,7 @@ protected:
     std::vector<std::function<mem_write_f>> memfn_write;
     void insert_mem_range(uint64_t, uint64_t, std::function<mem_read_f>, std::function<mem_write_f>);
     feature_config cfg;
-    unsigned mcause_max_irq{(FEAT&features_e::FEAT_CLIC)?4096:16};
+    uint64_t mcause_max_irq{(FEAT&features_e::FEAT_CLIC)?4096:16};
     inline bool debug_mode_active() {return this->reg.PRIV&0x4;}
     std::pair<std::function<mem_read_f>, std::function<mem_write_f>>
     replace_mem_access(std::function<mem_read_f> rd, std::function<mem_write_f> wr){
@@ -619,9 +619,9 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
             }
             return std::make_pair(entry, true);
         }
-        throw std::runtime_error(fmt::format("memory load file {} is not a valid elf file",name));
+        throw std::runtime_error("memory load file is not a valid elf file");
     }
-    throw std::runtime_error(fmt::format("memory load file not found, check if {} is a valid file", name));
+    throw std::runtime_error("memory load file not found");
 }
 
 template<typename BASE, features_e FEAT>
@@ -966,12 +966,11 @@ template <typename BASE, features_e FEAT> iss::status riscv_hart_m_p<BASE, FEAT>
         val |= state.mstatus.MPIE<<27;
         val |= state.mstatus.MPP<<28;
     } else
-        val = csr[addr] & ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1));
+        val = csr[addr]; // & ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1));
     return iss::Ok;
 }
 
 template <typename BASE, features_e FEAT> iss::status riscv_hart_m_p<BASE, FEAT>::write_cause(unsigned addr, reg_t val) {
-    csr[addr] = val & ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1));
     if((FEAT & features_e::FEAT_CLIC) && (csr[mtvec]&0x3)==3) {
         auto mask = ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1) | (0xfUL<<16));
         csr[addr] = (val & mask) | (csr[addr] & ~mask);

src/iss/arch/riscv_hart_msu_vp.h

@@ -583,9 +583,9 @@ template <typename BASE> std::pair<uint64_t, bool> riscv_hart_msu_vp<BASE>::load
             }
             return std::make_pair(entry, true);
         }
-        throw std::runtime_error(fmt::format("memory load file {} is not a valid elf file",name));
+        throw std::runtime_error("memory load file is not a valid elf file");
     }
-    throw std::runtime_error(fmt::format("memory load file not found, check if {} is a valid file", name));
+    throw std::runtime_error("memory load file not found");
 }
 
 template <typename BASE>

src/iss/arch/riscv_hart_mu_p.h

@@ -446,7 +446,7 @@ protected:
     std::vector<std::function<mem_write_f>> memfn_write;
     void insert_mem_range(uint64_t, uint64_t, std::function<mem_read_f>, std::function<mem_write_f>);
     feature_config cfg;
-    unsigned mcause_max_irq{(FEAT&features_e::FEAT_CLIC)?4096:16};
+    uint64_t mcause_max_irq{(FEAT&features_e::FEAT_CLIC)?4096:16};
     inline bool debug_mode_active() {return this->reg.PRIV&0x4;}
 
     std::pair<std::function<mem_read_f>, std::function<mem_write_f>>
@@ -689,9 +689,9 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
             }
             return std::make_pair(entry, true);
         }
-        throw std::runtime_error(fmt::format("memory load file {} is not a valid elf file",name));
+        throw std::runtime_error("memory load file is not a valid elf file");
     }
-    throw std::runtime_error(fmt::format("memory load file not found, check if {} is a valid file", name));
+    throw std::runtime_error("memory load file not found");
 }
 
 template<typename BASE, features_e FEAT>
@@ -1148,7 +1148,7 @@ template <typename BASE, features_e FEAT> iss::status riscv_hart_mu_p<BASE, FEAT
             break;
         }
     } else
-        val = csr[addr] & ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1));
+        val = csr[addr];// & ((1UL<<(traits<BASE>::XLEN-1)) | (mcause_max_irq-1));
     return iss::Ok;
 }
 

src/iss/arch/tgc_c.h

@@ -53,7 +53,7 @@ template <> struct traits<tgc_c> {
     static constexpr std::array<const char*, 36> reg_aliases{
         {"ZERO", "RA", "SP", "GP", "TP", "T0", "T1", "T2", "S0", "S1", "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "S2", "S3", "S4", "S5", "S6", "S7", "S8", "S9", "S10", "S11", "T3", "T4", "T5", "T6", "PC", "NEXT_PC", "PRIV", "DPC"}};
 
-    enum constants {MISA_VAL=0b01000000000000000001000100000100, MARCHID_VAL=0x80000003, PGMASK=0b111111111111, XLEN=32, INSTR_ALIGNMENT=2, RFS=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, CSR_SIZE=4096, MUL_LEN=64};
+    enum constants {MISA_VAL=0b01000000000000000001000100000100, MARCHID_VAL=0x80000003, XLEN=32, INSTR_ALIGNMENT=2, RFS=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, CSR_SIZE=4096, MUL_LEN=64};
 
     constexpr static unsigned FP_REGS_SIZE = 0;
 

src/main.cpp

@@ -61,7 +61,7 @@ int main(int argc, char *argv[]) {
     // clang-format off
     desc.add_options()
         ("help,h", "Print help message")
-        ("verbose,v", po::value<int>()->implicit_value(0), "Sets logging verbosity")
+        ("verbose,v", po::value<int>()->default_value(4), "Sets logging verbosity")
         ("logfile,l", po::value<std::string>(), "Sets default log file.")
         ("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
         ("gdb-port,g", po::value<unsigned>()->default_value(0), "enable gdb server and specify port to use")
@@ -93,11 +93,9 @@ int main(int argc, char *argv[]) {
 
     LOGGER(DEFAULT)::print_time() = false;
     LOGGER(connection)::print_time() = false;
-    if (clim.count("verbose")) {
+    auto l = logging::as_log_level(clim["verbose"].as<int>());
-        auto l = logging::as_log_level(clim["verbose"].as<int>());
+    LOGGER(DEFAULT)::reporting_level() = l;
-        LOGGER(DEFAULT)::reporting_level() = l;
+    LOGGER(connection)::reporting_level() = l;
-        LOGGER(connection)::reporting_level() = l;
-    }
     if (clim.count("logfile")) {
         // configure the connection logger
         auto f = fopen(clim["logfile"].as<std::string>().c_str(), "w");

src/sysc/core_complex.cpp

@@ -118,7 +118,7 @@ public:
             std::stringstream s;
             s << "[p:" << lvl[this->reg.PRIV] << ";s:0x" << std::hex << std::setfill('0')
               << std::setw(sizeof(reg_t) * 2) << (reg_t)this->state.mstatus << std::dec << ";c:"
-              << this->reg.icount + this->cycle_offset << "]";
+              << this->icount + this->cycle_offset << "]";
             SCCDEBUG(owner->name())<<"disass: "
                 << "0x" << std::setw(16) << std::right << std::setfill('0') << std::hex << pc << "\t\t" << std::setw(40)
                 << std::setfill(' ') << std::left << instr << s.str();
@@ -178,7 +178,7 @@ public:
 
     void wait_until(uint64_t flags) override {
         SCCDEBUG(owner->name()) << "Sleeping until interrupt";
-        while(this->reg.pending_trap == 0 && (this->csr[arch::mip] & this->csr[arch::mie]) == 0) {
+        while(this->pending_trap == 0 && (this->csr[arch::mip] & this->csr[arch::mie]) == 0) {
             sc_core::wait(wfi_evt);
         }
         PLAT::wait_until(flags);
@@ -207,7 +207,7 @@ public:
             this->csr[arch::mip] &= ~mask;
         this->check_interrupt();
         if(value)
-            SCCTRACE(owner->name()) << "Triggering interrupt " << id << " Pending trap: " << this->reg.pending_trap;
+            SCCTRACE(owner->name()) << "Triggering interrupt " << id << " Pending trap: " << this->pending_trap;
     }
 
 private: