rework PMP check and fix MISA for TGC_D

2021-11-09 15:55:22 +01:00
parent bfa8166223
commit fd98ad95f6
2 changed files with 25 additions and 31 deletions
--- a/gen_input/TGC_D.core_desc
+++ b/gen_input/TGC_D.core_desc
@ -7,7 +7,7 @@ Core TGC_D provides RV32I, Zicsr, Zifencei, RV32M, RV32IC {
        XLEN=32;
        // definitions for the architecture wrapper
        //                    XL    ZYXWVUTSRQPONMLKJIHGFEDCBA
-        unsigned MISA_VAL = 0b01000000000000000001000100000100;
+        unsigned MISA_VAL = 0b01000000000100000011000100000100;
        unsigned MARCHID_VAL = 0x80000004;
    }
 }